created Mon Jun 13 18:56:28 2022

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Chiplet Control Register 0 - VITL CCFG
Addr: 0000000003000000 (SCOM)
0000000003000010 (SCOM1)
0000000003000020 (SCOM2)
Name:TP.TCN1.N1.CPLT_CTRL0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CTRL.CPLT_CTRL0_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_OR WO_CLEAR CTRL_CC_ABSTCLK_MUXSEL_DC: Select ABIST clock source for Arrays on Chiplet Boundary. When set to 1, clocks where used from Chiplet with ABIST
1 RW WO_OR WO_CLEAR TC_UNIT_SYNCCLK_MUXSEL_DC: Select the sync clock for async latches (init value 1)
2 RW WO_OR WO_CLEAR CTRL_CC_FLUSHMODE_INH: Prevent plats from going into flush mode (init value 1)
3 RW WO_OR WO_CLEAR CTRL_CC_FORCE_ALIGN: Force align signal to be sent (init value 1, drop before dropping flushmode_inh)
4 RW WO_OR WO_CLEAR TC_UNIT_ARY_WRT_THRU_DC: Set Array into write thru mode, used for LBIST
5 RW WO_OR WO_CLEAR UNUSED_5A: unused
6 RW WO_OR WO_CLEAR TC_VITL_PROTECTION: VITL LBIST protection - turn on for LBIST only
7 RW WO_OR WO_CLEAR UNUSED_7A: unused
8 RW WO_OR WO_CLEAR CTRL_CC_ABIST_RECOV_DISABLE_DC: new signal to disable recovery
9 RW WO_OR WO_CLEAR UNUSED_9A: unused
10 RW WO_OR WO_CLEAR UNUSED_10A: unused
11 RW WO_OR WO_CLEAR RESERVED_11A: reserved
12 RW WO_OR WO_CLEAR UNUSED_12A: unused
13 RW WO_OR WO_CLEAR TC_UNIT_DETERMINISTIC_TEST_ENA_DC: Forces login into deterministic test mode e.g. for LBIST
14 RW WO_OR WO_CLEAR TC_UNIT_CONSTRAIN_SAFESCAN_DC: Safe scan of N1L latches. Prevent lck when switching SE
15 RW WO_OR WO_CLEAR TC_UNIT_RRFA_TEST_ENA_DC:
16 RW WO_OR WO_CLEAR UNUSED_16A: unused
17 RW WO_OR WO_CLEAR UNUSED_17A: unused
18 RW WO_OR WO_CLEAR RESERVED_18A: reserved
19 RW WO_OR WO_CLEAR RESERVED_19A: reserved
20:27 RW WO_OR WO_CLEAR TC_PSRO_SEL_DC: PSRO Select
28 RW WO_OR WO_CLEAR UNUSED_28A: unused
29 RW WO_OR WO_CLEAR UNUSED_29A: unused
30 RW WO_OR WO_CLEAR UNUSED_30A: unused
31 RW WO_OR WO_CLEAR UNUSED_31A: unused
32 RW WO_OR WO_CLEAR RESERVED_32A: reserved
33 RW WO_OR WO_CLEAR RESERVED_33A: reserved
34 RW WO_OR WO_CLEAR RESERVED_34A: reserved
35 RW WO_OR WO_CLEAR RESERVED_35A: reserved
36 RW WO_OR WO_CLEAR UNUSED_36A: unused
37 RW WO_OR WO_CLEAR UNUSED_37A: unused
38 RW WO_OR WO_CLEAR RESERVED_38A: reserved
39 RW WO_OR WO_CLEAR RESERVED_39A: reserved
40:41 RW WO_OR WO_CLEAR CTRL_MISC_CLKDIV_SEL_DC: Clock Divider Select 00=1024:1 01=64:1 10=16:1 11=4:1
42 RW WO_OR WO_CLEAR RESERVED_42A: reserved
43 RW WO_OR WO_CLEAR RESERVED_43A: reserved
44 RW WO_OR WO_CLEAR UNUSED_44A: unused
45 RW WO_OR WO_CLEAR UNUSED_45A: unused
46 RW WO_OR WO_CLEAR CTRL_CC_SSS_CALIBRATE_DC: TE=1 only -Sensors Calibration
47 RW WO_OR WO_CLEAR CTRL_CC_PIN_LBIST_DC: TE=1 only - PIN LBIST mode - LBIST is controlled via Pin, not by OPCG
48 RW WO_OR WO_CLEAR FREE_USAGE_48A: free usage
49 RW WO_OR WO_CLEAR FREE_USAGE_49A: free usage
50 RW WO_OR WO_CLEAR FREE_USAGE_50A: free usage
51 RW WO_OR WO_CLEAR FREE_USAGE_51A: free usage
52 RW WO_OR WO_CLEAR FREE_USAGE_52A: free usage
53 RW WO_OR WO_CLEAR FREE_USAGE_53A: free usage
54 RW WO_OR WO_CLEAR FREE_USAGE_54A: free usage
55 RW WO_OR WO_CLEAR RESERVED_55A: reserved
56 RW WO_OR WO_CLEAR FREE_USAGE_56A: free usage
57 RW WO_OR WO_CLEAR FREE_USAGE_57A: free usage
58 RW WO_OR WO_CLEAR FREE_USAGE_58A: free usage
59 RW WO_OR WO_CLEAR FREE_USAGE_59A: free usage
60 RW WO_OR WO_CLEAR FREE_USAGE_60A: free usage
61 RW WO_OR WO_CLEAR FREE_USAGE_61A: free usage
62 RW WO_OR WO_CLEAR FREE_USAGE_62A: free usage
63 RW WO_OR WO_CLEAR FREE_USAGE_63A: free usage

Chiplet Control Register 1 - VITL CCFG
Addr: 0000000003000001 (SCOM)
0000000003000011 (SCOM1)
0000000003000021 (SCOM2)
Name:TP.TCN1.N1.CPLT_CTRL1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CTRL.CPLT_CTRL1_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_OR WO_CLEAR TC_UNIT_MULTICYCLE_TEST_FENCE_DC: Mutlicycle test fence for LBIST
1 RW WO_OR WO_CLEAR UNUSED_1B: unused
2 RW WO_OR WO_CLEAR UNUSED_2B: unused
3 RW WO_OR WO_CLEAR UNUSED_3B: unused
4 RW WO_OR WO_CLEAR TC_REGION0_FENCE_DC: Fence for perv region
5 RW WO_OR WO_CLEAR TC_REGION1_FENCE_DC: Fence for region 1 - unused
6 RW WO_OR WO_CLEAR TC_REGION2_FENCE_DC: Fence for region 2 - fbc
7 RW WO_OR WO_CLEAR TC_REGION3_FENCE_DC: Fence for region 3 - unused
8 RW WO_OR WO_CLEAR TC_REGION4_FENCE_DC: Fence for region 4 - pe
9 RW WO_OR WO_CLEAR TC_REGION5_FENCE_DC: Fence for region 5 - mm
10 RW WO_OR WO_CLEAR TC_REGION6_FENCE_DC: Fence for region 6 - unused
11 RW WO_OR WO_CLEAR TC_REGION7_FENCE_DC: Fence for region 7 - unused
12 RW WO_OR WO_CLEAR TC_REGION8_FENCE_DC: Fence for region 8 - unused
13 RW WO_OR WO_CLEAR TC_REGION9_FENCE_DC: Fence for region 9 - unused
14 RW WO_OR WO_CLEAR TC_REGION10_FENCE_DC: Fence for region 10 - reserved
15 RW WO_OR WO_CLEAR TC_REGION11_FENCE_DC: Fence for region 11 - unused
16 RW WO_OR WO_CLEAR TC_REGION12_FENCE_DC: Fence for region 12 - unused
17 RW WO_OR WO_CLEAR TC_REGION13_FENCE_DC: Fence for region 13 - unused
18 RW WO_OR WO_CLEAR TC_REGION14_FENCE_DC: Fence for region 14 - unused
19 RW WO_OR WO_CLEAR UNUSED_19B: unused
20 RW WO_OR WO_CLEAR UNUSED_20B: unused
21 RW WO_OR WO_CLEAR UNUSED_21B: unused
22 RW WO_OR WO_CLEAR TC_STG_ACT_EN_DC:
23 RW WO_OR WO_CLEAR UNUSED_23B: unused
24 RW WO_OR WO_CLEAR UNUSED_24B: unused
25 RW WO_OR WO_CLEAR UNUSED_25B: unused
26 RW WO_OR WO_CLEAR UNUSED_26B: unused
27 RW WO_OR WO_CLEAR UNUSED_27B: unused
28 RW WO_OR WO_CLEAR UNUSED_28B: unused
29 RW WO_OR WO_CLEAR UNUSED_29B: unused
30 RW WO_OR WO_CLEAR UNUSED_30B: unused
31 RW WO_OR WO_CLEAR UNUSED_31B: unused

Chiplet Control Register 2 - Region Partial Good
Addr: 0000000003000002 (SCOM)
0000000003000012 (SCOM1)
0000000003000022 (SCOM2)
Name:TP.TCN1.N1.CPLT_CTRL2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
4:18TP.TCN1.N1.EPS.CTRL.CPLT_CTRL2_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:14) [000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:3 RO RO RO constant=0b0000
4 RW WO_OR WO_CLEAR CTRL_EPS_REGION0_PGOOD: Partial Good for region0 0=bad, 1=good
5 RW WO_OR WO_CLEAR CTRL_EPS_REGION1_PGOOD: Partial Good for region 1 - unused 0=bad, 1=good
6 RW WO_OR WO_CLEAR CTRL_EPS_REGION2_PGOOD: Partial Good for region 2 - fbc 0=bad, 1=good
7 RW WO_OR WO_CLEAR CTRL_EPS_REGION3_PGOOD: Partial Good for region 3 - unused 0=bad, 1=good
8 RW WO_OR WO_CLEAR CTRL_EPS_REGION4_PGOOD: Partial Good for region 4 - pe 0=bad, 1=good
9 RW WO_OR WO_CLEAR CTRL_EPS_REGION5_PGOOD: Partial Good for region 5 - mm 0=bad, 1=good
10 RW WO_OR WO_CLEAR CTRL_EPS_REGION6_PGOOD: Partial Good for region 6 - unused 0=bad, 1=good
11 RW WO_OR WO_CLEAR CTRL_EPS_REGION7_PGOOD: Partial Good for region 7 - unused 0=bad, 1=good
12 RW WO_OR WO_CLEAR CTRL_EPS_REGION8_PGOOD: Partial Good for region 8 - unused 0=bad, 1=good
13 RW WO_OR WO_CLEAR CTRL_EPS_REGION9_PGOOD: Partial Good for region 9 - unused 0=bad, 1=good
14 RW WO_OR WO_CLEAR CTRL_EPS_REGION10_PGOOD: Partial Good for region 10 - reserved 0=bad, 1=good
15 RW WO_OR WO_CLEAR CTRL_EPS_REGION11_PGOOD: Partial Good for region 11 - unused 0=bad, 1=good
16 RW WO_OR WO_CLEAR CTRL_EPS_REGION12_PGOOD: Partial Good for region 12 - unused 0=bad, 1=good
17 RW WO_OR WO_CLEAR CTRL_EPS_REGION13_PGOOD: Partial Good for region 13 - unused 0=bad, 1=good
18 RW WO_OR WO_CLEAR CTRL_EPS_REGION14_PGOOD: Partial Good for region 14 - unused 0=bad, 1=good

Chiplet Control Register 3 - Region PSCOM Enable
Addr: 0000000003000003 (SCOM)
0000000003000013 (SCOM1)
0000000003000023 (SCOM2)
Name:TP.TCN1.N1.CPLT_CTRL3
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
4:18TP.TCN1.N1.EPS.CTRL.CPLT_CTRL3_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:14) [000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:3 RO RO RO constant=0b0000
4 RW WO_OR WO_CLEAR CTRL_EPS_REGION0_PSCOM_EN: Region0 PSCOM enable - set to 1, to allow PSCOM access on this region
5 RW WO_OR WO_CLEAR CTRL_EPS_REGION1_PSCOM_EN: region 1 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region
6 RW WO_OR WO_CLEAR CTRL_EPS_REGION2_PSCOM_EN: region 2 - fbc - PSCOM enable - set to 1, to allow PSCOM access on this region
7 RW WO_OR WO_CLEAR CTRL_EPS_REGION3_PSCOM_EN: region 3 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region
8 RW WO_OR WO_CLEAR CTRL_EPS_REGION4_PSCOM_EN: region 4 - pe - PSCOM enable - set to 1, to allow PSCOM access on this region
9 RW WO_OR WO_CLEAR CTRL_EPS_REGION5_PSCOM_EN: region 5 - mm - PSCOM enable - set to 1, to allow PSCOM access on this region
10 RW WO_OR WO_CLEAR CTRL_EPS_REGION6_PSCOM_EN: region 6 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region
11 RW WO_OR WO_CLEAR CTRL_EPS_REGION7_PSCOM_EN: region 7 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region
12 RW WO_OR WO_CLEAR CTRL_EPS_REGION8_PSCOM_EN: region 8 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region
13 RW WO_OR WO_CLEAR CTRL_EPS_REGION9_PSCOM_EN: region 9 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region
14 RW WO_OR WO_CLEAR CTRL_EPS_REGION10_PSCOM_EN: region 10 - reserved - PSCOM enable - set to 1, to allow PSCOM access on this region
15 RW WO_OR WO_CLEAR CTRL_EPS_REGION11_PSCOM_EN: region 11 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region
16 RW WO_OR WO_CLEAR CTRL_EPS_REGION12_PSCOM_EN: region 12 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region
17 RW WO_OR WO_CLEAR CTRL_EPS_REGION13_PSCOM_EN: region 13 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region
18 RW WO_OR WO_CLEAR CTRL_EPS_REGION14_PSCOM_EN: region 14 - unused - PSCOM enable - set to 1, to allow PSCOM access on this region

Chiplet Control Register 4 - Region Flushmode inhibit
Addr: 0000000003000004 (SCOM)
0000000003000014 (SCOM1)
0000000003000024 (SCOM2)
Name:TP.TCN1.N1.CPLT_CTRL4
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
4:18TP.TCN1.N1.EPS.CTRL.CPLT_CTRL4_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:14) [000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:3 RO RO RO constant=0b0000
4 RW WO_OR WO_CLEAR CTRL_CC_REGION0_FLUSHMODE_INH: Region0 flushmode inhibit - set to 1, to bring only this region out of flush
5 RW WO_OR WO_CLEAR CTRL_CC_REGION1_FLUSHMODE_INH: region 1 - unused - flushmode inhibit - set to 1, to bring only this region out of flush
6 RW WO_OR WO_CLEAR CTRL_CC_REGION2_FLUSHMODE_INH: region 2 - fbc - flushmode inhibit - set to 1, to bring only this region out of flush
7 RW WO_OR WO_CLEAR CTRL_CC_REGION3_FLUSHMODE_INH: region 3 - unused - flushmode inhibit - set to 1, to bring only this region out of flush
8 RW WO_OR WO_CLEAR CTRL_CC_REGION4_FLUSHMODE_INH: region 4 - pe - flushmode inhibit - set to 1, to bring only this region out of flush
9 RW WO_OR WO_CLEAR CTRL_CC_REGION5_FLUSHMODE_INH: region 5 - mm - flushmode inhibit - set to 1, to bring only this region out of flush
10 RW WO_OR WO_CLEAR CTRL_CC_REGION6_FLUSHMODE_INH: region 6 - unused - flushmode inhibit - set to 1, to bring only this region out of flush
11 RW WO_OR WO_CLEAR CTRL_CC_REGION7_FLUSHMODE_INH: region 7 - unused - flushmode inhibit - set to 1, to bring only this region out of flush
12 RW WO_OR WO_CLEAR CTRL_CC_REGION8_FLUSHMODE_INH: region 8 - unused - flushmode inhibit - set to 1, to bring only this region out of flush
13 RW WO_OR WO_CLEAR CTRL_CC_REGION9_FLUSHMODE_INH: region 9 - unused - flushmode inhibit - set to 1, to bring only this region out of flush
14 RW WO_OR WO_CLEAR CTRL_CC_REGION10_FLUSHMODE_INH: region 10 - reserved - flushmode inhibit - set to 1, to bring only this region out of flush
15 RW WO_OR WO_CLEAR CTRL_CC_REGION11_FLUSHMODE_INH: region 11 - unused - flushmode inhibit - set to 1, to bring only this region out of flush
16 RW WO_OR WO_CLEAR CTRL_CC_REGION12_FLUSHMODE_INH: region 12 - unused - flushmode inhibit - set to 1, to bring only this region out of flush
17 RW WO_OR WO_CLEAR CTRL_CC_REGION13_FLUSHMODE_INH: region 13 - unused - flushmode inhibit - set to 1, to bring only this region out of flush
18 RW WO_OR WO_CLEAR CTRL_CC_REGION14_FLUSHMODE_INH: region 14 - unused - flushmode inhibit - set to 1, to bring only this region out of flush

Chiplet Control Register 5 - Power Gate
Addr: 0000000003000005 (SCOM)
0000000003000015 (SCOM1)
0000000003000025 (SCOM2)
Name:TP.TCN1.N1.CPLT_CTRL5
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:19TP.TCN1.N1.EPS.CTRL.CPLT_CTRL5_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_OR WO_CLEAR CPLT_CTRL5_00: Power Gate Control
1 RW WO_OR WO_CLEAR CPLT_CTRL5_01: Power Gate Control
2 RW WO_OR WO_CLEAR CPLT_CTRL5_02: Power Gate Control
3 RW WO_OR WO_CLEAR CPLT_CTRL5_03: Power Gate Control - EQ: DFT Fence vitl
4 RW WO_OR WO_CLEAR CPLT_CTRL5_04: Power Gate Control - EQ: DFT Fence Perv
5 RW WO_OR WO_CLEAR CPLT_CTRL5_05: Power Gate Control - EQ: DFT Fence region 1 - unused -
6 RW WO_OR WO_CLEAR CPLT_CTRL5_06: Power Gate Control - EQ: DFT Fence region 2 - fbc -
7 RW WO_OR WO_CLEAR CPLT_CTRL5_07: Power Gate Control - EQ: DFT Fence region 3 - unused -
8 RW WO_OR WO_CLEAR CPLT_CTRL5_08: Power Gate Control - EQ: DFT Fence region 4 - pe -
9 RW WO_OR WO_CLEAR CPLT_CTRL5_09: Power Gate Control - EQ: DFT Fence region 5 - mm -
10 RW WO_OR WO_CLEAR CPLT_CTRL5_010: Power Gate Control - EQ: DFT Fence region 6 - unused -
11 RW WO_OR WO_CLEAR CPLT_CTRL5_011: Power Gate Control - EQ: DFT Fence region 7 - unused -
12 RW WO_OR WO_CLEAR CPLT_CTRL5_012: Power Gate Control - EQ: DFT Fence region 8 - unused -
13 RW WO_OR WO_CLEAR CPLT_CTRL5_013: Power Gate Control - EQ: DFT Fence region 9 - unused -
14 RW WO_OR WO_CLEAR CPLT_CTRL5_014: Power Gate Control - EQ: DFT Fence region 10 - reserved -
15 RW WO_OR WO_CLEAR CPLT_CTRL5_015: Power Gate Control - EQ: DFT Fence region 11 - unused -
16 RW WO_OR WO_CLEAR CPLT_CTRL5_016: Power Gate Control - EQ: DFT Fence region 12 - unused -
17 RW WO_OR WO_CLEAR CPLT_CTRL5_017: Power Gate Control - EQ: DFT Fence region 13 - unused -
18 RW WO_OR WO_CLEAR CPLT_CTRL5_018: Power Gate Control - EQ: DFT Fence region 14 - unused -
19 RW WO_OR WO_CLEAR CPLT_CTRL5_019: Power Gate Control

Chiplet Config Register 0 - VITL FUNC
Addr: 0000000003000008 (SCOM)
0000000003000018 (SCOM1)
0000000003000028 (SCOM2)
Name:TP.TCN1.N1.CPLT_CONF0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CTRL.CPLT_CONF0_OUT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:5 RW WO_OR WO_CLEAR CTRL_MISC_PROBE0_SEL_DC: Probe 0 select please look at Probe spec for more details
6 RW WO_OR WO_CLEAR RESERVED_6G: reserved
7 RW WO_OR WO_CLEAR RESERVED_7G: reserved
8:13 RW WO_OR WO_CLEAR CTRL_MISC_PROBE1_SEL_DC: Probe 1 select please look at Probe spec for more details
14 RW WO_OR WO_CLEAR RESERVED_14G: reserved
15 RW WO_OR WO_CLEAR RESERVED_15G: reserved
16:21 RW WO_OR WO_CLEAR CTRL_MISC_PROBE2_SEL_DC: Probe 2 select please look at Probe spec for more details
22 RW WO_OR WO_CLEAR RESERVED_22G: reserved
23 RW WO_OR WO_CLEAR RESERVED_23G: reserved
24:29 RW WO_OR WO_CLEAR CTRL_MISC_PROBE3_SEL_DC: Probe 3 select please look at Probe spec for more details
30 RW WO_OR WO_CLEAR RESERVED_30G: reserved
31 RW WO_OR WO_CLEAR RESERVED_31G: reserved
32 RW WO_OR WO_CLEAR CTRL_MISC_OFLOW_FEH_SEL_DC: ABIST Overflow/Fail Ever Happen Select
33 RW WO_OR WO_CLEAR CTRL_CC_SCAN_PROTECT_DC: Enables Scan Protection - Enables Scan Collision Error Mechanism
34 RW WO_OR WO_CLEAR CTRL_CC_SDIS_DC_N: For Scan Diagnostic to Discable Scan path
35 RW WO_OR WO_CLEAR CTRL_CC_SCAN_DIAG_DC: For System Scan diag control
36 RW WO_OR WO_CLEAR RESERVED_TEST_CONTROL_36G: reserved test control
37 RW WO_OR WO_CLEAR RESERVED_TEST_CONTROL_37G: reserved test control
38 RW WO_OR WO_CLEAR RESERVED_TEST_CONTROL_38G: reserved test control
39 RW WO_OR WO_CLEAR RESERVED_TEST_CONTROL_39G: reserved test control
40 RW WO_OR WO_CLEAR CTRL_EPS_MASK_VITL_PCB_ERR_DC: Mask VITL PCB Errors from CC or CPLT_CTRL
41 RW WO_OR WO_CLEAR CTRL_CC_MASK_VITL_SCAN_OPCG_ERR_DC: Mask VITL Errors in CC, which are not PCB related
42 RW WO_OR WO_CLEAR RESERVED_42G: RESERVED
43 RW WO_OR WO_CLEAR RESERVED_43G: RESERVED
44 RW WO_OR WO_CLEAR TC_PCB_DBG_GLB_BRCST_EN: DD2 only: Enable Debug Broadcast
45 RW WO_OR WO_CLEAR RESERVED_45G: reserved
46 RW WO_OR WO_CLEAR TC_SKIT_CANARY_MODE_DC:
47 RW WO_OR WO_CLEAR TC_TOPOLOGY_MODE_DC:
48:51 RW WO_OR WO_CLEAR TC_TOPOLOGY_ID_DC: Topology ID
52 RW WO_OR WO_CLEAR FREE_USAGE_52G: free usage
53 RW WO_OR WO_CLEAR FREE_USAGE_53G: free usage
54 RW WO_OR WO_CLEAR FREE_USAGE_54G: free usage
55 RW WO_OR WO_CLEAR FREE_USAGE_55G: free usage
56 RW WO_OR WO_CLEAR FREE_USAGE_56G: free usage
57 RW WO_OR WO_CLEAR FREE_USAGE_57G: free usage
58 RW WO_OR WO_CLEAR FREE_USAGE_58G: free usage
59 RW WO_OR WO_CLEAR FREE_USAGE_59G: free usage
60 RW WO_OR WO_CLEAR FREE_USAGE_60G: free usage
61 RW WO_OR WO_CLEAR FREE_USAGE_61G: free usage
62 RW WO_OR WO_CLEAR FREE_USAGE_62G: free usage
63 RW WO_OR WO_CLEAR FREE_USAGE_63G: free usage

Chiplet Config Register 1 - VITL FUNC
Addr: 0000000003000009 (SCOM)
0000000003000019 (SCOM1)
0000000003000029 (SCOM2)
Name:TP.TCN1.N1.CPLT_CONF1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CTRL.CPLT_CONF1_OUT_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:1 RW WO_OR WO_CLEAR TC_ANES_AMUX_VSEL_ES_EQ_DC: AMUX or LaneCTL or IOVAILD or RATIO
2:4 RW WO_OR WO_CLEAR TC_ANES_AMUX_VSEL_ES_EQALL_DC: AMUX or LaneCTL or IOVAILD or RATIO
5:7 RW WO_OR WO_CLEAR TC_ANES_AMUX_VSEL_ES_VDN_DC: AMUX or LaneCTL or IOVAILD or RATIO
8 RW WO_OR WO_CLEAR UNUSED_8H: unused
9 RW WO_OR WO_CLEAR UNUSED_9H: unused
10 RW WO_OR WO_CLEAR TP_N1_PSI_IOVALID_DC: AMUX or LaneCTL or IOVAILD or RATIO
11 RW WO_OR WO_CLEAR UNUSED_11H: unused
12 RW WO_OR WO_CLEAR TC_LP_RESET: AMUX or LaneCTL or IOVAILD or RATIO
13 RW WO_OR WO_CLEAR UNUSED_13H: unused
14 RW WO_OR WO_CLEAR UNUSED_14H: unused
15 RW WO_OR WO_CLEAR UNUSED_15H: unused
16 RW WO_OR WO_CLEAR UNUSED_16H: unused
17 RW WO_OR WO_CLEAR UNUSED_17H: unused
18 RW WO_OR WO_CLEAR UNUSED_18H: unused
19 RW WO_OR WO_CLEAR UNUSED_19H: unused
20 RW WO_OR WO_CLEAR UNUSED_20H: unused
21 RW WO_OR WO_CLEAR UNUSED_21H: unused
22 RW WO_OR WO_CLEAR UNUSED_22H: unused
23 RW WO_OR WO_CLEAR UNUSED_23H: unused
24 RW WO_OR WO_CLEAR UNUSED_24H: unused
25 RW WO_OR WO_CLEAR UNUSED_25H: unused
26 RW WO_OR WO_CLEAR UNUSED_26H: unused
27 RW WO_OR WO_CLEAR UNUSED_27H: unused
28 RW WO_OR WO_CLEAR UNUSED_28H: unused
29 RW WO_OR WO_CLEAR UNUSED_29H: unused
30 RW WO_OR WO_CLEAR UNUSED_30H: unused
31 RW WO_OR WO_CLEAR UNUSED_31H: unused

Chiplet Status Register - Interrupt send out on bit change if not masked via Chiplet Mask Register. Mask only mask the interrupt, not the status register!
Addr: 0000000003000100 (SCOM)
Name:TP.TCN1.N1.CPLT_STAT0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CTRL.CPLT_STAT_OUT_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX ABIST_DONE_DC: abist_done_dc
1 ROX UNUSED: unused
2 ROX RESERVED_2I: reserved
3 ROX RESERVED_3I: reserved
4 ROX TC_DIAG_PORT0_OUT: Diagnostic out port
5 ROX TC_DIAG_PORT1_OUT: Diagnostic out port
6 ROX RESERVED_6I: reserved
7 ROX PLL_DESTOUT: pll destout
8 ROX CC_CTRL_OPCG_DONE_DC: OPCG done. For LBIST, ABIST, or other OPCG runs
9 ROX CC_CTRL_CHIPLET_IS_ALIGNED_DC: Indicates that Chiplet is aligned
10 ROX FREE_USAGE_10I: free usage
11 ROX FREE_USAGE_11I: free usage
12 ROX FREE_USAGE_12I: free usage
13 ROX FREE_USAGE_13I: free usage
14 ROX FREE_USAGE_14I: free usage
15 ROX FREE_USAGE_15I: free usage
16 ROX FREE_USAGE_16I: free usage
17 ROX FREE_USAGE_17I: free usage
18 ROX FREE_USAGE_18I: free usage
19 ROX FREE_USAGE_19I: free usage
20 ROX FREE_USAGE_20I: free usage
21 ROX FREE_USAGE_21I: free usage
22 ROX FREE_USAGE_22I: free usage
23 ROX FREE_USAGE_23I: free usage
24 ROX GLOBAL_FEH_DC: chiplet specific
25 ROX FREE_USAGE_25I: free usage
26 ROX FREE_USAGE_26I: free usage
27 ROX FREE_USAGE_27I: free usage
28 ROX FREE_USAGE_28I: free usage
29 ROX FREE_USAGE_29I: free usage
30 ROX FREE_USAGE_30I: free usage
31 ROX FREE_USAGE_31I: free usage

Chiplet Mask Register - Masking the Interrupt on a bitchange of the Chiplet Status Register. Does not mask the status itself!
Addr: 0000000003000101 (SCOM)
Name:TP.TCN1.N1.CPLT_MASK0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CTRL.CPLT_MASK_OUT_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RW ITR_MASK: Bitwise masking of cplt_stat0 - will prevent interrupt

CTRL Protect Mode Register
Addr: 00000000030003FE (SCOM)
Name:TP.TCN1.N1.CTRL_PROTECT_MODE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.CTRL.PCB_IF.PROTECT_MODE.RD_PROTECT_ENA_INST.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.CTRL.PCB_IF.PROTECT_MODE.WR_PROTECT_ENA_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 RW CTRL_READ_PROTECT_ENABLE: Enable read protection
1 RW CTRL_WRITE_PROTECT_ENABLE: Enable write protection

Atomic Lock Register
Addr: 00000000030003FF (SCOM)
Name:TP.TCN1.N1.CTRL_ATOMIC_LOCK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.CTRL.PCB_IF.ATOMIC_LOCK.ATOMIC_LOCK_ENA_INST.LATC.L2(0) [0]
1:4TP.TCN1.N1.EPS.CTRL.PCB_IF.ATOMIC_LOCK.ATOMIC_ID_Q_INST.LATC.L2(0:3) [0000]
8:15TP.TCN1.N1.EPS.CTRL.PCB_IF.ATOMIC_LOCK.ATOMIC_LOCK_ACTIVITY_Q_INST.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW CTRL_ATOMIC_LOCK_ENABLE: Enable atomic lock
1:4 ROX CTRL_ATOMIC_ID: Atomic ID
5:7 RO constant=0b000
8:15 ROX CTRL_ATOMIC_ACTIVITY: Atomic lock counter

PSCOMLE mode register
Addr: 0000000003010000 (SCOM)
Name:TP.TCN1.N1.EPS.PSC.PSC.PSCOM_MODE_REG
Constant(s):PU_N1_PSCOM_MODE_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11TP.TCN1.N1.EPS.PSC.PSC.PSCOM_MODE_LT_INST.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0 RW ABORT_ON_PCB_ADDR_PARITY_ERROR: abort_on_PCB_addr_parity_error
1 RW ABORT_ON_PCB_WDATA_PARITY_ERROR: abort_on_PCB_wdata_parity_error
2 RW UNUSED_MODE_REG_BIT_2: unused_mode_reg_bit_2
3 RW ABORT_ON_DL_RETURN_WDATA_PARITY_ERROR: abort_on_DL_return_wdata_parity_error
4 RW WATCHDOG_ENABLE: watchdog_enable
5:6 RW SCOM_HANG_LIMIT: 0b11: 256, 0b10:512, 0b01:768, 0b00:1023
7 RW FORCE_ALL_RINGS: set to logic 1 if all rings should be enable independent of ring address
8 RW FSM_SELFRESET_ON_STATEVEC_PARITYERROR_ENABLE: fsm_selfreset_on_statevec_parityerror_enable
9:11 RW RESERVED_PSCOM_MODE_LT: reserved

PSCOMLE error register
Addr: 0000000003010001 (SCOM)
Name:TP.TCN1.N1.EPS.PSC.PSC.PSCOM_STATUS_ERROR_REG
Constant(s):PU_N1_PSCOM_STATUS_ERROR_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:17TP.TCN1.N1.EPS.PSC.PSC.PSCOM_ERR_LT_0_INST.LATC.L2(0:17) [000000000000000000]
18:35TP.TCN1.N1.EPS.PSC.PSC.PSCOM_ERR_TRAP_LT_0_INST.LATC.L2(0:17) [000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX ACCUMULATED_PCB_WDATA_PARITY_ERROR: Accumulated_PCB_wdata_parity_error
1 RWX ACCUMULATED_PCB_ADDRESS_PARITY_ERROR: Accumulated_PCB_address_parity_error
2 RWX ACCUMULATED_DL_RETURN_WDATA_PARITY_ERROR: Accumulated_DL_return_wdata_parity_error
3 RWX ACCUMULATED_DL_RETURN_P0_ERROR: Accumulated_DL_return_P0_error
4 RWX ACCUMULATED_UL_RDATA_PARITY_ERROR: Accumulated_UL_rdata_parity_error
5 RWX ACCUMULATED_UL_P0_ERROR: Accumulated_UL_P0_error
6 RWX ACCUMULATED_PARITY_ERROR_ON_INTERFACE_MACHINE: Accumulated_parity_error_on_interface_machine
7 RWX ACCUMULATED_PARITY_ERROR_ON_P2S_MACHINE: Accumulated_parity_error_on_p2s_machine
8 RWX ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULCCH: Accumulated_timeout_while_waiting_for_ULCCH
9 RWX ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN: Accumulated_timeout_while_waiting_for_DLDCH_return
10 RWX ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULDCH: Accumulated_timeout_while_waiting_for_ULDCH
11 RWX ACCUMULATED_PSCOM_LOCK_ERR: Accumulated_pscom_lock_err
12 RWX ACCUMULATED_PSCOM_PARALLEL_READ_WRITE_NVLD: Accumulated_pscom_parallel_read_write_nvld
13 RWX ACCUMULATED_PSCOM_PARALLEL_ADDR_INVALID: Accumulated_pscom_parallel_addr_invalid
14 RWX ACCUMULATED_PCB_COMMAND_PARITY_ERROR: Accumulated_PCB_command_parity_error
15 RWX ACCUMULATED_GENERAL_TIMEOUT: Accumulated_General_timeout
16 RWX ACCUMULATED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION: Accumulated_satellite_acknowledge_access_violation
17 RWX ACCUMULATED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER: Accumulated_satellite_acknowledge_invalid_register
18 RWX TRAPPED_PCB_WDATA_PARITY_ERROR: Trapped_PCB_wdata_parity_error
19 RWX TRAPPED_PCB_ADDRESS_PARITY_ERROR: Trapped_PCB_address_parity_error
20 RWX TRAPPED_DL_RETURN_WDATA_PARITY_ERROR: Trapped_DL_return_wdata_parity_error
21 RWX TRAPPED_DL_RETURN_P0_ERROR: Trapped_DL_return_P0_error
22 RWX TRAPPED_UL_RDATA_PARITY_ERROR: Trapped_UL_rdata_parity_error
23 RWX TRAPPED_UL_P0_ERROR: Trapped_UL_P0_error
24 RWX TRAPPED_PARITY_ERROR_ON_INTERFACE_MACHINE: Trapped_parity_error_on_interface_machine
25 RWX TRAPPED_PARITY_ERROR_ON_P2S_MACHINE: Trapped_parity_error_on_p2s_machine
26 RWX TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULCCH: Trapped_timeout_while_waiting_for_ULCCH
27 RWX TRAPPED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN: Trapped_timeout_while_waiting_for_DLDCH_return
28 RWX TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULDCH: Trapped_timeout_while_waiting_for_ULDCH
29 RWX TRAPPED_PSCOM_LOCK_ERR: Trapped_pscom_lock_err
30 RWX TRAPPED_PSCOM_PARALLEL_READ_WRITE_NVLD: Trapped_pscom_parallel_read_write_nvld
31 RWX TRAPPED_PSCOM_PARALLEL_ADDR_INVALID: Trapped_pscom_parallel_addr_invalid
32 RWX TRAPPED_PCB_COMMAND_PARITY_ERROR: Trapped_PCB_command_parity_error
33 RWX TRAPPED_GENERAL_TIMEOUT: Trapped_General_timeout
34 RWX TRAPPED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION: Trapped_satellite_acknowledge_access_violation
35 RWX TRAPPED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER: Trapped_satellite_acknowledge_invalid_register

PSCOMLE error mask register
Addr: 0000000003010002 (SCOM)
Name:TP.TCN1.N1.EPS.PSC.PSC.PSCOM_ERROR_MASK
Constant(s):PU_N1_PSCOM_ERROR_MASK
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:17TP.TCN1.N1.EPS.PSC.PSC.PSCOM_ERR_MASK_LT_INST.LATC.L2(0:17) [000000000000000000]
Bit(s)SCOM Dial: Description
0 RW MASK_PCB_WDATA_PARITY_ERROR: mask_PCB_wdata_parity_error
1 RW MASK_PCB_ADDRESS_PARITY_ERROR: mask_PCB_address_parity_error
2 RW MASK_DL_RETURN_WDATA_PARITY_ERROR: mask_DL_return_wdata_parity_error
3 RW MASK_DL_RETURN_P0_ERROR: mask_DL_return_P0_error
4 RW MASK_UL_RDATA_PARITY_ERROR: mask_UL_rdata_parity_error
5 RW MASK_UL_P0_ERROR: mask_UL_P0_error
6 RW MASK_PARITY_ERROR_ON_INTERFACE_MACHINE: mask_parity_error_on_interface_machine
7 RW MASK_PARITY_ERROR_ON_P2S_MACHINE: mask_parity_error_on_p2s_machine
8 RW MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH: mask_timeout_while_waiting_for_ULCCH
9 RW MASK_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN: mask_timeout_while_waiting_for_DLDCH_return
10 RW MASK_TIMEOUT_WHILE_WAITING_FOR_ULDCH: mask_timeout_while_waiting_for_ULDCH
11 RW MASK_PSCOM_LOCK_ERR: mask_pscom_lock_err
12 RW MASK_PSCOM_PARALLEL_READ_WRITE_NVLD: mask_pscom_parallel_read_write_nvld
13 RW MASK_PSCOM_PARALLEL_ADDR_INVALID: mask_pscom_parallel_addr_invalid
14 RW MASK_PCB_COMMAND_PARITY_ERROR: mask_PCB_command_parity_error
15 RW MASK_GENERAL_TIMEOUT: mask_general_timeout
16 RW MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION: mask_satellite_acknowledge_access_violation
17 RW MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER: mask_satellite_acknowledge_invalid_register

PSCOMLE Address Trap Register
Addr: 0000000003010003 (SCOM)
Name:TP.TCN1.N1.EPS.PSC.PSC.ADDR_TRAP_REG
Constant(s):PU_N1_ADDR_TRAP_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:17TP.TCN1.N1.EPS.PSC.PSC.ADDR_LAST_TRAP_LT_INST.LATC.L2(0:17) [000000000000000000]
18:30TP.TCN1.N1.EPS.PSC.PSC.FSM_STATE_CAPTURE_LT_0_INST.LATC.L2(0:12) [0000000000000]
31:34TP.TCN1.N1.EPS.PSC.PSC.SATELLITE_ACK_TRAP_LT_0_INST.LATC.L2(0:3) [0000]
35:38TP.TCN1.N1.EPS.PSC.PSC.PCB_REQ_MASTER_ADDR_TRAP_LT_INST.LATC.L2(0:3) [0000]
Bit(s)SCOM Dial: Description
0:15 ROX PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR: PCB_address_of_last_transaction_with_error
16 ROX PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR: PCB_read_notwrite_of_last_transaction_with_error
17 ROX RESERVED_ADDR_LAST_TRAP_LT: reserved_0
18:30 ROX SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR: Serial2Parallel_state_machine_at_time_of_error
31 ROX SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY: Satellite acknoledge bit: set to 1 if no parity error detected of Sat.No and Ack-bits
32 ROX SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR: set if write parity error detected by satellite
33 ROX SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION: set if invalid read or write access detected by satellite
34 ROX SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER: set if invalid register address detected by satellite
35:38 ROX LAST_MASTERID: MasterID of the last non-internal PSCOM transation

Ring Lock Enable Register
Addr: 0000000003010005 (SCOM)
Name:TP.TCN1.N1.EPS.PSC.PSC.WRITE_PROTECT_ENABLE_REG
Constant(s):PU_N1_WRITE_PROTECT_ENABLE_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1TP.TCN1.N1.EPS.PSC.PSC.WRITE_PROTECT_Q_INST.LATC.L2(0:1) [00]
Bit(s)SCOM Dial: Description
0 RW ENABLE_RING_LOCKING: General enable of ring locking upon write to specific ring
1 RW RESERVED_RING_LOCKING: reserved

WRITE PROTECT RINGS Register
Addr: 0000000003010006 (SCOM)
Name:TP.TCN1.N1.EPS.PSC.PSC.WRITE_PROTECT_RINGS_REG
Constant(s):PU_N1_WRITE_PROTECT_RINGS_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.PSC.PSC.WRITE_PROTECT_RINGS_Q_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RW WRITE_PROTECT_RINGS: write protect bit map for each ring

Atomic Lock Mask Register
Addr: 0000000003010007 (SCOM)
Name:TP.TCN1.N1.EPS.PSC.PSC.ATOMIC_LOCK_MASK_LATCH_REG
Constant(s):PU_N1_ATOMIC_LOCK_MASK_LATCH_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.PSC.PSC.ATOMIC_LOCK_ENABLE_MASK_Q_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RW ATOMIC_LOCK_MASK: bit mask for atomic locking on a ring-by-ring basis

Ring Fence Enable Mask Register
Addr: 0000000003010008 (SCOM)
Name:TP.TCN1.N1.EPS.PSC.PSC.RING_FENCE_MASK_LATCH_REG
Constant(s):PU_N1_RING_FENCE_MASK_LATCH_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
1:31TP.TCN1.N1.EPS.PSC.PSC.RING_FENCE_ENABLE_MASK_Q_INST.LATC.L2(1:31) [0000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RO constant=0b0
1:31 RW RING_FENCE_ENABLE_MASK: bit mask for ring fenceing on a ring-by-ring basis

Trace Array High Data Register
Addr: 0000000003010400 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA0_TR0_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA0.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010401 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA0_TR0_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA0.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA0.TR0.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA0.TR0.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA0.TR0.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA0.TR0.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA0.TR0.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA0.TR0.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010402 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA0_TR0_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA0.TR0.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010403 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA0_TR0_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA0.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010404 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA0_TR0_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010405 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA0_TR0_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR0.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA0.TR0.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010406 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA0_TR0_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR0.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA0.TR0.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010407 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA0_TR0_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR0.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA0.TR0.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010408 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA0_TR0_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR0.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA0.TR0.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010409 (SCOM)
Name:TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA0_TR0_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA0.TR0.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010440 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA0_TR1_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA0.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010441 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA0_TR1_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA0.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA0.TR1.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA0.TR1.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA0.TR1.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA0.TR1.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA0.TR1.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA0.TR1.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010442 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA0_TR1_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA0.TR1.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010443 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA0_TR1_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA0.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010444 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA0_TR1_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010445 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA0_TR1_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR1.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA0.TR1.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010446 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA0_TR1_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR1.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA0.TR1.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010447 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA0_TR1_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR1.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA0.TR1.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010448 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA0_TR1_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA0.TR1.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA0.TR1.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010449 (SCOM)
Name:TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA0_TR1_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA0.TR1.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010480 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA1_TR0_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA1.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010481 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA1_TR0_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA1.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA1.TR0.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA1.TR0.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA1.TR0.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA1.TR0.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA1.TR0.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA1.TR0.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010482 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA1_TR0_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA1.TR0.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010483 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA1_TR0_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA1.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010484 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA1_TR0_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010485 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA1_TR0_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR0.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA1.TR0.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010486 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA1_TR0_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR0.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA1.TR0.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010487 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA1_TR0_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR0.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA1.TR0.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010488 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA1_TR0_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR0.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA1.TR0.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010489 (SCOM)
Name:TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA1_TR0_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA1.TR0.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 00000000030104C0 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA1_TR1_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA1.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 00000000030104C1 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA1_TR1_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA1.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA1.TR1.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA1.TR1.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA1.TR1.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA1.TR1.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA1.TR1.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA1.TR1.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 00000000030104C2 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA1_TR1_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA1.TR1.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 00000000030104C3 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA1_TR1_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA1.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 00000000030104C4 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA1_TR1_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 00000000030104C5 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA1_TR1_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR1.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA1.TR1.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 00000000030104C6 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA1_TR1_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR1.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA1.TR1.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 00000000030104C7 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA1_TR1_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR1.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA1.TR1.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 00000000030104C8 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA1_TR1_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA1.TR1.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA1.TR1.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 00000000030104C9 (SCOM)
Name:TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA1_TR1_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA1.TR1.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010500 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA2_TR0_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA2.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010501 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA2_TR0_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA2.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA2.TR0.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA2.TR0.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA2.TR0.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA2.TR0.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA2.TR0.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA2.TR0.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010502 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA2_TR0_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA2.TR0.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010503 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA2_TR0_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA2.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010504 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA2_TR0_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010505 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA2_TR0_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR0.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA2.TR0.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010506 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA2_TR0_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR0.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA2.TR0.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010507 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA2_TR0_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR0.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA2.TR0.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010508 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA2_TR0_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR0.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA2.TR0.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010509 (SCOM)
Name:TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA2_TR0_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA2.TR0.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010540 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA2_TR1_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA2.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010541 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA2_TR1_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA2.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA2.TR1.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA2.TR1.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA2.TR1.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA2.TR1.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA2.TR1.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA2.TR1.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010542 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA2_TR1_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA2.TR1.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010543 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA2_TR1_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA2.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010544 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA2_TR1_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010545 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA2_TR1_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR1.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA2.TR1.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010546 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA2_TR1_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR1.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA2.TR1.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010547 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA2_TR1_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR1.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA2.TR1.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010548 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA2_TR1_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA2.TR1.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA2.TR1.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010549 (SCOM)
Name:TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA2_TR1_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA2.TR1.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010580 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA3_TR0_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA3.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010581 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA3_TR0_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA3.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA3.TR0.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA3.TR0.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA3.TR0.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA3.TR0.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA3.TR0.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA3.TR0.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010582 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA3_TR0_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA3.TR0.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010583 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA3_TR0_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA3.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010584 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA3_TR0_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010585 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA3_TR0_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR0.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA3.TR0.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010586 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA3_TR0_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR0.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA3.TR0.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010587 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA3_TR0_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR0.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA3.TR0.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010588 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA3_TR0_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR0.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA3.TR0.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010589 (SCOM)
Name:TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA3_TR0_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA3.TR0.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 00000000030105C0 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA3_TR1_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA3.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 00000000030105C1 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA3_TR1_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA3.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA3.TR1.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA3.TR1.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA3.TR1.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA3.TR1.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA3.TR1.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA3.TR1.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 00000000030105C2 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA3_TR1_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA3.TR1.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 00000000030105C3 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA3_TR1_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA3.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 00000000030105C4 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA3_TR1_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 00000000030105C5 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA3_TR1_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR1.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA3.TR1.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 00000000030105C6 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA3_TR1_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR1.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA3.TR1.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 00000000030105C7 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA3_TR1_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR1.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA3.TR1.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 00000000030105C8 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA3_TR1_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA3.TR1.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA3.TR1.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 00000000030105C9 (SCOM)
Name:TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA3_TR1_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA3.TR1.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010600 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA4_TR0_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA4.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010601 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA4_TR0_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA4.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA4.TR0.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA4.TR0.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA4.TR0.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA4.TR0.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA4.TR0.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA4.TR0.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010602 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA4_TR0_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA4.TR0.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010603 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA4_TR0_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA4.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010604 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA4_TR0_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010605 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA4_TR0_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR0.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA4.TR0.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010606 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA4_TR0_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR0.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA4.TR0.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010607 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA4_TR0_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR0.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA4.TR0.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010608 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA4_TR0_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR0.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA4.TR0.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010609 (SCOM)
Name:TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA4_TR0_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA4.TR0.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010640 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_HI_DATA_REG
Constant(s):PU_TCN1_TRA4_TR1_TRACE_HI_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA4.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010641 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_LO_DATA_REG
Constant(s):PU_TCN1_TRA4_TR1_TRACE_LO_DATA_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA4.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA4.TR1.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA4.TR1.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA4.TR1.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA4.TR1.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA4.TR1.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA4.TR1.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010642 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_TRCTRL_CONFIG
Constant(s):PU_TCN1_TRA4_TR1_TRACE_TRCTRL_CONFIG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA4.TR1.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010643 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_0
Constant(s):PU_TCN1_TRA4_TR1_TRACE_TRDATA_CONFIG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA4.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010644 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_1
Constant(s):PU_TCN1_TRA4_TR1_TRACE_TRDATA_CONFIG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010645 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_2
Constant(s):PU_TCN1_TRA4_TR1_TRACE_TRDATA_CONFIG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR1.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA4.TR1.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010646 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_3
Constant(s):PU_TCN1_TRA4_TR1_TRACE_TRDATA_CONFIG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR1.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA4.TR1.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010647 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_4
Constant(s):PU_TCN1_TRA4_TR1_TRACE_TRDATA_CONFIG_4
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR1.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA4.TR1.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010648 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_5
Constant(s):PU_TCN1_TRA4_TR1_TRACE_TRDATA_CONFIG_5
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA4.TR1.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA4.TR1.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010649 (SCOM)
Name:TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_9
Constant(s):PU_TCN1_TRA4_TR1_TRACE_TRDATA_CONFIG_9
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA4.TR1.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010680 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_HI_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA5.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010681 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_LO_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA5.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA5.TR0.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA5.TR0.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA5.TR0.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA5.TR0.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA5.TR0.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA5.TR0.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010682 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_TRCTRL_CONFIG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA5.TR0.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010683 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA5.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010684 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010685 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR0.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA5.TR0.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010686 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_3
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR0.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA5.TR0.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010687 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_4
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR0.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA5.TR0.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010688 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_5
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR0.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA5.TR0.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010689 (SCOM)
Name:TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_9
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA5.TR0.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 00000000030106C0 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_HI_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA5.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 00000000030106C1 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_LO_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA5.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA5.TR1.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA5.TR1.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA5.TR1.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA5.TR1.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA5.TR1.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA5.TR1.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 00000000030106C2 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_TRCTRL_CONFIG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA5.TR1.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 00000000030106C3 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA5.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 00000000030106C4 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 00000000030106C5 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR1.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA5.TR1.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 00000000030106C6 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_3
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR1.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA5.TR1.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 00000000030106C7 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_4
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR1.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA5.TR1.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 00000000030106C8 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_5
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA5.TR1.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA5.TR1.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 00000000030106C9 (SCOM)
Name:TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_9
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA5.TR1.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010700 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_HI_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA6.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010701 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_LO_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA6.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA6.TR0.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA6.TR0.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA6.TR0.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA6.TR0.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA6.TR0.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA6.TR0.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010702 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_TRCTRL_CONFIG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA6.TR0.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010703 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA6.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010704 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010705 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR0.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA6.TR0.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010706 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_3
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR0.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA6.TR0.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010707 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_4
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR0.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA6.TR0.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010708 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_5
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR0.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA6.TR0.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010709 (SCOM)
Name:TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_9
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA6.TR0.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010740 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_HI_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA6.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010741 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_LO_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA6.TR1.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA6.TR1.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA6.TR1.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA6.TR1.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA6.TR1.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA6.TR1.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA6.TR1.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010742 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_TRCTRL_CONFIG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA6.TR1.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010743 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA6.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010744 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR1.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010745 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR1.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA6.TR1.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010746 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_3
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR1.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA6.TR1.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010747 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_4
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR1.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA6.TR1.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010748 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_5
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA6.TR1.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA6.TR1.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010749 (SCOM)
Name:TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_9
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA6.TR1.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Trace Array High Data Register
Addr: 0000000003010780 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_HI_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA7.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX TRACE_HI_DATA: Trace Array Data 0:63

Trace Array Low Data Register
Addr: 0000000003010781 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_LO_DATA_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.TRA7.TR0.SAMP.TRACE_DATA_LT_INST.LATC.L2(64:95) [00000000000000000000000000000000]
32:41TP.TCN1.N1.TRA7.TR0.SAMP.TR_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
42:50TP.TCN1.N1.TRA7.TR0.SAMP.TR_LAST_BANK_LT_INST.LATC.L2(0:8) [000000000]
51TP.TCN1.N1.TRA7.TR0.SAMP.TR_LAST_BANK_VALID_LT_INST.LATC.L2(0) [0]
52TP.TCN1.N1.TRA7.TR0.SAMP.TR_WRITE_ON_RUN_LT_INST.LATC.L2(0) [0]
53TP.TCN1.N1.TRA7.TR0.SAMP.TR_RUN_LT_INST.LATC.L2(0) [0]
54:63TP.TCN1.N1.TRA7.TR0.SAMP.TR_HOLD_ADDRESS_LT_INST.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0:31 ROX TRACE_LO_DATA: Trace Array Data 64:95
32:41 ROX TRACE_ADDRESS: Trace Address
42:50 ROX TRACE_LAST_BANK: Trace Last Bank
51 ROX TRACE_LAST_BANK_VALID: Trace Last Bank Valid
52 ROX TRACE_WRITE_ON_RUN: Trace Write-On-Run indicator
53 ROX TRACE_RUNNING: Trace Run indicator
54:63 ROX TRACE_HOLD_ADDRESS: Trace Hold Address (pointing to last entry)

trace control configuration register
Addr: 0000000003010782 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_TRCTRL_CONFIG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TCN1.N1.TRA7.TR0.CTRL.SCOMABLE_0.TRCTRL_CONFIG_Q_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW STORE_ON_TRIG_MODE: enable store on trigger mode
1 RW WRITE_ON_RUN_MODE: NOT IMPLEMENTED, use TRACE_TRDATA_CONFIG_9 bit 0 instead: force unconditional write when trace_run
2:9 RW EXTEND_TRIG_MODE: counter value for extended trigger mode
10 RW BANK_MODE: enable bank mode
11 RW ENH_TRACE_MODE: Suppress writing timestamps in store on trigger mode
12:13 RW LOCAL_CLOCK_GATE_CONTROL: local clock gate control selection: x0 = normal clock gating; x1, = rd_act to trace array turned off
14:17 RW TRACE_SELECT_CONTROL: selector for 2 sets of external trace bus multiplexers
tra_mux0_sel(0:1) and tra_mux1_sel(0:1)
18 RW TRACE_RUN_HOLD_OFF: hold trace_off when trace_run input is inactive
19 ROX TRACE_RUN_STATUS: Actual current ORed status of trace_run inputs (trace_run from debug macro and unit logic)
20 RWX TRACE_RUN_STICKY: trace_run sticky bit, set by trace_run, reset by write to trace_control_reg
21 RW DISABLE_BANK_EDGE_DETECT: disable trace bank edge detect mode
22 RW DISABLE_SCOM_TRCTRL_TRARR_RD_ACT: disable constant rd_act
23 RW MASTER_CLOCK_ENABLE_INT: master clock enable switch
24:27 RW TRACE_CONTROL_UNUSED: unused

trdata configuration register 0
Addr: 0000000003010783 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.TRA7.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW CMP_MSK_LT_B_0_TO_63: Trace data compression mask for trace bus bits 0 to 63. '1' means record an entry when this bit changes, '0' means ignore this bit. Setting the mask to all zeros will result in no trace entries being recorded just from bit changes.

trdata configuration register 1
Addr: 0000000003010784 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA7.TR0.DATA.SCOMABLE_CMP_MSK.CMP_MSK_INITONE_Q_0_INST.LATC.L2(64:87) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW CMP_MSK_LT_B_64_TO_87: Trace data compression mask for bits 64 to 87. See TRACE_TRDATA_CONFIG_0 for meaning of bits.

trdata configuration register 2
Addr: 0000000003010785 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA7.TR0.DATA.PATTERN_MISR.PATA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA7.TR0.DATA.PATTERN_MISR.PATB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNA: pattern_match_pata_0_to_23: pattern A for trace data compare function
24:47 RW PATTERNB: pattern_match_patb_0_to_23: pattern B for trace data compare function

trdata configuration register 3
Addr: 0000000003010786 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_3
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA7.TR0.DATA.PATTERN_MISR.PATC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA7.TR0.DATA.PATTERN_MISR.PATD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW PATTERNC: pattern_match_patc_0_to_23: pattern C for trace data compare function
24:47 RW PATTERND: pattern_match_patd_0_to_23: pattern D for trace data compare function

trdata configuration register 4
Addr: 0000000003010787 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_4
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA7.TR0.DATA.PATTERN_MISR.MSKA_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA7.TR0.DATA.PATTERN_MISR.MSKB_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKA: mska: mask bits for pattern A trace data compare function: set to 1 to mask off individual bits
24:47 RW MASKB: mskb: mask bits for pattern B trace data compare function: set to 1 to mask off individual bits

trdata configuration register 5
Addr: 0000000003010788 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_5
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.TRA7.TR0.DATA.PATTERN_MISR.MSKC_Q_INST.LATC.L2(0:23) [000000000000000000000000]
24:47TP.TCN1.N1.TRA7.TR0.DATA.PATTERN_MISR.MSKD_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RW MASKC: mskc
24:47 RW MASKD: mskd

trdata configuration register 9
Addr: 0000000003010789 (SCOM)
Name:TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_9
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37TP.TCN1.N1.TRA7.TR0.DATA.SCOMABLE_CTRL.TRDATA_SCOM_CTRL_Q_0_INST.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DISABLE_COMPRESSION: Disable Trace Data Compression (store data every cycle)
1 RW ERROR_BIT_COMPRESSION_CARE_MASK: Take into account (care about) changes in the Error bit for trace data compression (default = 0)
2:3 RW MATCHA_MUXSEL: Match PATTERNA against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
4:5 RW MATCHB_MUXSEL: Match PATTERNB against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
6:7 RW MATCHC_MUXSEL: Match PATTERNC against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
8:9 RW MATCHD_MUXSEL: Match PATTERND against:
0b00 = Trace bus bits (00:23)
0b01 = Trace bus bits (24:47)
0b10 = Trace bus bits (48:71)
0b11 = Trace bus bits (72:87) | 8 zeroes

Dial enums:
BITS_00_TO_23=>0b00
BITS_24_TO_47=>0b01
BITS_48_TO_71=>0b10
BITS_72_TO_87_Z8=>0b11
10:13 RW TRIG0_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG0_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes
14:17 RW TRIG0_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG0_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG0
18:21 RW TRIG1_OR_MASK: NOTE: the OR of all selected MATCHes is ORd with result of TRIG1_AND
0b1XXX selects MATCHA OR
0bX1XX selects MATCHB OR
0bXX1X selects MATCHC OR
0bXXX1 selects MATCHD OR
0b0000 selects to not OR any MATCHes to form TRIG1
22:25 RW TRIG1_AND_MASK: NOTE: the AND of following selected MATCHes is ORd with result of TRIG1_OR
0b1XXX selects MATCHA AND
0bX1XX selects MATCHB AND
0bXX1X selects MATCHC AND
0bXXX1 selects MATCHD AND
0b0000 selects to not AND any MATCHes together to form TRIG1
26 RW TRIG0_NOT_MODE: Invert TRIG0 before using it
27 RW TRIG1_NOT_MODE: Invert TRIG1 before using it
28:31 RW MATCH_NOT_MODE: Invert the match polarity before using it to form a TRIGger
0b1000 inverts MATCHA
0b0100 inverts MATCHB
0b0010 inverts MATCHC
0b0001 inverts MATCHD
32 RW ERROR_CMP_MASK: 0 to compare the trace error bit, 1 to ignore it and always match. No, we don't think this makes sense either.
33 RW ERROR_CMP_PATTERN: Value to compare trace error against
34 RW TRIG0_ERR_CMP: Include (via OR) error comparison result into trig0
35 RW TRIG1_ERR_CMP: Include (via OR) error comparison result into trig1
36 RW DD1_STRETCH_TRIGGER_PULSES: (DD1 workaround) Stretch trigger output pulses to two clocks. Must be enabled for MCFAST and L2FAST traces.
37 RW spare_lt

Debug macro configuration register 0 for config component
Addr: 00000000030107C0 (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_MODE_REG
Constant(s):PU_N1_DBG_MODE_REG
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#0.LAT.DBG_REG_MODE.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#1.LAT.DBG_REG_MODE.LATC.L2(0) [0]
2TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#2.LAT.DBG_REG_MODE.LATC.L2(0) [0]
3TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#3.LAT.DBG_REG_MODE.LATC.L2(0) [0]
4TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#4.LAT.DBG_REG_MODE.LATC.L2(0) [0]
5TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#5.LAT.DBG_REG_MODE.LATC.L2(0) [0]
6TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#6.LAT.DBG_REG_MODE.LATC.L2(0) [0]
7TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#7.LAT.DBG_REG_MODE.LATC.L2(0) [0]
8TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#8.LAT.DBG_REG_MODE.LATC.L2(0) [0]
9TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#9.LAT.DBG_REG_MODE.LATC.L2(0) [0]
10TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#10.LAT.DBG_REG_MODE.LATC.L2(0) [0]
11TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#11.LAT.DBG_REG_MODE.LATC.L2(0) [0]
12TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#12.LAT.DBG_REG_MODE.LATC.L2(0) [0]
13TP.TCN1.N1.EPS.DBG.CONFIG.DBG_LAT_REQ#13.LAT.DBG_REG_MODE.LATC.L2(0) [0]
16TP.TCN1.N1.EPS.DBG.DBG_PSC_SM_STATUS_INT(0) [0]
17:18TP.TCN1.N1.EPS.DBG.BKEND.TRACE_STATE_LAT_INST.LATC.L2(0:1) [00]
19TP.TCN1.N1.EPS.DBG.BKEND.TRACE_FREEZE_LT_INST.LATC.L2(0) [0]
20:31TP.TCN1.N1.EPS.DBG.BKEND.CONDITION_HISTORY_Q_INST.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0:2 RW GLB_BRCST_MODE: global_broadcast_mode (0 to 2):
100: dbg_trace_run & dbg_trace_freeze
101: pc_tcdbg_trace_run_fncd & dbg_trace_freeze
110: dbg_triggers_out(0 to 1)
111: pc_tcdbg_triggers(0 to 1) (from core)

glb_brcst_mode
3:5 RW TRACE_SEL_MODE: Select source for trace_run and bank
001: core trace run & bank
010: tp broadcast run & 0
011: tc_dbg_inter_brcst latched
else: dbg_trace_run & dbg_trace_bank

trace_sel_mode
6:7 RW TRIG_SEL_MODE: Select source for tcdbg_trigger(0)
10: global broadcast
11: pc_tcdbg_trigger (from core)
else: dbg_triggers_out(0:1)

trig_sel_mode
8 RW STOP_ON_XSTOP_SELECTION: enable trace stop on checkstop
stop_on_xstop_selection
9 RW STOP_ON_RECOV_ERR_SELECTION: enabel trace stop on recoverable error
stop_on_recov_err_selection
10 RW STOP_ON_SPATTN_SELECTION: enable trace stop on special attention
stop_on_spattn_selection
11 RW STOP_ON_HOSTATTN_SELECTION: enable trace stop on host attention
stop_on_hostattn_selection
12 RW FREEZE_SEL_MODE: select freeze source:
0: local debug freeze
1: via broadcast: tp_tcdbg_glb_brcst(1)

master_clock_enable
13 RW MASTER_CLOCK_ENABLE: master_clock_enable for debug macro
14:15 RO constant=0b00
16 ROX trace_run_on
trace_run_status
17:18 ROX TRACE_RUN_STATUS: 00 is stopped, 01 is run, 10 is run-n, 11 is wait-n

stopped_00_running_01_runn_10_waitn_11_status
19 ROX IS_FROZEN_STATUS: 1 is frozen (needs reset)

is_frozen_status
20:22 ROX INST1_CONDITION_HISTORY_STATUS: Shows which condition was triggered, 1xx is condition1, x1x is condition2 or 3, xx1 is condition2 timeout
Shows last condition triggered before last trace_run activated (accumulate_history = 0) or accumulated conditions (accumulate_history = 1)

inst1_condition_history_status
23:25 ROX INST2_CONDITION_HISTORY_STATUS: Shows which condition was triggered, 1xx is condition1, x1x is condition2 or 3, xx1 is condition2 timeout
Shows last condition triggered before last trace_run activated (accumulate_history = 0) or accumulated conditions (accumulate_history = 1)

inst2_condition_history_status
26:31 ROX unused
unused
32:63 RO constant=0b00000000000000000000000000000000

Debug macro configuration register 1 for front end 1 componet
Addr: 00000000030107C1 (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_INST1_COND_REG_1
Constant(s):PU_N1_DBG_INST1_COND_REG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#0.LAT.COND_REG_MODE.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#1.LAT.COND_REG_MODE.LATC.L2(0) [0]
2TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#2.LAT.COND_REG_MODE.LATC.L2(0) [0]
3TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#3.LAT.COND_REG_MODE.LATC.L2(0) [0]
4TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#4.LAT.COND_REG_MODE.LATC.L2(0) [0]
5TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#5.LAT.COND_REG_MODE.LATC.L2(0) [0]
6TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#6.LAT.COND_REG_MODE.LATC.L2(0) [0]
7TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#7.LAT.COND_REG_MODE.LATC.L2(0) [0]
8TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#8.LAT.COND_REG_MODE.LATC.L2(0) [0]
9TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#9.LAT.COND_REG_MODE.LATC.L2(0) [0]
10TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#10.LAT.COND_REG_MODE.LATC.L2(0) [0]
11TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#11.LAT.COND_REG_MODE.LATC.L2(0) [0]
12TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#12.LAT.COND_REG_MODE.LATC.L2(0) [0]
13TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#13.LAT.COND_REG_MODE.LATC.L2(0) [0]
14TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#14.LAT.COND_REG_MODE.LATC.L2(0) [0]
15TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#15.LAT.COND_REG_MODE.LATC.L2(0) [0]
16TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#16.LAT.COND_REG_MODE.LATC.L2(0) [0]
17TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#17.LAT.COND_REG_MODE.LATC.L2(0) [0]
18TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#18.LAT.COND_REG_MODE.LATC.L2(0) [0]
19TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#19.LAT.COND_REG_MODE.LATC.L2(0) [0]
20TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#20.LAT.COND_REG_MODE.LATC.L2(0) [0]
21TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#21.LAT.COND_REG_MODE.LATC.L2(0) [0]
22TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#22.LAT.COND_REG_MODE.LATC.L2(0) [0]
23TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#23.LAT.COND_REG_MODE.LATC.L2(0) [0]
24TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#24.LAT.COND_REG_MODE.LATC.L2(0) [0]
25TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#25.LAT.COND_REG_MODE.LATC.L2(0) [0]
26TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#26.LAT.COND_REG_MODE.LATC.L2(0) [0]
27TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#27.LAT.COND_REG_MODE.LATC.L2(0) [0]
28TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#28.LAT.COND_REG_MODE.LATC.L2(0) [0]
29TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#29.LAT.COND_REG_MODE.LATC.L2(0) [0]
30TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#30.LAT.COND_REG_MODE.LATC.L2(0) [0]
31TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#31.LAT.COND_REG_MODE.LATC.L2(0) [0]
32TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#32.LAT.COND_REG_MODE.LATC.L2(0) [0]
33TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#33.LAT.COND_REG_MODE.LATC.L2(0) [0]
34TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#34.LAT.COND_REG_MODE.LATC.L2(0) [0]
35TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#35.LAT.COND_REG_MODE.LATC.L2(0) [0]
36TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#36.LAT.COND_REG_MODE.LATC.L2(0) [0]
37TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#37.LAT.COND_REG_MODE.LATC.L2(0) [0]
38TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#38.LAT.COND_REG_MODE.LATC.L2(0) [0]
39TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#39.LAT.COND_REG_MODE.LATC.L2(0) [0]
40TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#40.LAT.COND_REG_MODE.LATC.L2(0) [0]
41TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#41.LAT.COND_REG_MODE.LATC.L2(0) [0]
42TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#42.LAT.COND_REG_MODE.LATC.L2(0) [0]
43TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#43.LAT.COND_REG_MODE.LATC.L2(0) [0]
44TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#44.LAT.COND_REG_MODE.LATC.L2(0) [0]
45TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#45.LAT.COND_REG_MODE.LATC.L2(0) [0]
46TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#46.LAT.COND_REG_MODE.LATC.L2(0) [0]
47TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#47.LAT.COND_REG_MODE.LATC.L2(0) [0]
48TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#48.LAT.COND_REG_MODE.LATC.L2(0) [0]
49TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#49.LAT.COND_REG_MODE.LATC.L2(0) [0]
50TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#50.LAT.COND_REG_MODE.LATC.L2(0) [0]
51TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#51.LAT.COND_REG_MODE.LATC.L2(0) [0]
52TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#52.LAT.COND_REG_MODE.LATC.L2(0) [0]
53TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#53.LAT.COND_REG_MODE.LATC.L2(0) [0]
54TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#54.LAT.COND_REG_MODE.LATC.L2(0) [0]
55TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#55.LAT.COND_REG_MODE.LATC.L2(0) [0]
56TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#56.LAT.COND_REG_MODE.LATC.L2(0) [0]
57TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#57.LAT.COND_REG_MODE.LATC.L2(0) [0]
58TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#58.LAT.COND_REG_MODE.LATC.L2(0) [0]
59TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#59.LAT.COND_REG_MODE.LATC.L2(0) [0]
60TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#60.LAT.COND_REG_MODE.LATC.L2(0) [0]
61TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#61.LAT.COND_REG_MODE.LATC.L2(0) [0]
62TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#62.LAT.COND_REG_MODE.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:7 RW INST1_COND1_SEL_A: Multiplexer for cond1_trig_in(0)
000 select constant 0
001 select constant 1
-- CONDITION FEEDBACK --
002 select inst1_dbg_cond1
003 select inst1_dbg_cond2
004 select inst1_dbg_cond3
005 select inst1_dbg_cond2timeout
006 select inst2_dbg_cond1
007 select inst2_dbg_cond2
008 select inst2_dbg_cond3
009 select inst2_dbg_cond2timeout
010 select inst3_dbg_cond1 – unused, tied down
011 select inst3_dbg_cond2 – unused, tied down
012 select inst3_dbg_cond3 – unused, tied down
013 select inst3_dbg_cond2timeout – unused, tied down
014 select inst4_dbg_cond1 – unused, tied down
015 select inst4_dbg_cond2 – unused, tied down
016 select inst4_dbg_cond3 – unused, tied down
017 select inst4_dbg_cond2timeout – unused, tied down
018 select inst1_dbg_trig_sp
019 select inst2_dbg_trig_sp
020 select inst3_dbg_trig_sp – unused, tied down
021 select inst4_dbg_trig_sp – unused, tied down
022 select tctrc_tcdbg_trigger_a(0)
023 select tctrc_tcdbg_trigger_b(0)
024 select tctrc_tcdbg_trigger_a(0) and tctrc_tcdbg_trigger_b(0)
025 select tctrc_tcdbg_trigger_a(1)
026 select tctrc_tcdbg_trigger_b(1)
027 select tctrc_tcdbg_trigger_a(1) and tctrc_tcdbg_trigger_b(1)
028 select tctrc_tcdbg_trigger_a(2)
029 select tctrc_tcdbg_trigger_b(2)
030 select tctrc_tcdbg_trigger_a(2) and tctrc_tcdbg_trigger_b(2)
031 select tctrc_tcdbg_trigger_a(3)
032 select tctrc_tcdbg_trigger_b(3)
033 select tctrc_tcdbg_trigger_a(3) and tctrc_tcdbg_trigger_b(3)
034 select tctrc_tcdbg_trigger_a(4)
035 select tctrc_tcdbg_trigger_b(4)
036 select tctrc_tcdbg_trigger_a(4) and tctrc_tcdbg_trigger_b(4)
037 select tctrc_tcdbg_trigger_a(5)
038 select tctrc_tcdbg_trigger_b(5)
039 select tctrc_tcdbg_trigger_a(5) and tctrc_tcdbg_trigger_b(5)
040 select tctrc_tcdbg_trigger_a(6)
041 select tctrc_tcdbg_trigger_b(6)
042 select tctrc_tcdbg_trigger_a(6) and tctrc_tcdbg_trigger_b(6)
043 select tctrc_tcdbg_trigger_a(7)
044 select tctrc_tcdbg_trigger_b(7)
045 select tctrc_tcdbg_trigger_a(7) and tctrc_tcdbg_trigger_b(7)
046 select tctrc_tcdbg_trigger_a(8)
047 select tctrc_tcdbg_trigger_b(8)
048 select tctrc_tcdbg_trigger_a(8) and tctrc_tcdbg_trigger_b(8)
049 select tctrc_tcdbg_trigger_a(9)
050 select tctrc_tcdbg_trigger_b(9)
051 select tctrc_tcdbg_trigger_a(9) and tctrc_tcdbg_trigger_b(9)
052 select tctrc_tcdbg_trigger_a(10)
053 select tctrc_tcdbg_trigger_b(10)
054 select tctrc_tcdbg_trigger_a(10) and tctrc_tcdbg_trigger_b(10)
055 select tctrc_tcdbg_trigger_a(11)
056 select tctrc_tcdbg_trigger_b(11)
057 select tctrc_tcdbg_trigger_a(11) and tctrc_tcdbg_trigger_b(11)
058 select tctrc_tcdbg_trigger_a(12)
059 select tctrc_tcdbg_trigger_b(12)
060 select tctrc_tcdbg_trigger_a(12) and tctrc_tcdbg_trigger_b(12)
061 select tctrc_tcdbg_trigger_a(13)
062 select tctrc_tcdbg_trigger_b(13)
063 select tctrc_tcdbg_trigger_a(13) and tctrc_tcdbg_trigger_b(13)
064 select tctrc_tcdbg_trigger_a(14)
065 select tctrc_tcdbg_trigger_b(14)
066 select tctrc_tcdbg_trigger_a(14) and tctrc_tcdbg_trigger_b(14)
-- LOGIC (UNIT) TRIGGERS --
EP: 0:3 L3C0, 4:7 L3C1, 8:9 GX, 10 TP (hang), 11 spare, 12:13 MCA, 14:15 spare
ES: 0:4 L4C, 5:6 L4F, 7:8 TPTOD, 9 TP (hang), 10:15 spare
067 select logic_trigger_in(0)
068 select logic_trigger_in(1)
069 select logic_trigger_in(2)
070 select logic_trigger_in(3)
071 select logic_trigger_in(4)
072 select logic_trigger_in(5)
073 select logic_trigger_in(6)
074 select logic_trigger_in(7)
075 select logic_trigger_in(8)
076 select logic_trigger_in(9)
077 select logic_trigger_in(10)
078 select logic_trigger_in(11)
079 select logic_trigger_in(12)
080 select logic_trigger_in(13)
081 select logic_trigger_in(14)
082 select logic_trigger_in(15)
083 select pc_tcdbg_trigger(0)
084 select pc_tcdbg_trigger(1)
085 select tctrc_tcdbg_glb_brcst(0)
086 select tctrc_tcdbg_glb_brcst(1)
087 select xstop_err
088 select recov_err
089 select spattn
090 select hostattn
091 select fir_dbg_local_xstop_err
092 select tc_dbg_inter_brcst(0)
093 select tc_dbg_inter_brcst(1)
-- CORE TRIGGERS (EP chip only) --
Note: set core_slave_mode to honor ec[0:5]_tc_trace_run
094 select core trigger 0: any rising edge of ec[0:5]_tc_trace_run(0)
095 select core trigger 1: any rising edge of ec[0:5]_tc_trace_run(1)
096 select core trigger 2: any falling edge of ec[0:5]_tc_trace_run(0)
097 select core trigger 3: any falling edge of ec[0:5]_tc_trace_run(1)
098 select glb_trig_or_trace_in(0)
099 select glb_trig_or_trace_in(1)
100 select core_local_brcst_trc(0)
101 select core_local_brcst_trc(1)
102 select glb_freeze_brcst_rec(0)
103 select trig_2_extern_in(0)
104 select trig_2_extern_in(1)
105 select dbg_triggers_out(2)
106 select dbg_triggers_out(3)
107 select dbg_triggers_out(4)
108 select dbg_triggers_out(5)
109 select dbg_triggers_out(6)
100 select tcdbg_trigger_in(0)
111 select tcdbg_trigger_in(1)
8:15 RW INST1_COND1_SEL_B: Multiplexer for cond1_trig_in(1)
Selection as cond1_trig_in(0)
16:23 RW INST1_COND2_SEL_A: Multiplexer for cond2_trig_in(0)
Selection as cond1_trig_in(0)
24:31 RW INST1_COND2_SEL_B: Multiplexer for cond2_trig_in(1)
Selection as cond1_trig_in(0)
32 RW INST1_C1_INAROW_MODE: front end instance 1 c1_inarow_mode
33 RW INST1_AND_TRIGGER_MODE1: front end instance 1 and trigger mode condition1
34 RW INST1_NOT_TRIGGER_MODE1: front end instance 1 inverted trigger mode condition1
35 RW INST1_EDGE_TRIGGER_MODE1: front end instance 1 edge trigger mode condition1
36:38 RWX INST1_UNUSED_1: UNUSED
39 RW INST1_C2_INAROW_MODE: front end instance 1 Counter 2 in-a-rwo mode
40 RW INST1_AND_TRIGGER_MODE2: front end instance 1 and trigger mode2
41 RW INST1_NOT_TRIGGER_MODE2: front end instance 1 inverted (not) trigger
42 RW INST1_EDGE_TRIGGER_MODE2: front end instance 1edge trigger
43:45 RWX INST1_UNUSED_2: UNUSED
46 RW INST1_COND3_ENABLE_RESET: front end instance 1 condition3 enable
47 RW INST1_EXACT_TO_MODE: front end instance 1 exact timeout mode
48 RW INST1_RESET_C2TIMER_ON_C1: front end instance 1 reset condition2 timer on condition1
49 RW INST1_RESET_C3_ON_C0: front end instance 1 reset condition3 on condition0
50 RW INST1_SLOW_TO_MODE: front end instance 1 slow timeout mode
51 RW INST1_EXACT_RESET_C3_ON_TO: front end instance 1 exact reset condition3 on timeout
52:55 RW INST1_C1_COUNT_LT: inst1 condition1 counter compare value
56:59 RW INST1_C2_COUNT_LT: inst1 condition2 counter compare value
60:62 RW INST1_RESET_C3_SELECT: front end instance 1: reset condition3 for reset_c3_on_c0
0b100: dbg_cross_couple_triggers(4)
0b101: dbg_cross_couple_triggers(12)
0b110: dbg_cross_couple_triggers(20)
0b111: dbg_cross_couple_triggers(28)

Debug macro configuration register 2 for fronte end 1 component
Addr: 00000000030107C2 (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_INST1_COND_REG_2
Constant(s):PU_N1_DBG_INST1_COND_REG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#64.LAT.COND_REG_MODE.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#65.LAT.COND_REG_MODE.LATC.L2(0) [0]
2TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#66.LAT.COND_REG_MODE.LATC.L2(0) [0]
3TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#67.LAT.COND_REG_MODE.LATC.L2(0) [0]
4TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#68.LAT.COND_REG_MODE.LATC.L2(0) [0]
5TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#69.LAT.COND_REG_MODE.LATC.L2(0) [0]
6TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#70.LAT.COND_REG_MODE.LATC.L2(0) [0]
7TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#71.LAT.COND_REG_MODE.LATC.L2(0) [0]
8TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#72.LAT.COND_REG_MODE.LATC.L2(0) [0]
9TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#73.LAT.COND_REG_MODE.LATC.L2(0) [0]
10TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#74.LAT.COND_REG_MODE.LATC.L2(0) [0]
11TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#75.LAT.COND_REG_MODE.LATC.L2(0) [0]
12TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#76.LAT.COND_REG_MODE.LATC.L2(0) [0]
13TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#77.LAT.COND_REG_MODE.LATC.L2(0) [0]
14TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#78.LAT.COND_REG_MODE.LATC.L2(0) [0]
15TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#79.LAT.COND_REG_MODE.LATC.L2(0) [0]
16TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#80.LAT.COND_REG_MODE.LATC.L2(0) [0]
17TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#81.LAT.COND_REG_MODE.LATC.L2(0) [0]
18TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#82.LAT.COND_REG_MODE.LATC.L2(0) [0]
19TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#83.LAT.COND_REG_MODE.LATC.L2(0) [0]
20TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#84.LAT.COND_REG_MODE.LATC.L2(0) [0]
21TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#85.LAT.COND_REG_MODE.LATC.L2(0) [0]
22TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#86.LAT.COND_REG_MODE.LATC.L2(0) [0]
23TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#87.LAT.COND_REG_MODE.LATC.L2(0) [0]
24TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#88.LAT.COND_REG_MODE.LATC.L2(0) [0]
25TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#89.LAT.COND_REG_MODE.LATC.L2(0) [0]
26TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#90.LAT.COND_REG_MODE.LATC.L2(0) [0]
27TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#91.LAT.COND_REG_MODE.LATC.L2(0) [0]
28TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#92.LAT.COND_REG_MODE.LATC.L2(0) [0]
29TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#93.LAT.COND_REG_MODE.LATC.L2(0) [0]
30TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#94.LAT.COND_REG_MODE.LATC.L2(0) [0]
31TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#95.LAT.COND_REG_MODE.LATC.L2(0) [0]
32TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#96.LAT.COND_REG_MODE.LATC.L2(0) [0]
33TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#97.LAT.COND_REG_MODE.LATC.L2(0) [0]
34TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#98.LAT.COND_REG_MODE.LATC.L2(0) [0]
35TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#99.LAT.COND_REG_MODE.LATC.L2(0) [0]
36TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#100.LAT.COND_REG_MODE.LATC.L2(0) [0]
37TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#101.LAT.COND_REG_MODE.LATC.L2(0) [0]
38TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#102.LAT.COND_REG_MODE.LATC.L2(0) [0]
39TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#103.LAT.COND_REG_MODE.LATC.L2(0) [0]
40TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#104.LAT.COND_REG_MODE.LATC.L2(0) [0]
41TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#105.LAT.COND_REG_MODE.LATC.L2(0) [0]
42TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#106.LAT.COND_REG_MODE.LATC.L2(0) [0]
43TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#0.LAT_REQ#107.LAT.COND_REG_MODE.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:4 RW INST1_CROSS_COUPLE_SELECT_1_A: Cross coupling is the same of all selectors:
00000 - selects inst1_cond1_trig_a
00001 - selects inst1_cond1_trig_b
00010 - selects inst1_cond2_trig_a
00011 - selects inst1_cond2_trig_b
00100 - selects inst1_condition1
00101 - selects inst1_condition2
00110 - selects inst1_condition3
00111 - selects inst1_cond2_timeout
01000 - selects inst2_cond1_trig_a
01001 - selects inst2_cond1_trig_b
01010 - selects inst2_cond2_trig_a
01011 - selects inst2_cond2_trig_b
01100 - selects inst2_condition1
01101 - selects inst2_condition2
01110 - selects inst2_condition3
01111 - selects inst2_cond2_timeout
10000 - selects inst3_cond1_trig_a
10001 - selects inst3_cond1_trig_b
10010 - selects inst3_cond2_trig_a
10011 - selects inst3_cond2_trig_b
10100 - selects inst3_condition1
10101 - selects inst3_condition2
10110 - selects inst3_condition3
10111 - selects inst3_cond2_timeout
11000 - selects inst4_cond1_trig_a
11001 - selects inst4_cond1_trig_b
11010 - selects inst4_cond2_trig_a
11011 - selects inst4_cond2_trig_b
11100 - selects inst4_condition1
11101 - selects inst4_condition2
11110 - selects inst4_condition3
11111 - selects inst4_cond2_timeout
5:9 RW INST1_CROSS_COUPLE_SELECT_1_B: inst1_cross_couple_select_1_b
10:14 RW INST1_CROSS_COUPLE_SELECT_2_A: inst1_cross_couple_select_2_a
15:19 RW INST1_CROSS_COUPLE_SELECT_2_B: inst1_cross_couple_select_2_b
20:43 RW INST1_TO_CMP_LT: compare value for special counter sp_cnt_lt in debug component 1

Addr: 00000000030107C3 (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_INST1_COND_REG_3
Constant(s):PU_N1_DBG_INST1_COND_REG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
Bit(s)SCOM Dial: Description
0:63 RO constant=0b0000000000000000000000000000000000000000000000000000000000000000

Debug macro configuration register 1 for front end 1 componet
Addr: 00000000030107C4 (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_INST2_COND_REG_1
Constant(s):PU_N1_DBG_INST2_COND_REG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#0.LAT.COND_REG_MODE.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#1.LAT.COND_REG_MODE.LATC.L2(0) [0]
2TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#2.LAT.COND_REG_MODE.LATC.L2(0) [0]
3TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#3.LAT.COND_REG_MODE.LATC.L2(0) [0]
4TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#4.LAT.COND_REG_MODE.LATC.L2(0) [0]
5TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#5.LAT.COND_REG_MODE.LATC.L2(0) [0]
6TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#6.LAT.COND_REG_MODE.LATC.L2(0) [0]
7TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#7.LAT.COND_REG_MODE.LATC.L2(0) [0]
8TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#8.LAT.COND_REG_MODE.LATC.L2(0) [0]
9TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#9.LAT.COND_REG_MODE.LATC.L2(0) [0]
10TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#10.LAT.COND_REG_MODE.LATC.L2(0) [0]
11TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#11.LAT.COND_REG_MODE.LATC.L2(0) [0]
12TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#12.LAT.COND_REG_MODE.LATC.L2(0) [0]
13TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#13.LAT.COND_REG_MODE.LATC.L2(0) [0]
14TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#14.LAT.COND_REG_MODE.LATC.L2(0) [0]
15TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#15.LAT.COND_REG_MODE.LATC.L2(0) [0]
16TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#16.LAT.COND_REG_MODE.LATC.L2(0) [0]
17TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#17.LAT.COND_REG_MODE.LATC.L2(0) [0]
18TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#18.LAT.COND_REG_MODE.LATC.L2(0) [0]
19TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#19.LAT.COND_REG_MODE.LATC.L2(0) [0]
20TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#20.LAT.COND_REG_MODE.LATC.L2(0) [0]
21TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#21.LAT.COND_REG_MODE.LATC.L2(0) [0]
22TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#22.LAT.COND_REG_MODE.LATC.L2(0) [0]
23TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#23.LAT.COND_REG_MODE.LATC.L2(0) [0]
24TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#24.LAT.COND_REG_MODE.LATC.L2(0) [0]
25TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#25.LAT.COND_REG_MODE.LATC.L2(0) [0]
26TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#26.LAT.COND_REG_MODE.LATC.L2(0) [0]
27TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#27.LAT.COND_REG_MODE.LATC.L2(0) [0]
28TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#28.LAT.COND_REG_MODE.LATC.L2(0) [0]
29TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#29.LAT.COND_REG_MODE.LATC.L2(0) [0]
30TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#30.LAT.COND_REG_MODE.LATC.L2(0) [0]
31TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#31.LAT.COND_REG_MODE.LATC.L2(0) [0]
32TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#32.LAT.COND_REG_MODE.LATC.L2(0) [0]
33TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#33.LAT.COND_REG_MODE.LATC.L2(0) [0]
34TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#34.LAT.COND_REG_MODE.LATC.L2(0) [0]
35TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#35.LAT.COND_REG_MODE.LATC.L2(0) [0]
36TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#36.LAT.COND_REG_MODE.LATC.L2(0) [0]
37TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#37.LAT.COND_REG_MODE.LATC.L2(0) [0]
38TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#38.LAT.COND_REG_MODE.LATC.L2(0) [0]
39TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#39.LAT.COND_REG_MODE.LATC.L2(0) [0]
40TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#40.LAT.COND_REG_MODE.LATC.L2(0) [0]
41TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#41.LAT.COND_REG_MODE.LATC.L2(0) [0]
42TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#42.LAT.COND_REG_MODE.LATC.L2(0) [0]
43TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#43.LAT.COND_REG_MODE.LATC.L2(0) [0]
44TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#44.LAT.COND_REG_MODE.LATC.L2(0) [0]
45TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#45.LAT.COND_REG_MODE.LATC.L2(0) [0]
46TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#46.LAT.COND_REG_MODE.LATC.L2(0) [0]
47TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#47.LAT.COND_REG_MODE.LATC.L2(0) [0]
48TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#48.LAT.COND_REG_MODE.LATC.L2(0) [0]
49TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#49.LAT.COND_REG_MODE.LATC.L2(0) [0]
50TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#50.LAT.COND_REG_MODE.LATC.L2(0) [0]
51TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#51.LAT.COND_REG_MODE.LATC.L2(0) [0]
52TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#52.LAT.COND_REG_MODE.LATC.L2(0) [0]
53TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#53.LAT.COND_REG_MODE.LATC.L2(0) [0]
54TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#54.LAT.COND_REG_MODE.LATC.L2(0) [0]
55TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#55.LAT.COND_REG_MODE.LATC.L2(0) [0]
56TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#56.LAT.COND_REG_MODE.LATC.L2(0) [0]
57TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#57.LAT.COND_REG_MODE.LATC.L2(0) [0]
58TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#58.LAT.COND_REG_MODE.LATC.L2(0) [0]
59TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#59.LAT.COND_REG_MODE.LATC.L2(0) [0]
60TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#60.LAT.COND_REG_MODE.LATC.L2(0) [0]
61TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#61.LAT.COND_REG_MODE.LATC.L2(0) [0]
62TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#62.LAT.COND_REG_MODE.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:7 RW INST2_COND1_SEL_A: Multiplexer for cond1_trig_in(0)
000 select constant 0
001 select constant 1
-- CONDITION FEEDBACK --
002 select inst1_dbg_cond1
003 select inst1_dbg_cond2
004 select inst1_dbg_cond3
005 select inst1_dbg_cond2timeout
006 select inst2_dbg_cond1
007 select inst2_dbg_cond2
008 select inst2_dbg_cond3
009 select inst2_dbg_cond2timeout
010 select inst3_dbg_cond1 – unused, tied down
011 select inst3_dbg_cond2 – unused, tied down
012 select inst3_dbg_cond3 – unused, tied down
013 select inst3_dbg_cond2timeout – unused, tied down
014 select inst4_dbg_cond1 – unused, tied down
015 select inst4_dbg_cond2 – unused, tied down
016 select inst4_dbg_cond3 – unused, tied down
017 select inst4_dbg_cond2timeout – unused, tied down
018 select inst1_dbg_trig_sp
019 select inst2_dbg_trig_sp
020 select inst3_dbg_trig_sp – unused, tied down
021 select inst4_dbg_trig_sp – unused, tied down
022 select tctrc_tcdbg_trigger_a(0)
023 select tctrc_tcdbg_trigger_b(0)
024 select tctrc_tcdbg_trigger_a(0) and tctrc_tcdbg_trigger_b(0)
025 select tctrc_tcdbg_trigger_a(1)
026 select tctrc_tcdbg_trigger_b(1)
027 select tctrc_tcdbg_trigger_a(1) and tctrc_tcdbg_trigger_b(1)
028 select tctrc_tcdbg_trigger_a(2)
029 select tctrc_tcdbg_trigger_b(2)
030 select tctrc_tcdbg_trigger_a(2) and tctrc_tcdbg_trigger_b(2)
031 select tctrc_tcdbg_trigger_a(3)
032 select tctrc_tcdbg_trigger_b(3)
033 select tctrc_tcdbg_trigger_a(3) and tctrc_tcdbg_trigger_b(3)
034 select tctrc_tcdbg_trigger_a(4)
035 select tctrc_tcdbg_trigger_b(4)
036 select tctrc_tcdbg_trigger_a(4) and tctrc_tcdbg_trigger_b(4)
037 select tctrc_tcdbg_trigger_a(5)
038 select tctrc_tcdbg_trigger_b(5)
039 select tctrc_tcdbg_trigger_a(5) and tctrc_tcdbg_trigger_b(5)
040 select tctrc_tcdbg_trigger_a(6)
041 select tctrc_tcdbg_trigger_b(6)
042 select tctrc_tcdbg_trigger_a(6) and tctrc_tcdbg_trigger_b(6)
043 select tctrc_tcdbg_trigger_a(7)
044 select tctrc_tcdbg_trigger_b(7)
045 select tctrc_tcdbg_trigger_a(7) and tctrc_tcdbg_trigger_b(7)
046 select tctrc_tcdbg_trigger_a(8)
047 select tctrc_tcdbg_trigger_b(8)
048 select tctrc_tcdbg_trigger_a(8) and tctrc_tcdbg_trigger_b(8)
049 select tctrc_tcdbg_trigger_a(9)
050 select tctrc_tcdbg_trigger_b(9)
051 select tctrc_tcdbg_trigger_a(9) and tctrc_tcdbg_trigger_b(9)
052 select tctrc_tcdbg_trigger_a(10)
053 select tctrc_tcdbg_trigger_b(10)
054 select tctrc_tcdbg_trigger_a(10) and tctrc_tcdbg_trigger_b(10)
055 select tctrc_tcdbg_trigger_a(11)
056 select tctrc_tcdbg_trigger_b(11)
057 select tctrc_tcdbg_trigger_a(11) and tctrc_tcdbg_trigger_b(11)
058 select tctrc_tcdbg_trigger_a(12)
059 select tctrc_tcdbg_trigger_b(12)
060 select tctrc_tcdbg_trigger_a(12) and tctrc_tcdbg_trigger_b(12)
061 select tctrc_tcdbg_trigger_a(13)
062 select tctrc_tcdbg_trigger_b(13)
063 select tctrc_tcdbg_trigger_a(13) and tctrc_tcdbg_trigger_b(13)
064 select tctrc_tcdbg_trigger_a(14)
065 select tctrc_tcdbg_trigger_b(14)
066 select tctrc_tcdbg_trigger_a(14) and tctrc_tcdbg_trigger_b(14)
-- LOGIC (UNIT) TRIGGERS --
EP: 0:3 L3C0, 4:7 L3C1, 8:9 GX, 10 TP (hang), 11 spare, 12:13 MCA, 14:15 spare
ES: 0:4 L4C, 5:6 L4F, 7:8 TPTOD, 9 TP (hang), 10:15 spare
067 select logic_trigger_in(0)
068 select logic_trigger_in(1)
069 select logic_trigger_in(2)
070 select logic_trigger_in(3)
071 select logic_trigger_in(4)
072 select logic_trigger_in(5)
073 select logic_trigger_in(6)
074 select logic_trigger_in(7)
075 select logic_trigger_in(8)
076 select logic_trigger_in(9)
077 select logic_trigger_in(10)
078 select logic_trigger_in(11)
079 select logic_trigger_in(12)
080 select logic_trigger_in(13)
081 select logic_trigger_in(14)
082 select logic_trigger_in(15)
083 select pc_tcdbg_trigger(0)
084 select pc_tcdbg_trigger(1)
085 select tctrc_tcdbg_glb_brcst(0)
086 select tctrc_tcdbg_glb_brcst(1)
087 select xstop_err
088 select recov_err
089 select spattn
090 select hostattn
091 select fir_dbg_local_xstop_err
092 select tc_dbg_inter_brcst(0)
093 select tc_dbg_inter_brcst(1)
-- CORE TRIGGERS (EP chip only) --
Note: set core_slave_mode to honor ec[0:5]_tc_trace_run
094 select core trigger 0: any rising edge of ec[0:5]_tc_trace_run(0)
095 select core trigger 1: any rising edge of ec[0:5]_tc_trace_run(1)
096 select core trigger 2: any falling edge of ec[0:5]_tc_trace_run(0)
097 select core trigger 3: any falling edge of ec[0:5]_tc_trace_run(1)
098 select glb_trig_or_trace_in(0)
099 select glb_trig_or_trace_in(1)
100 select core_local_brcst_trc(0)
101 select core_local_brcst_trc(1)
102 select glb_freeze_brcst_rec(0)
103 select trig_2_extern_in(0)
104 select trig_2_extern_in(1)
105 select dbg_triggers_out(2)
106 select dbg_triggers_out(3)
107 select dbg_triggers_out(4)
108 select dbg_triggers_out(5)
109 select dbg_triggers_out(6)
100 select tcdbg_trigger_in(0)
111 select tcdbg_trigger_in(1)
8:15 RW INST2_COND1_SEL_B: Multiplexer for cond1_trig_in(1)
Selection as cond1_trig_in(0)
16:23 RW INST2_COND2_SEL_A: Multiplexer for cond2_trig_in(0)
Selection as cond1_trig_in(0)
24:31 RW INST2_COND2_SEL_B: Multiplexer for cond2_trig_in(1)
Selection as cond1_trig_in(0)
32 RW INST2_C1_INAROW_MODE: front end instance 1 c1_inarow_mode
33 RW INST2_AND_TRIGGER_MODE1: front end instance 1 and trigger mode condition1
34 RW INST2_NOT_TRIGGER_MODE1: front end instance 1 inverted trigger mode condition1
35 RW INST2_EDGE_TRIGGER_MODE1: front end instance 1 edge trigger mode condition1
36:38 RWX INST2_UNUSED_1: UNUSED
39 RW INST2_C2_INAROW_MODE: front end instance 1 Counter 2 in-a-rwo mode
40 RW INST2_AND_TRIGGER_MODE2: front end instance 1 and trigger mode2
41 RW INST2_NOT_TRIGGER_MODE2: front end instance 1 inverted (not) trigger
42 RW INST2_EDGE_TRIGGER_MODE2: front end instance 1edge trigger
43:45 RWX INST2_UNUSED_2: UNUSED
46 RW INST2_COND3_ENABLE_RESET: front end instance 1 condition3 enable
47 RW INST2_EXACT_TO_MODE: front end instance 1 exact timeout mode
48 RW INST2_RESET_C2TIMER_ON_C1: front end instance 1 reset condition2 timer on condition1
49 RW INST2_RESET_C3_ON_C0: front end instance 1 reset condition3 on condition0
50 RW INST2_SLOW_TO_MODE: front end instance 1 slow timeout mode
51 RW INST2_EXACT_RESET_C3_ON_TO: front end instance 1 exact reset condition3 on timeout
52:55 RW INST2_C1_COUNT_LT: inst2 condition1 counter compare value
56:59 RW INST2_C2_COUNT_LT: inst2 condition2 counter compare value
60:62 RW INST2_RESET_C3_SELECT: front end instance 1: reset condition3 for reset_c3_on_c0
0b100: dbg_cross_couple_triggers(4)
0b101: dbg_cross_couple_triggers(12)
0b110: dbg_cross_couple_triggers(20)
0b111: dbg_cross_couple_triggers(28)

Debug macro configuration register 2 for fronte end 1 component
Addr: 00000000030107C5 (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_INST2_COND_REG_2
Constant(s):PU_N1_DBG_INST2_COND_REG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#64.LAT.COND_REG_MODE.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#65.LAT.COND_REG_MODE.LATC.L2(0) [0]
2TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#66.LAT.COND_REG_MODE.LATC.L2(0) [0]
3TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#67.LAT.COND_REG_MODE.LATC.L2(0) [0]
4TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#68.LAT.COND_REG_MODE.LATC.L2(0) [0]
5TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#69.LAT.COND_REG_MODE.LATC.L2(0) [0]
6TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#70.LAT.COND_REG_MODE.LATC.L2(0) [0]
7TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#71.LAT.COND_REG_MODE.LATC.L2(0) [0]
8TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#72.LAT.COND_REG_MODE.LATC.L2(0) [0]
9TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#73.LAT.COND_REG_MODE.LATC.L2(0) [0]
10TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#74.LAT.COND_REG_MODE.LATC.L2(0) [0]
11TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#75.LAT.COND_REG_MODE.LATC.L2(0) [0]
12TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#76.LAT.COND_REG_MODE.LATC.L2(0) [0]
13TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#77.LAT.COND_REG_MODE.LATC.L2(0) [0]
14TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#78.LAT.COND_REG_MODE.LATC.L2(0) [0]
15TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#79.LAT.COND_REG_MODE.LATC.L2(0) [0]
16TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#80.LAT.COND_REG_MODE.LATC.L2(0) [0]
17TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#81.LAT.COND_REG_MODE.LATC.L2(0) [0]
18TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#82.LAT.COND_REG_MODE.LATC.L2(0) [0]
19TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#83.LAT.COND_REG_MODE.LATC.L2(0) [0]
20TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#84.LAT.COND_REG_MODE.LATC.L2(0) [0]
21TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#85.LAT.COND_REG_MODE.LATC.L2(0) [0]
22TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#86.LAT.COND_REG_MODE.LATC.L2(0) [0]
23TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#87.LAT.COND_REG_MODE.LATC.L2(0) [0]
24TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#88.LAT.COND_REG_MODE.LATC.L2(0) [0]
25TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#89.LAT.COND_REG_MODE.LATC.L2(0) [0]
26TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#90.LAT.COND_REG_MODE.LATC.L2(0) [0]
27TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#91.LAT.COND_REG_MODE.LATC.L2(0) [0]
28TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#92.LAT.COND_REG_MODE.LATC.L2(0) [0]
29TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#93.LAT.COND_REG_MODE.LATC.L2(0) [0]
30TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#94.LAT.COND_REG_MODE.LATC.L2(0) [0]
31TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#95.LAT.COND_REG_MODE.LATC.L2(0) [0]
32TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#96.LAT.COND_REG_MODE.LATC.L2(0) [0]
33TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#97.LAT.COND_REG_MODE.LATC.L2(0) [0]
34TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#98.LAT.COND_REG_MODE.LATC.L2(0) [0]
35TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#99.LAT.COND_REG_MODE.LATC.L2(0) [0]
36TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#100.LAT.COND_REG_MODE.LATC.L2(0) [0]
37TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#101.LAT.COND_REG_MODE.LATC.L2(0) [0]
38TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#102.LAT.COND_REG_MODE.LATC.L2(0) [0]
39TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#103.LAT.COND_REG_MODE.LATC.L2(0) [0]
40TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#104.LAT.COND_REG_MODE.LATC.L2(0) [0]
41TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#105.LAT.COND_REG_MODE.LATC.L2(0) [0]
42TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#106.LAT.COND_REG_MODE.LATC.L2(0) [0]
43TP.TCN1.N1.EPS.DBG.CONFIG.NUM_OF_COND_COMP#1.LAT_REQ#107.LAT.COND_REG_MODE.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:4 RW INST2_CROSS_COUPLE_SELECT_1_A: Cross coupling is the same of all selectors:
00000 - selects inst1_cond1_trig_a
00001 - selects inst1_cond1_trig_b
00010 - selects inst1_cond2_trig_a
00011 - selects inst1_cond2_trig_b
00100 - selects inst1_condition1
00101 - selects inst1_condition2
00110 - selects inst1_condition3
00111 - selects inst1_cond2_timeout
01000 - selects inst2_cond1_trig_a
01001 - selects inst2_cond1_trig_b
01010 - selects inst2_cond2_trig_a
01011 - selects inst2_cond2_trig_b
01100 - selects inst2_condition1
01101 - selects inst2_condition2
01110 - selects inst2_condition3
01111 - selects inst2_cond2_timeout
10000 - selects inst3_cond1_trig_a
10001 - selects inst3_cond1_trig_b
10010 - selects inst3_cond2_trig_a
10011 - selects inst3_cond2_trig_b
10100 - selects inst3_condition1
10101 - selects inst3_condition2
10110 - selects inst3_condition3
10111 - selects inst3_cond2_timeout
11000 - selects inst4_cond1_trig_a
11001 - selects inst4_cond1_trig_b
11010 - selects inst4_cond2_trig_a
11011 - selects inst4_cond2_trig_b
11100 - selects inst4_condition1
11101 - selects inst4_condition2
11110 - selects inst4_condition3
11111 - selects inst4_cond2_timeout
5:9 RW INST2_CROSS_COUPLE_SELECT_1_B: inst2_cross_couple_select_1_b
10:14 RW INST2_CROSS_COUPLE_SELECT_2_A: inst2_cross_couple_select_2_a
15:19 RW INST2_CROSS_COUPLE_SELECT_2_B: inst2_cross_couple_select_2_b
20:43 RW INST2_TO_CMP_LT: compare value for special counter sp_cnt_lt in debug component 2

Addr: 00000000030107C6 (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_INST2_COND_REG_3
Constant(s):PU_N1_DBG_INST2_COND_REG_3
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
Bit(s)SCOM Dial: Description
0:63 RO constant=0b0000000000000000000000000000000000000000000000000000000000000000

Debug Macro configuration register 10 for debug backend component
Addr: 00000000030107CD (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_TRACE_REG_0
Constant(s):PU_N1_DBG_TRACE_REG_0
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#0.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#1.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
2TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#2.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
3TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#3.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
4TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#4.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
5TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#5.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
6TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#6.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
7TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#7.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
8TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#8.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
9TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#9.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
10TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#10.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
11TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#11.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
12TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#12.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
13TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#13.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
14TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#14.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
15TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#15.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
16TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#16.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
17TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#17.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
18TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#18.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
19TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#19.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
32TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#32.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
33TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#33.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
34TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#34.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
35TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#35.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
36TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#36.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
37TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#37.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
38TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#38.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
39TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#39.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
40TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#40.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
41TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#41.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
42TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#42.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
43TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#43.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
44TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#44.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
45TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#45.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
46TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#46.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
47TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#47.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
48TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#48.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
49TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#49.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
50TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#50.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
51TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#51.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
52TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#52.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
53TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#53.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
54TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#54.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
55TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#55.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
56TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#56.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
57TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#57.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 RW INST1_COND3_ENABLE: Enable of instance 1 condition 3
1 RW INST2_COND3_ENABLE: Enable of instance 2 condition 3
2 RW INST3_COND3_ENABLE: UNUSED
3 RW INST4_COND3_ENABLE: UNUSED
4 RW INST1_SLOW_LFSR_MODE: Enable slow lfsr mode of front end instance 1
5 RW INST2_SLOW_LFSR_MODE: Enable slow lfsr mode of front end instance 2
6 RW INST3_SLOW_LFSR_MODE: UNUSED
7 RW INST4_SLOW_LFSR_MODE: UNUSED
8:9 RW INST1_CONDITION1_TRIG_SEL: Select inst1 condition1 for output (external) triggers
00 = do nothing
01 = trigger_out(0)
10 = trigger_out(1)
11 = trigger_out(2)
10:11 RW INST1_CONDITION2_TRIG_SEL: Select inst1 condition2 for output (external) triggers
00 = do nothing
01 = trigger_out(0)
10 = trigger_out(1)
11 = trigger_out(2)
12:13 RW INST1_C2_TIMEOUT_TRIG_SEL: Select inst1 c2 time-out counter for output (external) triggers
00 = do nothing
01 = trigger_out(0)
10 = trigger_out(1)
11 = trigger_out(2)
14:15 RW INST2_CONDITION1_TRIG_SEL: Select inst2 condition1 for output (external) triggers
00 = do nothing
01 = trigger_out(0)
10 = trigger_out(1)
11 = trigger_out(2)
16:17 RW INST2_CONDITION2_TRIG_SEL: Select inst2 condition2 trigger for output (external) triggers
00 = do nothing
01 = trigger_out(0)
10 = trigger_out(1)
11 = trigger_out(2)
18:19 RW INST2_C2_TIMEOUT_TRIG_SEL: Select inst2 c2 time-out counter for output (external) triggers
00 = do nothing
01 = trigger_out(0)
10 = trigger_out(1)
11 = trigger_out(2)
20:31 RO constant=0b000000000000
32 RW EXT_TRIG_ON_STOP: enable trigger on stop
33 RW EXT_TRIG_ON_FREEZE: enable trigger on freeze
34:38 RW CORE_RAS0_TRIG_SEL: Select which of the debug events of the debug front end component will be used for dbg_triggers_out(3) of the debug backend component
00001 = inst1_condition1_lt
00010 = inst1_cond2_3_event
00100 = inst1_cond2_timeout
01001 = inst2_condition1_lt
01010 = inst2_cond2_3_event
01100 = inst2_cond2_timeout
10001 = inst3_condition1_lt unused
10010 = inst3_cond2_3_event unused
10100 = inst3_cond2_timeout unused
11001 = inst4_condition1_lt unused
11010 = inst4_cond2_3_event unused
11100 = inst4_cond2_timeout unused
39:43 RW CORE_RAS1_TRIG_SEL: Select which of the debug event of the debug front end component s will be multiplexed to dbg_triggers_out(4) of the debug backend component
00001 = inst1_condition1_lt
00010 = inst1_cond2_3_event
00100 = inst1_cond2_timeout
01001 = inst2_condition1_lt
01010 = inst2_cond2_3_event
01100 = inst2_cond2_timeout
10001 = inst3_condition1_lt unused
10010 = inst3_cond2_3_event unused
10100 = inst3_cond2_timeout unused
11001 = inst4_condition1_lt unused
11010 = inst4_cond2_3_event unused
11100 = inst4_cond2_timeout unused
44:45 RW PC_TP_TRIG_SEL: select which of the debug events will be multiplexed to dbg_triggers_out(5 to 6) of the debug backend logic component
00 = triggers_out_lt(0) & triggers_out_lt(1)
01 = triggers_out_lt(0) & triggers_out_lt(2)
10 = triggers_out_lt(1) & triggers_out_lt(2)
11 = unused
46:49 RW DBG_ARM_SEL: select which of the debug events will be multiplexed to dbg_wat_arm (unused)
XXXX = unused
50:53 RW TRIG0_LEVEL_SEL: Select additional conditions for output (external) trigger signal trigger_out(0)
Note: some are N/A for zG+ (inst3/4 conditions are tied to zero)
0001 = inst1_cond3_state_int(1)
0010 = inst1_cond3_state_int(0)
0011 = inst2_cond3_state_int(1)
0100 = inst2_cond3_state_int(0)
0101 = inst3_cond3_state_int(1)
0110 = inst3_cond3_state_int(0)
0111 = inst4_cond3_state_int(1)
1000 = inst4_cond3_state_int(0)
1001 = inst1_cond3_state_int(1) or inst2_cond3_state_int(1)
1010 = inst1_cond3_state_int(1) and inst2_cond3_state_int(1)
1011 = inst3_cond3_state_int(1) or inst4_cond3_state_int(1)
1100 = inst3_cond3_state_int(1) and inst4_cond3_state_int(1)
1101 = inst1_cond3_state_int(1) or inst2_cond3_state_int(1) or inst3_cond3_state_int(1)
1110 = inst1_cond3_state_int(1) and inst2_cond3_state_int(1) and inst3_cond3_state_int(1)
1111 = inst1_cond3_state_int(1) or inst2_cond3_state_int(1) or inst3_cond3_state_int(1) or inst4_cond3_state_int(1)
54:57 RW TRIG1_LEVEL_SEL: Select additional conditions for output (external) trigger signal trigger_out(1)
Note: some are N/A for zG+ (inst3/4 conditions are tied to zero)
0001 = inst1_cond3_state_int(1)
0010 = inst1_cond3_state_int(0)
0011 = inst2_cond3_state_int(1)
0100 = inst2_cond3_state_int(0)
0101 = inst3_cond3_state_int(1)
0110 = inst3_cond3_state_int(0)
0111 = inst4_cond3_state_int(1)
1000 = inst4_cond3_state_int(0)
1001 = inst1_cond3_state_int(1) or inst2_cond3_state_int(1)
1010 = inst1_cond3_state_int(1) and inst2_cond3_state_int(1)
1011 = inst3_cond3_state_int(1) or inst4_cond3_state_int(1)
1100 = inst3_cond3_state_int(1) and inst4_cond3_state_int(1)
1101 = inst1_cond3_state_int(1) or inst2_cond3_state_int(1) or inst3_cond3_state_int(1)
1110 = inst1_cond3_state_int(1) and inst2_cond3_state_int(1) and inst3_cond3_state_int(1)
1111 = inst1_cond3_state_int(1) or inst2_cond3_state_int(1) or inst3_cond3_state_int(1) or inst4_cond3_state_int(1)
58:63 RO constant=0b000000

Debug macro configuration register 11 for backend component
Addr: 00000000030107CE (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_TRACE_REG_1
Constant(s):PU_N1_DBG_TRACE_REG_1
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#64.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#65.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
2TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#66.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
3TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#67.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
4TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#68.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
5TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#69.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
6TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#70.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
7TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#71.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
8TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#72.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
9TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#73.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
10TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#74.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
11TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#75.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
24TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#88.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
25TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#89.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
26TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#90.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
27TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#91.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
28TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#92.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
29TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#93.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
36TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#100.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
37TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#101.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
38TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#102.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
39TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#103.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
40TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#104.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
41TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#105.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
48TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#112.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
49TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#113.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
50TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#114.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
51TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#115.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
52TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#116.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
53TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#117.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
54TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#118.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
55TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#119.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:1 RW INST1_CONDITION1_ACTION_DO: Inst1 action selection , condition1:
00 = nothing, 01 = start,
10 = stop, 11 = run-N: start now, stop after n cycles
2:3 RW INST1_CONDITION2_ACTION_DO: Inst1 action selection , condition2:
00 = nothing, 01 = start,
10 = stop, 11 = run-N: start now, stop after n cycles
4:5 RW INST1_C2_TIMEOUT_ACTION_DO: Inst1 action selection , c2_timeout:
00 = nothing, 01 = start,
10 = stop, 11 = run-N: start now, stop after n cycles
6:7 RW INST2_CONDITION1_ACTION_DO: inst2 action selection , condition1:
00 = nothing, 01 = start,
10 = stop, 11 = run-N: start now, stop after n cycles
8:9 RW INST2_CONDITION2_ACTION_DO: Inst2 action selection , condition2:
00 = nothing, 01 = start,
10 = stop, 11 = run-N: start now, stop after n cycles
10:11 RW INST2_C2_TIMEOUT_ACTION_DO: Inst2 action selection , c2_timeout:
00 = nothing, 01 = start,
10 = stop, 11 = run-N: start now, stop after n cycles
12:23 RO constant=0b000000000000
24 RW INST1_CONDITION1_ACTION_WAITN: for wait-N
25 RW INST1_CONDITION2_ACTION_WAITN: for wait-N
26 RW INST1_C2_TIMEOUT_ACTION_WAITN: for wait-N
27 RW INST2_CONDITION1_ACTION_WAITN: for wait-N
28 RW INST2_CONDITION2_ACTION_WAITN: for wait-N
29 RW INST2_C2_TIMEOUT_ACTION_WAITN: for wait-N
30:35 RO constant=0b000000
36 RW INST1_CONDITION1_ACTION_BANK: trace bank switch (inst1, condition1)
37 RW INST1_CONDITION2_ACTION_BANK: trace bank switch (inst1, condition2)
38 RW INST1_C2_TIMEOUT_ACTION_BANK: trace bank switch (inst1, c2_timeout)
39 RW INST2_CONDITION1_ACTION_BANK: trace bank switch (inst2, condition1)
40 RW INST2_CONDITION2_ACTION_BANK: trace bank switch (inst2, condition2)
41 RW INST2_C2_TIMEOUT_ACTION_BANK: trace bank switch (inst2, c2_timeout)
42:47 RO constant=0b000000
48:50 RW INST1_CHECKSTOP_MODE_LT: Select additional condition with fir_error_lt for dbg_fir_xstop_on_trig output:
000 = inst1_condition1_lt
001 = inst1_condition2_lt
010 = inst1_condition3_lt
011 = inst1_cond2_timeout_lt
1XX = disable checkstop_mode
51 RW INST1_CHECKSTOP_MODE_SELECTOR: enable_fir_trig_xstop: enable checkstop on debug trigger:
0 = disable checksop on debug trigger
1 = enable checksop on debug trigger
52:54 RW INST2_CHECKSTOP_MODE_LT: Select additional condition with fir_error_lt for dbg_fir_xstop_on_trig output:
000 = inst2_condition1_lt
001 = inst2_condition2_lt
010 = inst2_condition3_lt
011 = inst2_cond2_timeout_lt
1XX = disable checkstop_mode
55 RW INST2_CHECKSTOP_MODE_SELECTOR: enable_fir_error_xstop: enable checkstop on fir error:
0 = disable checkstop on fir error
1 = enable checkstop on fir error
56:63 RO constant=0b00000000

Debug Macro configuration register 12 for backend component
Addr: 00000000030107CF (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DBG_TRACE_MODE_REG_2
Constant(s):PU_N1_DBG_TRACE_MODE_REG_2
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#128.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#129.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
2TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#130.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
3TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#131.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
4TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#132.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
5TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#133.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
6TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#134.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
7TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#135.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
8TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#136.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
9TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#137.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
10TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#138.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
11TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#139.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
12TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#140.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
13TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#141.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
14TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#142.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
15TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#143.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
16TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#144.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
17TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#145.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
18TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#146.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
19TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#147.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
20TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#148.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
21TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#149.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
22TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#150.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
23TP.TCN1.N1.EPS.DBG.CONFIG.TRAC_LAT_REQ#151.LAT.TRAC_REG_MODE.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:15 RW RUNN_COUNT_COMPARE_VALUE: Compare value for the run-N counter used in trace modes run-N and wait-N
16 RW IMM_FREEZE_MODE: immediate freeze mode
17 RW STOP_ON_ERR: stop and freeze on xstop
18 RW BANK_ON_RUNN_MATCH: bank switch on runn match
19 RW FORCE_TEST_MODE: force run-N condition to be true
20 RW ACCUM_HIST_MODE: accumulate history mode, do not clear history mode when trace_run active
21 RW FRZ_COUNT_ON_FRZ: freeze condition counters on trace freeze
22:23 RW EXTEND_BANK: extends bank signal so that it can be picked up by trace if slower trace macro (0x11 = 4:1, 0x10 = 3:1, 0x01 = 2:1, else 1x

Trace start/stop/rest using scom command, use write data(0/1/2) = 1
Addr: 00000000030107D0 (SCOM)
Name:TP.TCN1.N1.EPS.DBG.DEBUG_TRACE_CONTROL
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:2TP.TCN1.N1.EPS.DBG.CONFIG.DEBUG_TRACE_CONTROL(0:2) [000]
Bit(s)SCOM Dial: Description
0 WOX scom_trace_start
1 WOX scom_trace_stop
2 WOX scom_trace_reset

xtra / dedicated trace mode register for core triggers
Addr: 00000000030107D1 (SCOM)
Name:TP.TCN1.N1.EPS.DBG.XTRA_TRACE_MODE
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:41TP.TCN1.N1.EPS.DBG.CONFIG.XTRA_TRACE_MODE_LT_INST.LATC.L2(0:41) [000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:41 RW XTRA_TRACE_MODE_DATA: xtra / dedicated trace mode register for core triggers

Pervasive FIR Register
Addr: 0000000003010800 (SCOM)
0000000003010801 (SCOM1)
0000000003010802 (SCOM2)
Name:MCD.MCC_FIR_REG
Constant(s):
Comments:Local FIR register for MCD
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:10MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:10) [00000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR MCD_ARRAY_ECC_UE_ERR: MCD array ECC uncorrectable error
1 RWX WOX_AND WOX_OR MCD_ARRAY_ECC_CE_ERR: MCD array ECC uncorrectable error
2 RWX WOX_AND WOX_OR MCD_PB_ADDR_PARITY_ERR: MCD PowerBus address Parity error
3 RWX WOX_AND WOX_OR MCD_SM_OR_CASE_ERR: MCD invalid state error
4 RWX WOX_AND WOX_OR MCD_CL_PROBE_PB_HANG_ERR: Hang poll timer expired on cl_probe
5 RWX WOX_AND WOX_OR MCD_CRESP_ADDR_ERR: PowerBus address error cresp received
6 RWX WOX_AND WOX_OR MCD_UNSOLICITED_CRESP_ERR: MCD recieved a unsoliceted CRESP
7 RWX WOX_AND WOX_OR MCD_TTAG_PARITY_ERR: MCD powerbus ttag parity error
8 RWX WOX_AND WOX_OR MCD_FIR_REG_UPDATE_ERR: MCD scom register update error
9 RWX WOX_AND WOX_OR MCD_ACK_DEAD_CRESP_ERR: MCD recieved a ack_dead_cresp
10 RWX WOX_AND WOX_OR MCD_CFG_REG_PARITY_ERR: MCD configuration register had a parity error
11:63 RO n/a n/a constant=0b00000000000000000000000000000000000000000000000000000

Pervasive FIR Mask Register
Addr: 0000000003010803 (SCOM)
0000000003010804 (SCOM1)
0000000003010805 (SCOM2)
Name:MCD.MCD_FIR_MASK_REG
Constant(s):
Comments:Error mask register
(Action0, Action1, Mask) = Action Select
(0,1,0) = Recoverable Error
(0,0,0) = Checkstop Error
(1,0,0) = Special_attention
(x,x,1) = MASKED
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:10MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:10) [00000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_AND WO_OR MCD_ARRAY_ECC_UE_MASK: Mask MCD array ECC uncorrectable error
1 RW WO_AND WO_OR MCD_ARRAY_ECC_CE_MASK: Mask MCD array ECC uncorrectable error
2 RW WO_AND WO_OR MCD_PB_ADDR_PARITY_MASK: Mask MCD PowerBus address Parity error
3 RW WO_AND WO_OR MCD_SM_OR_CASE_MASK: Mask MCD invalid state error
4 RW WO_AND WO_OR MCD_CL_PROBE_PB_HANG_MASK: Mask Hang poll timer expired on cl_probe
5 RW WO_AND WO_OR MCD_CRESP_ADDR_MASK: Mask PowerBus address error cresp received
6 RW WO_AND WO_OR MCD_UNSOLICITED_CRESP_MASK: Mask MCD recieved a unsoliceted CRESP
7 RW WO_AND WO_OR MCD_TTAG_PARITY_MASK: Mask MCD powerbus ttag parity error
8 RW WO_AND WO_OR MCD_FIR_REG_UPDATE_ERR_MASK: Mask MCD scom register update error
9 RW WO_AND WO_OR MCD_ACK_DEAD_CRESP_MASK: CRESP error Mask
10 RW WO_AND WO_OR MCD_CFG_REG_PARITY_MASK: Mask MCD scom register parity error
11:63 RO n/a n/a constant=0b00000000000000000000000000000000000000000000000000000

Pervasive FIR Action 0 Register
Addr: 0000000003010806 (SCOM)
Name:MCD.MCD_FIR_ACTION0_REG
Constant(s):
Comments:Action Select for the FIR bits
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:10MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:10) [00000000000]
Bit(s)SCOM Dial: Description
0:10 RW FIR_ACTION0: MSB of action select for corresponding bit in FIR
(Action0, Action1, Mask) = Action Select
(Action0, Action1, Mask) = Action Select
(0,1,0) = Recoverable Error
(0,0,0) = Checkstop Error
(1,0,0) = Special_attention
(x,x,1) = MASKED
11:63 RO constant=0b00000000000000000000000000000000000000000000000000000

Pervasive FIR Action 1 Register
Addr: 0000000003010807 (SCOM)
Name:MCD.MCD_FIR_ACTION1_REG
Constant(s):
Comments:Action Select for the FIR bits
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:10MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:10) [00000000000]
Bit(s)SCOM Dial: Description
0:10 RW FIR_ACTION1: MSB of action select for corresponding bit in FIR
(Action0, Action1, Mask) = Action Select
(Action0, Action1, Mask) = Action Select
(0,1,0) = Recoverable Error
(0,0,0) = Checkstop Error
(1,0,0) = Special_attention
(x,x,1) = MASKED
11:63 RO constant=0b00000000000000000000000000000000000000000000000000000

MCD FIR WOF Register
Addr: 0000000003010808 (SCOM)
Name:MCD.MCD_FIR_WOF_REG
Constant(s):
Comments:MCD FIR WOF Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:10MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.WOF_LAT_YES.WOF.LATC.L2(0:10) [00000000000]
Bit(s)SCOM Dial: Description
0:10 RWX_WCLRREG
11:63 RO constant=0b00000000000000000000000000000000000000000000000000000

MCD TOP (mcd_cn0 ) Configuration Register
Addr: 000000000301080A (SCOM)
Name:MCD.BANK0_MCD_TOP
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:6MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_TOP_REGISTER_CTLBITS_Q_0_INST.LATC.L2(0:6) [0000000]
11:29MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_TOP_REGISTER_GRPSIZE_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
33:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_TOP_REGISTER_BAR_Q_0_INST.LATC.L2(0:30) [0000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW BANK0_MCD_TOP_VALID: MCD_TOP valid.
1 RW BANK0_MCD_TOP_CPG: Reserved value for backwards compatibility. Setting has no effect
2 RW BANK0_MCD_TOP_GRP_MBR_ID: Reserved value for backwards compatibility. Setting has no effect
3 RW BANK0_MCD_TOP_ALWAYS_RTY: Reserved value for backwards compatibility. Setting has no effect
4:5 RW
6 RW BANK0_MCD_TOP_SMF_ENABLE: Controls how this MCD config handles how the SMF bit (address bit = 12) which the MCD monitors
1= This configuration will monitor both SMF bit = 0,1.
0= MCD will monitor based on base address decode register bit 37
7:10 RO constant=0b0000
11:29 RW BANK0_MCD_TOP_GRP_SIZE: MCD_TOP group size Note 1 Maximum value for 1 MB granules is 1 TB
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
30:32 RO constant=0b000
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
33:63 RW BANK0_MCD_TOP_GRP_BASE: MCD_TOP base address

MCD STR (mcd_cn1 ) Configuration Register
Addr: 000000000301080B (SCOM)
Name:MCD.BANK0_MCD_STR
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:6MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_STR_REGISTER_CTLBITS_Q_0_INST.LATC.L2(0:6) [0000000]
11:29MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_STR_REGISTER_GRPSIZE_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
33:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_STR_REGISTER_BAR_Q_0_INST.LATC.L2(0:30) [0000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW BANK0_MCD_STR_VALID: MCD_str valid.
1 RW BANK0_MCD_STR_CPG: Reserved value for backwards compatibility. Setting has no effect.
2 RW BANK0_MCD_STR_GRP_MBR_ID: Reserved value for backwards compatibility. Setting has no effect.
3 RW BANK0_MCD_STR_ALWAYS_RTY: Reserved value for backwards compatibility. Setting has no effect.
4:5 RW
6 RW BANK0_MCD_STR_SMF_ENABLE: Controls how this MCD config handles how the SMF bit (address bit = 12) which the MCD monitors
1= This configuration will monitor both SMF bit = 0,1.
0= MCD will monitor based on base address decode register bit 37
7:10 RO constant=0b0000
11:29 RW BANK0_MCD_STR_GRP_SIZE: MCD_str group size Note 1 Maximum value for 1 MB granules is 1 TB
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
30:32 RO constant=0b000
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
33:63 RW BANK0_MCD_STR_GRP_BASE: MCD_str base address

MCD bot (mcd_cn2) Configuration Register
Addr: 000000000301080C (SCOM)
Name:MCD.BANK0_MCD_BOT
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:6MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_BOT_REGISTER_CTLBITS_Q_0_INST.LATC.L2(0:6) [0000000]
11:29MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_BOT_REGISTER_GRPSIZE_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
33:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_BOT_REGISTER_BAR_Q_0_INST.LATC.L2(0:30) [0000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW BANK0_MCD_BOT_VALID: MCD_bot valid.
1 RW BANK0_MCD_BOT_CPG: Reserved value for backwards compatibility. Setting has no effect.
2 RW BANK0_MCD_BOT_GRP_MBR_ID: Reserved value for backwards compatibility. Setting has no effect.
3 RW BANK0_MCD_BOT_ALWAYS_RTY: Reserved value for backwards compatibility. Setting has no effect.
4 RW MCD_bot_smf_enable
5 RW
6 RW BANK0_MCD_BOT_SMF_ENABLE: Controls how this MCD config handles how the SMF bit (address bit = 12) which the MCD monitors
1= This configuration will monitor both SMF bit = 0,1.
0= MCD will monitor based on base address decode register bit 37
7:10 RO constant=0b0000
11:29 RW BANK0_MCD_BOT_GRP_SIZE: MCD_bot group size Note 1 Maximum value for 1 MB granules is 1 TB
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
30:32 RO constant=0b000
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
33:63 RW BANK0_MCD_BOT_GRP_BASE: MCD_bot base address

MCD cha (mcd_cn3) Configuration Register
Addr: 000000000301080D (SCOM)
Name:MCD.BANK0_MCD_CHA
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:6MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_CHA_REGISTER_CTLBITS_Q_0_INST.LATC.L2(0:6) [0000000]
11:29MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_CHA_REGISTER_GRPSIZE_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
33:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_CHA_REGISTER_BAR_Q_0_INST.LATC.L2(0:30) [0000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW BANK0_MCD_CHA_VALID: MCD_cha valid.
1 RW BANK0_MCD_CHA_CPG: Reserved value for backwards compatibility. Setting has no effect.
2 RW BANK0_MCD_CHA_GRP_MBR_ID: Reserved value for backwards compatibility. Setting has no effect.
3 RW BANK0_MCD_CHA_ALWAYS_RTY: Reserved value for backwards compatibility. Setting has no effect.
4:5 RW
6 RW BANK0_MCD_CHA_SMF_ENABLE: Controls how this MCD config handles how the SMF bit (address bit = 12) which the MCD monitors
1= This configuration will monitor both SMF bit = 0,1.
0= MCD will monitor based on base address decode register bit 37
7:10 RO constant=0b0000
11:29 RW BANK0_MCD_CHA_GRP_SIZE: MCD_cha group size Note 1 Maximum value for 1 MB granules is 1 TB
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
30:32 RO constant=0b000
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
33:63 RW BANK0_MCD_CHA_GRP_BASE: MCD_cha base address

MCD command decode Configuration Register
Addr: 000000000301080E (SCOM)
Name:MCD.BANK0_MCD_CMD
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:18MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CHECK_CMDS_CONFG_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
31MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CHECK_CMDS_ENABLE_Q_INST.LATC.L2(0) [0]
32:50MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.SET_CMDS_CONFG_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.SET_CMDS_ENABLE_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:18 RW BANK0_MCD_CHECK_CMDS: Check Commands
MCDCHK
0 cl_dma_rd
1 cl_rd_nc
2 pref_go_m, pref_go_s, rd_go_m, rd_go_s
3 cl_dma_inj
4 pr_dma_inj
5 rwitm,rwitm_stwx
6 dclaim, dclaim_stwx
7 dcbz
8 spare
9 cl_dma_w
10 rd_larx
11 bkill_inc, bkill_stwx_inc
12 pte_updt
13 pte_updt
14 dma_pr_wr
15 armw*(add,and,or,xor)[2]
16 armwf*(add,and,cas,or,xor)[2]
17 hca*(hca.act_updthca.dcy_updt)
18 dcbf, dcbfc,,dcbfps,dcbstp
19:30 RO constant=0b000000000000
31 RW BANK0_MCD_CHECK_CMDS_EN: Enable override of Check Commands. Recommended Default = 0
32:50 RW BANK0_MCD_SET_CMDS: Set Commands
MCDSET
32 cl_dma_rd
33 cl_rd_nc
34 pref_go_m, pref_go_s, rd_go_m, rd_go_s
35 cl_dma_inj
36 pr_dma_inj
37 rwitm,,rwitm_stwx
38 dclaim, dclaim_stwx
39 dcbz
40 spare
41 write group
42 rd_larx
43 bkill_inc bkill_stwx_inc
44 pte_updt
45 dcbfps, dcbstps
46 dma_pr_wr
47 armw*(add,and,or,xor)
48 armwf*(add,and,cas,or,xor)
49 hca*(hca.act_updt, hca.dcy_updt)
50 dcbf, dcbfc,dcbfps,dcbstp
51:62 RO constant=0b000000000000
63 RW BANK0_MCD_SET_CMDS_EN: Enable override of Set Commands. Recommended Default = 0

MCD direct read write Register
Addr: 000000000301080F (SCOM)
Name:MCD.BANK0_MCD_RW
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.RDWR_ACCESS_EN_Q_INST.LATC.L2(0) [0]
1MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.RDWR_WR_ENABLE_Q_INST.LATC.L2(0) [0]
3MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.RDWR_REQ_PEND_Q_INST.LATC.L2(0) [0]
4MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.RDWR_READ_STATUS_Q_INST.LATC.L2(0) [0]
5MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.RDWR_WR_MODE_Q_INST.LATC.L2(0) [0]
6MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.RDWR_WRITE_STATUS_Q_INST.LATC.L2(0) [0]
8:22MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.RDWR_ADDR_Q_0_INST.LATC.L2(0:14) [000000000000000]
28:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.RDWR_RDWR_DATA_Q_0_INST.LATC.L2(0:35) [000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX BANK0_MCD_RDWR_ACCESS_EN: MCD direct read/write access enable
1 RW BANK0_MCD_RDWR_WR_ENABLE: MCD direct write enable. Reads when off.
2 RO constant=0b0
3 ROX BANK0_MCD_RDWR_REQ_PEND: MCD direct read/write access pending
4 ROX BANK0_MCD_RDWR_READ_STATUS: MCD direct read data is valid
5 RW BANK0_MCD_RDWR_WRITE_MODE: MCD write mode 0 = OR 1 = and
6 ROX BANK0_MCD_RDWR_WRITE_STATUS: MCD direct write has completed
7 RO constant=0b0
8:22 RW BANK0_MCD_RDWR_ADDR: MCD direct access address
23:27 RO constant=0b00000
28:63 RWX BANK0_MCD_RDWR_RDWR_DATA: MCD read/write data based on wr_enable setting

MCD recovery control Register
Addr: 0000000003010810 (SCOM)
Name:MCD.BANK0_MCD_REC
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_ENABLE_Q_INST.LATC.L2(0) [0]
1MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_DONE_Q_INST.LATC.L2(0) [0]
2MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_CONTINUOUS_Q_INST.LATC.L2(0) [0]
3MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_FILTER_ADDR_DIS_Q_INST.LATC.L2(0) [0]
4MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_EXCEED_RETRY_COUNT_Q_INST.LATC.L2(0) [0]
5MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_STATUS_Q_INST.LATC.L2(0) [0]
8:19MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_PACE_Q_0_INST.LATC.L2(0:11) [000000000000]
20MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_ADDR_ERROR_Q_INST.LATC.L2(0) [0]
21:35MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_ADDR_Q_0_INST.LATC.L2(0:14) [000000000000000]
40:43MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_RTY_COUNT_Q_0_INST.LATC.L2(0:3) [0000]
49:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.REC_VG_COUNT_Q_0_INST.LATC.L2(0:14) [000000000000000]
Bit(s)SCOM Dial: Description
0 RWX BANK0_MCD_REC_ENABLE: MCD recovery access enable
1 ROX BANK0_MCD_REC_DONE: MCD recovery done
2 RW BANK0_MCD_REC_CONTINUOUS: MCD recovery continuous setting
3 RW BANK0_MCD_REC_FILTER_ADDR_DIS: MCD recovery disable blocking probes to address not configured
4 ROX BANK0_MCD_REC_RETRY_COUNT_EXCEED: MCD recovery retry_count reached 0 and aborted that request
5 ROX BANK0_MCD_REC_STATUS: MCD recovery status 0 = idle 1 = running
6:7 RO constant=0b00
8:19 RW BANK0_MCD_REC_PACE: MCD recovery pace between new cache lines
20 ROX BANK0_MCD_REC_ADDR_ERROR: MCD recovery has recieved a addr_error cresp
21:35 RW BANK0_MCD_REC_ADDR: MCD recovery start address
36:39 RO constant=0b0000
40:43 RW BANK0_MCD_REC_RTY_COUNT: MCD recovery retry's before failure
44:48 RO constant=0b00000
49:63 RW BANK0_MCD_REC_VG_COUNT: MCD recovery vector groups to recovery

MCD vector group Configuration Register
Addr: 0000000003010811 (SCOM)
Name:MCD.BANK0_MCD_VGC
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_REGISTER_AVAIL_GRP_Q_0_INST.LATC.L2(0:15) [0000000000000000]
16:31MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_REGISTER_FAILED_GRP_Q_0_INST.LATC.L2(0:15) [0000000000000000]
32MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_REGISTER_JEEPMODE_Q_INST.LATC.L2(0) [0]
33MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_REGISTER_HANG_POLL_ENABLE_Q_INST.LATC.L2(0) [0]
34MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_REGISTER_RND_BACKOFF_ENABLE_Q_INST.LATC.L2(0) [0]
35MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_REGISTER_DROP_PRIORITY_Q_INST.LATC.L2(0) [0]
36MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_REGISTER_MASK_AGV_DISABLE_Q_INST.LATC.L2(0) [0]
37MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_XLATE_TO_ADDR_ID_ENABLE_Q_INST.LATC.L2(0) [0]
38MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_P8MODE_ENABLE_Q_INST.LATC.L2(0) [0]
39MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_EXT_ADDR_FAC_ENABLE_Q_INST.LATC.L2(0) [0]
40:46MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_EXT_ADDR_FAC_MASK_Q_0_INST.LATC.L2(0:6) [0000000]
47:48MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_EXT_ADDR_VEC_ENABLE_Q_0_INST.LATC.L2(0:1) [00]
49:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_VGC_MISC_Q_0_INST.LATC.L2(0:14) [000000000000000]
Bit(s)SCOM Dial: Description
0:7 RW BANK0_MCD_P10_AVAIL_GROUPS: Available groups,
8:15 RW BANK0_MCD_RSVD_AVAIL_GROUPS: Bits 8:15 Reserved value for backwards compatibility
16:23 RW BANK0_MCD_FAILED_GROUPS: Reserved value for backwards compatibility. Setting has no effect.
24:25 RW BANK0_MCD_FORCE_RTY_MCD_RATE: force rty_mcd rate
11 = avg 2^22 cycles (4M)
10 = avg 2^17 cycles (128K)
01 = avg 2^10 cycles (1K)
00 = avg 2^7 cycles (128)
26:31 RW
32 RW BANK0_MCD_4X4_MODE: Reserved value for backwards compatibility. Setting has no effect.
33 RW BANK0_MCD_HANG_POLL_ENABLE: Enable hang_poll
34 RW BANK0_MCD_RND_BACKOFF_ENABLE: Enable rnd_backoff
35 RW BANK0_MCD_DROP_PRIORITY_MODE: Reduce drop_priority, 0 = high, 1 = low
36 RW BANK0_MCD_MASK_AGV_DISABLE_MODE: Reduce mask_agv_disable, 0 = mask, 1 = not mask
37 RW BANK0_MCD_XLATE_TO_ADDR_ID_ENABLE: Reserved value for backwards compatibility. Setting has no effect.
38 RW BANK0_MCD_P8MODE_ENABLE: Assume vg(sys) as only valid group vector, 0 = p9mode, 1 = p8mode
39 RW BANK0_MCD_EXT_ADDR_FAC_ENABLE: Reserved value for backwards compatibility. Setting has no effect.
40:46 RW BANK0_MCD_EXT_ADDR_FAC_MASK: Reserved value for backwards compatibility. Setting has no effect.
47:48 RW BANK0_MCD_EXT_ADDR_VEC_ENABLE: Reserved value for backwards compatibility. Setting has no effect.
49 RW BANK0_MCD_CS_HW400693_DISABLE: cs_hw400693_disable, reverts to Nimbus DD1 operation for target vector for granule not set.
50 RW BANK0_MCD_ENABLE_RCV_ADDR_DEBUG: enable_rcv_addr_debug
51 RW BANK0_MCD_CS_HW403560_DISABLE: cs_hw403560_disable, reverts to nimbus DD2 operation for granule not set, no effect if cs_hw400693_disable is set
52 RW BANK0_MCD_CS_FWD_HW423589_ENABLE: Reserved value for backwards compatibility. Setting has no effect.
53 RW BANK0_MCD_CS_PAIR_HW423589_DISABLE: cs_hw423589_disable, enable set command pairs
54 RW BANK0_MCD_CS_RECOVER_HW423589_DISABLE: cs_hw423589_disable, for cancelling recovery set if array address pairs with rcmd
55 RW BANK0_MCD_CS_WRITE_HW423589_DISABLE: cs_hw423589_disable, for cancelling write if array address pairs with rcmd
56 RW
57 RW BANK0_MCD_1MB_GRANULE_MODE: Enable 1MB granule mode.
0 = Support 16 MB Granules.
1= Granule Size is 1MB, maximum base memory supported is 1TB per configuration.
58 RW BANK0_MCD_FORCE_RTY_MCD_ENABLE: Enable insertion of rty_MCD.
59:63 RW BANK0_MCD_SPARE: Spare config bits

MCD ECC Error Capture Register
Addr: 0000000003010812 (SCOM)
Name:MCD.MCD_ECAP
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ECAP_CAPTURE_CLEAR_Q_INST.LATC.L2(0) [0]
2MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ECAP_CAPTURED_UE_Q_INST.LATC.L2(0) [0]
3MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ECAP_CAPTURED_CE_Q_INST.LATC.L2(0) [0]
4:7MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ECAP_CAPTURED_ERROR_COUNT_Q_0_INST.LATC.L2(0:3) [0000]
10:23MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ECAP_CAPTURED_ERROR_ADDR_Q_0_INST.LATC.L2(0:13) [00000000000000]
24:31MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ECAP_CAPTURED_ERROR_SYN_Q_0_INST.LATC.L2(0:7) [00000000]
33:55MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.FIR_ERR_Q_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:22) [00000000000000000000000]
Bit(s)SCOM Dial: Description
0 WO_1P MCD_ECAP_ECC_CLEAR: Write of 1 clears ECC capture data
1 RO constant=0b0
2 ROX MCD_ECAP_ECC_UE: ECC capture data is for an uncorrectable error
3 ROX MCD_ECAP_ECC_CE: ECC capture data is for a correctable error
4:7 ROX MCD_ECAP_ECC_ERROR_COUNT: Number of ECC errors detected, clamps to 0xF
8:9 RO constant=0b00
10:23 ROX MCD_ECAP_ECC_ERROR_ADDR: LIne(0 to 9) and array(10 to 13) of last captured ecc error
24:31 ROX MCD_ECAP_ECC_SYNDROME: syndrome of last caputered ECC error
32 RO constant=0b0
33 ROX MCD_ECAP_SLICE0_CFG_ECC_UE_ERR:
34 ROX MCD_ECAP_SLICE0_CFG_ECC_CE_ERR:
35 ROX MCD_ECAP_SLICE1_CFG_ECC_UE_ERR:
36 ROX MCD_ECAP_SLICE1_CFG_ECC_CE_ERR:
37 ROX MCD_ECAP_SLICE2_CFG_ECC_UE_ERR:
38 ROX MCD_ECAP_SLICE2_CFG_ECC_CE_ERR:
39 ROX MCD_ECAP_SLICE3_CFG_ECC_UE_ERR:
40 ROX MCD_ECAP_SLICE3_CFG_ECC_CE_ERR:
41 ROX MCD_ECAP_PRESP_RTY_OTHER:
42 ROX MCD_ECAP_REC_SM_ERROR_ERR:
43 ROX MCD_ECAP_REC_PB_SM_ERROR_ERR:
44 ROX MCD_ECAP_ADDR_ERROR_PULSE:
45 ROX MCD_ECAP_RCMD0_ADDR_PARITY_ERROR:
46 ROX MCD_ECAP_RCMD1_ADDR_PARITY_ERROR:
47 ROX MCD_ECAP_RCMD2_ADDR_PARITY_ERROR:
48 ROX MCD_ECAP_RCMD3_ADDR_PARITY_ERROR:
49 ROX MCD_ECAP_WARB_INVALID_CASE_ERROR:
50 ROX MCD_ECAP_INVALID_CRESP_ERROR:
51 ROX MCD_ECAP_TTAG_PARITY_ERROR:
52 ROX MCD_ECAP_RDADDR_ARB_BAD_HAND:
53 ROX MCD_RDWR_UPDATE_ERROR: MCD direct access register update error
54 ROX MCD_REC_UPDATE_ERROR: MCD direct access register update error
55 ROX MCD_REC_ACK_DEAD_ERROR: MCD recieved an ack_dead cResp
56:63 RO constant=0b00000000

MCD Debug Configuration Register
Addr: 0000000003010813 (SCOM)
Name:MCD.MCD_DBG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
3MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.TRACE_ENABLE_Q_INST.LATC.L2(0) [0]
4:7MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.TRACE_SELECT_Q_0_INST.LATC.L2(0:3) [0000]
8MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ERR_INJ_ENABLE_Q_INST.LATC.L2(0) [0]
9MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ERR_INJ_TYPE_Q_INST.LATC.L2(0) [0]
10MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ERR_INJ_ACTION_Q_INST.LATC.L2(0) [0]
11:14MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ERR_INJ_SELECT_Q_0_INST.LATC.L2(0:3) [0000]
15MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.ERR_INJ_STATUS_Q_INST.LATC.L2(0) [0]
19MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.PMU_ENABLE_Q_INST.LATC.L2(0) [0]
20:25MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.PMU_SELECT_Q_0_INST.LATC.L2(0:5) [000000]
32:47MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.PMU_BUS_ENABLE_Q_0_INST.LATC.L2(0:15) [0000000000000000]
48:62MCD.MCD_BANK0.MCD_BANK_DF.RECOVER_CTL.REC_VG_ARRAY_ADDR_Q_0_INST.LATC.L2(0:14) [000000000000000]
Bit(s)SCOM Dial: Description
0:2 RO constant=0b000
3 RW MCD_DBG_TRACE_ENABLE: Turns on trace bus output. Set MCD_dbg_trace_select to 0b1000 when this is enabled
4:7 RW MCD_DBG_TRACE_SELECT: Only valid value is 0b1000
8 RW MCD_DBG_ERR_INJ_ENABLE: MCD Array error inject enable
9 RW MCD_DBG_ERR_INJ_TYPE: MCD Array error inject type. 0:CE 1:UE
10 RW MCD_DBG_ERR_INJ_ACTION: MCD Array error inject action. 0:single 1:continuous
11:14 RW MCD_DBG_ERR_INJ_ARRAY_SEL: MCD Array error inject select. 0000-1111
15 RWX_WCLRPART MCD_DBG_ERR_INJ_STATUS: MCD Array error inject status 1: success
16:18 RO constant=0b000
19 RW MCD_DBG_PMU_ENABLE:
20:22 RW MCD_DBG_PMU_SELECT_LOW:
23:25 RW MCD_DBG_PMU_SELECT_HIGH:
26:31 RO constant=0b000000
32:47 RW MCD_DBG_PMU_BUS_ENABLE:
48:62 ROX MCD_DBG_RECOVER_ADDR: Current recovery array address
63 RO constant=0b0

MCD cha (mcd_cn3) Configuration Register
Addr: 0000000003010814 (SCOM)
Name:MCD.BANK0_MCD_MUON
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_MUON_REGISTER_CTLBITS_Q_0_INST.LATC.L2(0) [0]
5:6MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_MUON_REGISTER_CTLBITS_Q_0_INST.LATC.L2(1:2) [00]
11:29MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_MUON_REGISTER_GRPSIZE_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
33:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_MUON_REGISTER_BAR_Q_0_INST.LATC.L2(0:30) [0000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW BANK0_MCD_MUON_VALID: MCD_muon valid.
1:4 RO constant=0b0000
5 RW BANK0_MCD_MUON_CHIP_CONTAINED_MODE: 0 = The MCD will respond with rty_dinc if rcmd scope is not system scope.
1 = The MCD will act like a LPC (Memory controller) . The MCD will respond with lpc_ack if the reflected command address matches this register
6 RW BANK0_MCD_MUON_SMF_ENABLE: Controls how this MCD config handles how the SMF bit (address bit = 12) which the MCD monitors
1= This configuration will monitor both SMF bit = 0,1.
0= MCD will monitor based on base address decode register bit 37
7:10 RO constant=0b0000
11:29 RW BANK0_MCD_MUON_GRP_SIZE: MCD_muon group size
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
30:32 RO constant=0b000
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
33:63 RW BANK0_MCD_MUON_GRP_BASE: MCD_muon base address

MCD cha (mcd_cn3) Configuration Register
Addr: 0000000003010815 (SCOM)
Name:MCD.BANK0_MCD_TAU
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_TAU_REGISTER_CTLBITS_Q_0_INST.LATC.L2(0) [0]
5:6MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_TAU_REGISTER_CTLBITS_Q_0_INST.LATC.L2(1:2) [00]
11:29MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_TAU_REGISTER_GRPSIZE_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
33:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_TAU_REGISTER_BAR_Q_0_INST.LATC.L2(0:30) [0000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW BANK0_MCD_TAU_VALID: MCD_tau valid.
1:4 RO constant=0b0000
5 RW BANK0_MCD_TAU_CHIP_CONTAINED_MODE: 0 = The MCD will respond with rty_dinc if rcmd scope is not system scope.
1 = The MCD will act like a LPC (Memory controller) . The MCD will respond with lpc_ack if the reflected command address matches this register
6 RW BANK0_MCD_TAU_SMF_ENABLE: Controls how this MCD config handles how the SMF bit (address bit = 12) which the MCD monitors
1= This configuration will monitor both SMF bit = 0,1.
0= MCD will monitor based on base address decode register bit 37
7:10 RO constant=0b0000
11:29 RW BANK0_MCD_TAU_GRP_SIZE: MCD_tau group size
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
30:32 RO constant=0b000
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
33:63 RW BANK0_MCD_TAU_GRP_BASE: MCD_tau base address

MCD cha (mcd_cn3) Configuration Register
Addr: 0000000003010816 (SCOM)
Name:MCD.BANK0_MCD_GLUON
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_GLUON_REGISTER_CTLBITS_Q_0_INST.LATC.L2(0) [0]
5:6MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_GLUON_REGISTER_CTLBITS_Q_0_INST.LATC.L2(1:2) [00]
11:29MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_GLUON_REGISTER_GRPSIZE_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
33:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_GLUON_REGISTER_BAR_Q_0_INST.LATC.L2(0:30) [0000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW BANK0_MCD_GLUON_VALID: MCD_gluon valid.
1:4 RO constant=0b0000
5 RW BANK0_MCD_GLUON_CHIP_CONTAINED_MODE: 0 = The MCD will respond with rty_dinc if rcmd scope is not system scope.
1 = The MCD will act like a LPC (Memory controller) . The MCD will respond with lpc_ack if the reflected command address matches this register
6 RW BANK0_MCD_GLUON_SMF_ENABLE: Controls how this MCD config handles how the SMF bit (address bit = 12) which the MCD monitors
1= This configuration will monitor both SMF bit = 0,1.
0= MCD will monitor based on base address decode register bit 37
7:10 RO constant=0b0000
11:29 RW BANK0_MCD_GLUON_GRP_SIZE: MCD_gluon group size
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
30:32 RO constant=0b000
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
33:63 RW BANK0_MCD_GLUON_GRP_BASE: MCD_gluon base address

MCD cha (mcd_cn3) Configuration Register
Addr: 0000000003010817 (SCOM)
Name:MCD.BANK0_MCD_BOSON
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_BOSON_REGISTER_CTLBITS_Q_0_INST.LATC.L2(0) [0]
5:6MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_BOSON_REGISTER_CTLBITS_Q_0_INST.LATC.L2(1:2) [00]
11:29MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_BOSON_REGISTER_GRPSIZE_Q_0_INST.LATC.L2(0:18) [0000000000000000000]
33:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.CONFIG_BOSON_REGISTER_BAR_Q_0_INST.LATC.L2(0:30) [0000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW BANK0_MCD_BOSON_VALID: MCD_boson valid.
1:4 RO constant=0b0000
5 RW BANK0_MCD_BOSON_CHIP_CONTAINED_MODE: 0 = The MCD will respond with rty_dinc if rcmd scope is not system scope.
1 = The MCD will act like a LPC (Memory controller) . The MCD will respond with lpc_ack if the reflected command address matches this register
6 RW BANK0_MCD_BOSON_SMF_ENABLE: Controls how this MCD config handles how the SMF bit (address bit = 12) which the MCD monitors
1= This configuration will monitor both SMF bit = 0,1.
0= MCD will monitor based on base address decode register bit 37
7:10 RO constant=0b0000
11:29 RW BANK0_MCD_BOSON_GRP_SIZE: MCD_boson group size
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
30:32 RO constant=0b000
Dial enums:
32MB=>0b0000000000000000000
64MB=>0b0000000000000000001
128MB=>0b0000000000000000011
256MB=>0b0000000000000000111
512MB=>0b0000000000000001111
1GB=>0b0000000000000011111
2GB=>0b0000000000000111111
4GB=>0b0000000000001111111
8GB=>0b0000000000011111111
16GB=>0b0000000000111111111
32GB=>0b0000000001111111111
64GB=>0b0000000011111111111
128GB=>0b0000000111111111111
256GB=>0b0000001111111111111
512GB=>0b0000011111111111111
1TB=>0b0000111111111111111
2TB=>0b0001111111111111111
4TB=>0b0011111111111111111
8TB=>0b0111111111111111111
16TB=>0b1111111111111111111
33:63 RW BANK0_MCD_BOSON_GRP_BASE: MCD_boson base address

MCD Topology ID Configuration Register
Addr: 0000000003010818 (SCOM)
Name:MCD.BANK0_MCD_TOPID
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.TOPOLOGY_ID_REGISTER_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW BANK0_MCD_TOPID_ACTIVE0_ENABLE: 0 = MCD Does not monitor This topology ID
1 = The MCD actively Monitors ID 1.
1:5 RW BANK0_MCD_TOPID_ACTIVE0_TOPO_ID: Encoded 5 bit field that is compared to address bits 15:19
6:7 RW
8 RW BANK0_MCD_TOPID_ACTIVE1_ENABLE: 0 = MCD Does not monitor This topology ID
1 = The MCD actively Monitors ID 1.
9:13 RW BANK0_MCD_TOPID_ACTIVE1_TOPO_ID: Encoded 5 bit field that is compared to address bits 15:19
14:15 RW
16 RW BANK0_MCD_TOPID_ACTIVE2_ENABLE: 0 = MCD Does not monitor This topology ID
1 = The MCD actively Monitors ID 1.
17:21 RW BANK0_MCD_TOPID_ACTIVE2_TOPO_ID: Encoded 5 bit field that is compared to address bits 15:19
22:23 RW
24 RW BANK0_MCD_TOPID_ACTIVE3_ENABLE: 0 = MCD Does not monitor This topology ID
1 = The MCD actively Monitors ID 1.
25:29 RW BANK0_MCD_TOPID_ACTIVE3_TOPO_ID: Encoded 5 bit field that is compared to address bits 15:19
30:31 RW
32:63 RW BANK0_MCD_TOPID_PASSIVE_TOPO_ID: The 32 bit mask of Topology IDS to be monitored by the Passive MCD configurations. Each bit set maps to a unique topology ID.
Bit 0 (32) = Topology ID 00000
Bit 1 (33) = Topology ID 00001
.....
Bit 31 (63) = Topology ID = 11111

MCD ECC Error Capture Register
Addr: 0000000003010819 (SCOM)
Name:MCD.MCD_ECAP2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11MCD.MCD_BANK0.MCD_BANK_DF.CFG_REGS.FIR_ERR_Q_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(23:34) [000000000000]
Bit(s)SCOM Dial: Description
0 ROX MCD_ECAP_CFG_TOP_PARITY_ERROR: _top_ configuration register has a parity error
1 ROX MCD_ECAP_CFG_STR_PARITY_ERROR: _str_ configuration register has a parity error
2 ROX MCD_ECAP_CFG_BOT_PARITY_ERROR: _bot_ configuration register has a parity error
3 ROX MCD_ECAP_CFG_CHA_PARITY_ERROR: _cha_ configuration register has a parity error
4 ROX MCD_ECAP_CFG_MUON_PARITY_ERROR: _muon_ configuration register has a parity error
5 ROX MCD_ECAP_CFG_TAU_PARITY_ERROR: _tau_ configuration register has a parity error
6 ROX MCD_ECAP_CFG_GLUON_PARITY_ERROR: _gluon_ configuration register has a parity error
7 ROX MCD_ECAP_CFG_BOSON_PARITY_ERROR: _boson_ configuration register has a parity error
8 ROX MCD_ECAP_CFG_TOPOID_PARITY_ERROR: _topoid_ configuration register has a parity error
9 ROX MCD_ECAP_CFG_CHKSET_PARITY_ERROR: _chkset_ configuration register has a parity error
10 ROX MCD_ECAP_CFG_VGC_PARITY_ERROR: _vgc_ configuration register has a parity error
11 ROX MCD_ECAP_CFG_REC_PARITY_ERROR: _rec_ configuration register has a parity error
12:63 RO constant=0b0000000000000000000000000000000000000000000000000000

PBI CQ FIR Register
Addr: 0000000003010C00 (SCOM)
0000000003010C01 (SCOM1)
0000000003010C02 (SCOM2)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_REG
Constant(s):
Comments:PBI CQ FIR Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:19MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PBI_PE_FIR: PBI internal parity error
1 RWX WOX_AND WOX_OR PBUS_CMD_HANG_FIR: PowerBus command hang error
2 RWX WOX_AND WOX_OR PBUS_READ_ARE_FIR: PowerBus read address error
3 RWX WOX_AND WOX_OR PBUS_WRITE_ARE_FIR: PowerBus write address error
4 RWX WOX_AND WOX_OR PBUS_MISC_HW_FIR: PowerBus miscellaneous error
5 RWX WOX_AND WOX_OR RSVD_FIR: Reserved
6 RWX WOX_AND WOX_OR PBUS_XLAT_ECC_UE_FIR: PowerBus Xlate UE error
7 RWX WOX_AND WOX_OR PBUS_XLAT_ECC_SUE_FIR: PowerBus Xlate SUE error
8 RWX WOX_AND WOX_OR PBUS_ECC_CE_FIR: PowerBus CE error
9 RWX WOX_AND WOX_OR PBUS_ECC_UE_FIR: PowerBus UE error
10 RWX WOX_AND WOX_OR PBUS_ECC_SUE_FIR: PowerBus SUE error
11 RWX WOX_AND WOX_OR INBD_LCO_ARRAY_ECC_CE_FIR: Inbound LCO_ARRAY CE error
12 RWX WOX_AND WOX_OR INBD_LCO_ARRAY_ECC_UE_FIR: Inbound LCO_ARRAY UE error
13 RWX WOX_AND WOX_OR INBD_LCO_ARRAY_ECC_SUE_FIR: Inbound LCO_ARRAY SUE error
14 RWX WOX_AND WOX_OR INBD_ARRAY_ECC_CE_FIR: Inbound array CE error
15 RWX WOX_AND WOX_OR INBD_ARRAY_ECC_UE_FIR: Inbound array UE error
16 RWX WOX_AND WOX_OR INT_STATE_ERR_FIR: internal state error
17 RWX WOX_AND WOX_OR PBUS_LOAD_LINK_ERR_FIR: ACK_DEAD cresp received by read command
18 RWX WOX_AND WOX_OR PBUS_STORE_LINK_ERR_FIR: ACK_DEAD cresp received by write command
19 RWX WOX_AND WOX_OR PBUS_LINK_ABORT_FIR: Link check aborted while waiting on data
20:59 RO n/a n/a constant=0b0000000000000000000000000000000000000000

PBI CQ FIR Mask Register
Addr: 0000000003010C03 (SCOM)
0000000003010C04 (SCOM1)
0000000003010C05 (SCOM2)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_MASK_REG
Constant(s):
Comments:PBI CQ FIR Mask Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:19MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:19 RW WO_AND WO_OR NX_CQ_FIR_MASK:
20:59 RO n/a n/a constant=0b0000000000000000000000000000000000000000

PBI CQ FIR Action0 Register
Addr: 0000000003010C06 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_ACTION0_REG
Constant(s):
Comments:PBI CQ FIR Action0 Register
Action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable
(1,0) = Unused
(1,1) = Local checkstop
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:19MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOM Dial: Description
0:19 RW NX_CQ_FIR_ACTION0:
20:59 RO constant=0b0000000000000000000000000000000000000000

PBI CQ FIR Action1 Register
Addr: 0000000003010C07 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_ACTION1_REG
Constant(s):
Comments:PBI CQ FIR Action1 Register
Action select for corresponding bit in FIR
(Action1,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable
(1,0) = Unused
(1,1) = Local checkstop
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:19MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOM Dial: Description
0:19 RW NX_CQ_FIR_ACTION1:
20:59 RO constant=0b0000000000000000000000000000000000000000

PBI CQ FIR WOF Register
Addr: 0000000003010C08 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_WOF_REG
Constant(s):
Comments:PBI CQ FIR WOF Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:19MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.WOF_LAT_YES.WOF.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOM Dial: Description
0:19 RWX_WCLRREG
20:59 RO constant=0b0000000000000000000000000000000000000000

PowerBus Debug Control Register 1
Addr: 0000000003010C10 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PB_DEBUG_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MODE_REG_DOUT_0_INST.LATC.L2(11:18) [00000000]
Bit(s)SCOM Dial: Description
0:7 RW NXCQ_TRACE_CNTL: 0 - 0= trace cq shim i/f; 1= trace queues 1:2 - reserved 3 - trace a fixed queue number when tracing queues 4:7 - queue number when tracing a fixed queue
8:63 RO constant=0b00000000000000000000000000000000000000000000000000000000

NX PowerBus Error Injection Configuration Register
Addr: 0000000003010C11 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PB_ECC_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:8MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MODE_REG_DOUT_0_INST.LATC.L2(2:10) [000000000]
Bit(s)SCOM Dial: Description
0:1 RWX NXCQ_ECC_INJECT_MODE: ecc_inject_mode determines the number of times to inject the ecc error.

Dial enums:
NXCQ_INJECT_ECC_ONCE=>0b10
NXCQ_INJECT_ECC_CONST=>0b01
2:3 RW NXCQ_ECC_INJECT_TYPE: ecc_inject_type determines the type of ecc error injected.

Dial enums:
NXCQ_INJECT_ECC_CE=>0b01
NXCQ_INJECT_ECC_UE=>0b10
NXCQ_INJECT_ECC_SUE=>0b11
4 RW NXCQ_PBCQ_INJECT_ENABLE: enable ecc inject on pbcq arrays
5:8 RW NXCQ_PBCQ_ARRAY: which pbcq array to force the error into.
9:63 RO constant=0b0000000000000000000000000000000000000000000000000000000

PowerBus MODE Register
Addr: 0000000003010C15 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MMCQ_PB_MODE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:62MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MMCQ_CFG_DOUT_0_INST.LATC.L2(0:62) [000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW DMA_WR_DISABLE_LN: For DMA write machine requests: 0 Master may request Ln scope 1 Master shall not request Ln scope
1 RW DMA_WR_DISABLE_GROUP: For DMA write machine requests: 0 Master may request G scope 1 Master shall not request G scope
2 RW DMA_WR_DISABLE_VG_NOT_SYS: For DMA write machine requests: 0 Master may request Vg scope 1 Master shall not request Vg scope but may use Vg(sys)
3 RW DMA_WR_DISABLE_NN_RN: For DMA write machine requests: 0 Master may request Nn or Rn scope 1 Master shall not request Nn or Rn scope
4 RW DMA_RD_DISABLE_LN: For DMA read machine requests: 0 Master may request Ln scope 1 Master shall not request Ln scope
5 RW DMA_RD_DISABLE_GROUP: For DMA read machine requests: 0 Master may request G scope 1 Master shall not request G scope
6 RW DMA_RD_DISABLE_VG_NOT_SYS: For DMA read machine requests: 0 Master may request Vg scope 1 Master shall not request Vg scope but may use Vg(sys)
7 RW DMA_RD_DISABLE_NN_RN: For DMA read machine requests: 0 Master may request Nn or Rn scope 1 Master shall not request Nn or Rn scope
8:29 RW UNUSED: unused
30 RW PAU_PEC_CONFIG: Configuration for xlate client: 0 PAU1 connected 1 PEC connected
31:32 RW NX_FREEZE_MODES: Data arbitration priority percentage: 00 behaviour unchanged 01 pass data/ecc as is 10 freeze data pattern with good ecc 11 illegal
33 RW ADDR_BAR_MODE: Specifies the address mapping mode in use for the system. 0 Small system address map. Reduces the number of group id bits to 2 and eliminates the chip id bits. All chips have an id of 0. Nn scope is not available in this mode. 1 Large system address map. Uses a 4 bits for the group id and 3 bits for the chip id.
34 RW SKIP_G: Scope mode control set by firmware when the topology is chip=group. Note that this CS does not disable the use of group scope. It modifies the progression of scope when the command starts at nodal scope. 0 The progression from nodal to group scope is followed when the combined response indicates rty_inc or sfStat (as applicable to the command) is set. 1 When the scope of the command is nodal and the command is in the Read, RWITM, or is an Atomic RMW and Fetch command (found in the Ack_BK group), and the combined response is rty_inc or the sfStat is set in the data, the command scope progression skips group and goes to Vg scope.
35:36 RW RESERVED: Reserved
37 RW NXCQ_HANG_SM_ON_ARE: this is the control to enable or disable hanging the master FSM on a combined response of addr_error. When asserted (set to 1), a master getting an addr_error combined response will hang; this is used as a debug aid and should be disabled (set to 0) when shipped to the customer.
38 RW NXCQ_HANG_SM_ON_LINK_FAIL: this is the control to enable or disable hanging the master FSM on a combined response of ack_*dead. When asserted (set to 1), a master getting an ack_*dead combined response will hang; this is used as a debug aid and should be disabled (set to 0) when shipped to the customer.
39 RW CFG_PUMP_MODE: NX uses this control only for unit random backoff 0 chip_is_node. Ln scope is constrained to the master's chip Group scope is constrained to all chips specified by the topology as part of the group (coherent logical X link connections). 1 chip_is_group. Both Ln and G scope are constrained to the master's chip. In this mode is recommended that skip_g be set for best performance.
40:47 RW DMA_RD_VG_RESET_TIMER_MASK: Mask for timer to reset read Vg scope predictor FF 64K cycles FE 32K cycles FC 16K cycles F8 8K cycles 80 512 cycles
48:55 RW DMA_WR_VG_RESET_TIMER_MASK: Mask for timer to reset write Vg scope predictor FF 64K cycles FE 32K cycles FC 16K cycles F8 8K cycles 80 512 cycles
56:62 RW ADDR_EXT_MASK: addr_ext_mask
63 RO constant=0b0

PowerBus MODE Register
Addr: 0000000003010C16 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MMCQ_LCO_CONFIG_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:40MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MMCQ_LCOCFG_DOUT_0_INST.LATC.L2(0:40) [00000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RW LCO_TARG_CONFIG: bit vector where there is one bit per valid LCO target
32:37 RW LCO_TARG_MIN: minimum number of eligible LCO targets
38:40 RW LCO_CRED_MASK: 111 - increment LCO credit count for 1 out of every 8 read commands sent 011 - increment LCO credit count for 1 out of every 4 read commands sent 001 - increment LCO credit count for 1 out of every 2 read commands sent 000 - increment LCO credit count for 1 out of every 1 read commands sent
41:63 RO constant=0b00000000000000000000000

NX CQ Scale value for epsilon counter
Addr: 0000000003010C1D (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MM_EPSILON_COUNTER_VALUE
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:32MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MODE_REG_DOUT_0_INST.LATC.L2(28:60) [000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:11 RW WR_EPSILON_TIER_1_CNT_VAL: Reload value for write epsilon tier 1 counter. Counter decrements at nest_clk / Write Epsilon Tier 1 Divider rate. Tier 1 corresponds to Group pump.
12:15 RW WR_EPSILON_TIER_1_DIV_VAL: Reload value for write epsilon tier 1 divider. If this field = 0 nest_clk is divided by 16, otherwise it is divided by 1 - 15.
16:27 RW WR_EPSILON_TIER_2_CNT_VAL: Reload value for write epsilon tier 2 counter. Counter decrements at nest_clk / Write Epsilon Tier 2 Divider rate. Tier 2 corresponds to System pump.
28:31 RW WR_EPSILON_TIER_2_DIV_VAL: Reload value for write epsilon tier 2 divided. If this field = 0 nest_clk is divided by 16; otherwise it is divded by 1 - 15
32 RW EPSILON_DISABLE: disable
33:56 RO constant=0b000000000000000000000000

PowerBus parity Error Report Register
Addr: 0000000003010C22 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PB_ERR_RPT_0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.FRUN_REG_DOUT_0_INST.LATC.L2(22) [0]
Bit(s)SCOM Dial: Description
0:51 RO nx_pbi_err_rpt_0_out
52 ROX NX_PBI_WRITE_IDLE: All PBI write engines are idle
53:63 RO constant=0b00000000000

NX Snapshot of Debug Bus bits 0 to 63
Addr: 0000000003010C24 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NX_DEBUG_SNAPSHOT_0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_FBC.CQ_WRAP.NXDBGS.DEBUG_BUS_DOUT_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX NX_DEBUG_SNAPSHOT_B0_63: NX Snapshot of Debug Bus bits 0 to 63

NX Snapshot of Debug Bus bits 64 to 87
Addr: 0000000003010C25 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NX_DEBUG_SNAPSHOT_1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.CAPTURED_DEBUG_BUS_0_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 ROX NX_DEBUG_SNAPSHOT_B64_87: NX Snapshot of Debug Bus bits 64 to 87
24:63 RO constant=0b0000000000000000000000000000000000000000

NX PMU Control Register
Addr: 0000000003010C26 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PMU_CONTROL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.PMU_CONTROL_DOUT_0_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW NX_PMU_CNT0_ENABLE: When = 1 this bit enables NX PMU Counter0
1 RW NX_PMU_CNT1_ENABLE: When = 1 this bit enables NX PMU Counter1
2 RW NX_PMU_CNT2_ENABLE: When = 1 this bit enables NX PMU Counter2
3 RW NX_PMU_CNT3_ENABLE: When = 1 this bit enables NX PMU Counter3
4:6 RW NX_PMU_PRESCALER_SEL: Determines which, if any, prescaler counter to apply to all 16bit PMU counters.
Dial enums:
16B_PRESCALAR=>0b000
8B_PRESCALAR=>0b001
20B_PRESCALAR=>0b100
NO_PRESCALAR=>0b111
7 RW NX_PMU_CNT0_POSEDGE_SEL: If this bit is 1, the PMU will only count the event rising edge. If this bit is 0, the PMU will count every cycle the event is asserted (high).
8 RW NX_PMU_CNT1_POSEDGE_SEL: If this bit is 1, the PMU will only count the event rising edge. If this bit is 0, the PMU will count every cycle the event is asserted (high).
9 RW NX_PMU_CNT2_POSEDGE_SEL: If this bit is 1, the PMU will only count the event rising edge. If this bit is 0, the PMU will count every cycle the event is asserted (high).
10 RW NX_PMU_CNT3_POSEDGE_SEL: If this bit is 1, the PMU will only count the event rising edge. If this bit is 0, the PMU will count every cycle the event is asserted (high).
11 RW NX_PMU_RESET: Indicates how counter should reset. 0 = free running 1 = reset on SCOM read
12:13 RW NX_PMU_CNT0_EVENT_SEL: Indication of which of the 4 event pairs (8 total events) to count in counter0.
Dial enums:
CNTR0_EVENT0_EVENT1=>0b00
CNTR0_EVENT2_EVENT3=>0b01
CNTR0_EVENT4_EVENT5=>0b10
CNTR0_EVENT6_EVENT7=>0b11
14:15 RW NX_PMU_CNT0_BIT_PAIR_SEL: Indicates how the event pairs should be combined to increment this PMU counter.
Dial enums:
CNTR0_ONLY_BIT0=>0b00
CNTR0_ONLY_BIT1=>0b01
CNTR0_BIT0_AND_BIT1=>0b10
CNTR0_BIT0_PLUS_BIT1=>0b11
16:17 RW NX_PMU_CNT1_EVENT_SEL: Indication of which of the 4 event pairs (8 total events) to count in counter0.
Dial enums:
CNT1_EVENT0_EVENT1=>0b00
CNT1_EVENT2_EVENT3=>0b01
CNT1_EVENT4_EVENT5=>0b10
CNT1_EVENT6_EVENT7=>0b11
18:19 RW NX_PMU_CNT1_BIT_PAIR_SEL: Indicates how the event pairs should be combined to increment this PMU counter.
Dial enums:
CNT1_ONLY_BIT0=>0b00
CNT1_ONLY_BIT1=>0b01
CNT1_BIT0_AND_BIT1=>0b10
CNT1_BIT0_PLUS_BIT1=>0b11
20:21 RW NX_PMU_CNT2_EVENT_SEL: Indication of which of the 4 event pairs (8 total events) to count in counter0.
Dial enums:
CNT2_EVENT0_EVENT1=>0b00
CNT2_EVENT2_EVENT3=>0b01
CNT2_EVENT4_EVENT5=>0b10
CNT2_EVENT6_EVENT7=>0b11
22:23 RW NX_PMU_CNT2_BIT_PAIR_SEL: Indicates how the event pairs should be combined to increment this PMU counter.
Dial enums:
CNT2_ONLY_BIT0=>0b00
CNT2_ONLY_BIT1=>0b01
CNT2_BIT0_AND_BIT1=>0b10
CNT2_BIT0_PLUS_BIT1=>0b11
24:25 RW NX_PMU_CNT3_EVENT_SEL: Indication of which of the 4 event pairs (8 total events) to count in counter0.
Dial enums:
CNT3_EVENT0_EVENT1=>0b00
CNT3_EVENT2_EVENT3=>0b01
CNT3_EVENT4_EVENT5=>0b10
CNT3_EVENT6_EVENT7=>0b11
26:27 RW NX_PMU_CNT3_BIT_PAIR_SEL: Indicates how the event pairs should be combined to increment this PMU counter.
Dial enums:
CNT3_ONLY_BIT0=>0b00
CNT3_ONLY_BIT1=>0b01
CNT3_BIT0_AND_BIT1=>0b10
CNT3_BIT0_PLUS_BIT1=>0b11
28:29 RW NX_PMU_PORT_SEL: Chooses final pmu events to feed to the counters.
Dial enums:
APC=>0b00
30:31 RW
Dial enums:
APC=>0b00
32:63 RO constant=0b00000000000000000000000000000000
Dial enums:
APC=>0b00

NX PMU Counter Register
Addr: 0000000003010C27 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PMU_COUNTER_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.PMU_COUNTER_0_DOUT_0_INST.LATC.L2(0:15) [0000000000000000]
16:31MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.PMU_COUNTER_1_DOUT_0_INST.LATC.L2(0:15) [0000000000000000]
32:47MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.PMU_COUNTER_2_DOUT_0_INST.LATC.L2(0:15) [0000000000000000]
48:63MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.PMU_COUNTER_3_DOUT_0_INST.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0:15 ROX NX_PMU_COUNTER_0: NX PMU Counter 0
16:31 ROX NX_PMU_COUNTER_1: NX PMU Counter 1
32:47 ROX NX_PMU_COUNTER_2: NX PMU Counter 2
48:63 ROX NX_PMU_COUNTER_3: NX PMU Counter 3

NX Miscellaneous Control Register
Addr: 0000000003010C28 (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_MISC_CONTROL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
4:15MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CNTL_REG_DOUT_2_INST.LATC.L2(4:15) [000000000000]
Bit(s)SCOM Dial: Description
0:3 RO constant=0b0000
4:7 RW HANG_POLL_SCALE: How many hang polls that need to be detected to indicate a hang poll to the logic
8:11 RW HANG_DATA_SCALE: How many data polls that need to be detected to indicate a data poll to the logic
12:15 RW HANG_SHM_SCALE: How many data polls that need to be detected to indicate a shm poll to the logic. A shim poll is created by the CQ logic to detect hangs of SMs while waiting on exchanges with the shim logic.
16:63 RO constant=0b000000000000000000000000000000000000000000000000

topology id translation table entries 0:7
Addr: 0000000003010C2C (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL0_DOUT_0_INST.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW TOP_ID_XLAT_TBL0: Entries 0:7 of the topology ID translation table
40:63 RO constant=0b000000000000000000000000

topology id translation table entries 8:15
Addr: 0000000003010C2D (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL1_DOUT_0_INST.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW TOP_ID_XLAT_TBL1: Entries 8:15 of the topology ID translation table
40:63 RO constant=0b000000000000000000000000

topology id translation table entries 16:23
Addr: 0000000003010C2E (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL2_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL2_DOUT_0_INST.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW TOP_ID_XLAT_TBL2: Entries 16:23 of the topology ID translation table
40:63 RO constant=0b000000000000000000000000

topology id translation table entries 24:31
Addr: 0000000003010C2F (SCOM)
Name:MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL3_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL3_DOUT_0_INST.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW TOP_ID_XLAT_TBL3: Entries 24:31 of the topology ID translation table
40:63 RO constant=0b000000000000000000000000

NMMU FIR1 Register
Addr: 0000000003010C40 (SCOM)
0000000003010C41 (SCOM1)
0000000003010C42 (SCOM2)
Name:MM1.MM_FIR1_REG
Constant(s):
Comments:NMMU FIR1 Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:45MM1.MM_PRV.SCOM1.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:45) [0000000000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR MM_FIR1_FBC_XLAT_ARY_ECC_CE_DET: Fabric DIn xlat array CE error detected.
1 RWX WOX_AND WOX_OR MM_FIR1_FBC_XLAT_ARY_ECC_UE_DET: Fabric DIn xlat array UE error detected.
2 RWX WOX_AND WOX_OR MM_FIR1_FBC_XLAT_ARY_ECC_SUE_DET: Fabric DIn xlat array SUE error detected.
3 RWX WOX_AND WOX_OR MM_FIR1_FBC_CQRD_ARY_ECC_CE_DET: Fabric mst rd array CE error detected.
4 RWX WOX_AND WOX_OR MM_FIR1_FBC_CQRD_ARY_ECC_UE_DET: Fabric mst rd array UE error detected.
5 RWX WOX_AND WOX_OR MM_FIR1_FBC_CQRD_ARY_ECC_SUE_DET: Fabric mst rd array SUE error detected.
6 RWX WOX_AND WOX_OR MM_FIR1_FBC_XLAT_PROT_ERR_DET: Fabric xlat protocol error detected.
7 RWX WOX_AND WOX_OR MM_FIR1_FBC_XLAT_TIMEOUT_DET: Fabric xlat op timeout detected.
8 RWX WOX_AND WOX_OR MM_FIR1_SLB_DIR_PERR_DET: SLB directory parity error detected.
9 RWX WOX_AND WOX_OR MM_FIR1_SLB_CAC_PERR_DET: SLB cache parity error detected.
10 RWX WOX_AND WOX_OR MM_FIR1_SLB_LRU_PERR_DET: SLB lru parity error detected.
11 RWX WOX_AND WOX_OR MM_FIR1_SLB_MULTIHIT_DET: SLB multi-hit error detected.
12 RWX WOX_AND WOX_OR MM_FIR1_TLB_DIR_PERR_DET: TLB directory parity error detected.
13 RWX WOX_AND WOX_OR MM_FIR1_TLB_CAC_PERR_DET: TLB cache parity error detected.
14 RWX WOX_AND WOX_OR MM_FIR1_TLB_LRU_PERR_DET: TLB lru parity error detected.
15 RWX WOX_AND WOX_OR MM_FIR1_TLB_MULTIHIT_DET: TLB multi-hit error detected.
16 RWX WOX_AND WOX_OR MM_FIR1_TW_SEG_FAULT_DET: Segment fault detected .
17 RWX WOX_AND WOX_OR MM_FIR1_TW_PG_FAULT_NOPTE_DET: Page fault detected due to no matching pte.
18 RWX WOX_AND WOX_OR MM_FIR1_TW_PG_FAULT_BPCHK_DET: Page fault detected due to basic prot chk fail.
19 RWX WOX_AND WOX_OR MM_FIR1_TW_PG_FAULT_VPCHK_DET: Page fault detected due to virt prot chk fail.
20 RWX WOX_AND WOX_OR MM_FIR1_TW_PG_FAULT_SEID_DET: Page fault detected due to seid mismatch .
21 RWX WOX_AND WOX_OR MM_FIR1_TW_ADD_ERR_CR_RD_DET: Address error cresp detected by twsm for read .
22 RWX WOX_AND WOX_OR MM_FIR1_TW_PTE_UPD_FAIL_DET: PTE update fail due to armwf mismatch.
23 RWX WOX_AND WOX_OR MM_FIR1_TW_ADD_ERR_CR_WR_DET: Address error cresp detected by twsm for write.
24 RWX WOX_AND WOX_OR MM_FIR1_TW_RDX_CFG_GUEST_DET: Unsupported radix cfg for guest-side .
25 RWX WOX_AND WOX_OR MM_FIR1_TW_RDX_CFG_HOST_DET: Unsupported radix cfg for host-side .
26 RWX WOX_AND WOX_OR MM_FIR1_TW_INVALID_WIMG_DET: Invalid wimg setting detected .
27 RWX WOX_AND WOX_OR MM_FIR1_TW_INV_RDX_QUAD_DET: Invalid radix quad access detected .
28 RWX WOX_AND WOX_OR MM_FIR1_TW_FOREIGN_ADDR_DET: Unexpected access to foreign address space .
29 RWX WOX_AND WOX_OR MM_FIR1_TW_PREFETCH_ABT_DET: Prefetch abort/fail detected .
30 RWX WOX_AND WOX_OR MM_FIR1_TW_CXT_CAC_PERR_DET: Context cache array parity error detected .
31 RWX WOX_AND WOX_OR MM_FIR1_TW_RDX_PWC_PERR_DET: Radix pwc array parity error detected .
32 RWX WOX_AND WOX_OR MM_FIR1_TW_SM_CTL_ERR_DET: Tablewalk sm control error detected .
33 RWX WOX_AND WOX_OR MM_FIR1_CO_SM_CTL_ERR_DET: Castout sm control error detected .
34 RWX WOX_AND WOX_OR MM_FIR1_CI_SM_CTL_ERR_DET: Check-in sm control error detected .
35 RWX WOX_AND WOX_OR MM_FIR1_INV_SM_CTL_ERR_DET: Invalidate sm control error detected .
36 RWX WOX_AND WOX_OR MM_FIR1_TW_TIMEOUT_ERR_DET: Tablewalk sm timeout error detected .
37 RWX WOX_AND WOX_OR MM_FIR1_CO_TIMEOUT_ERR_DET: Castout sm timeout error detected .
38 RWX WOX_AND WOX_OR MM_FIR1_CI_TIMEOUT_ERR_DET: Check-in sm timeout error detected .
39 RWX WOX_AND WOX_OR MM_FIR1_INV_TIMEOUT_ERR_DET: Invalidate sm timeout error detected .
40 RWX WOX_AND WOX_OR MM_FIR1_NX0_LXSTOP_ERR_DET: NX local checkstop error detected .
41 RWX WOX_AND WOX_OR MM_FIR1_CP0_LXSTOP_ERR_DET: CP0 local checkstop error detected .
42 RWX WOX_AND WOX_OR MM_FIR1_CP1_LXSTOP_ERR_DET: CP1 local checkstop error detected .
43 RWX WOX_AND WOX_OR MM_FIR1_NPU_LXSTOP_ERR_DET: NPU local checkstop error detected .
44 RWX WOX_AND WOX_OR MM_FIR1_FBC_LXSTOP_ERR_DET: FBC local checkstop error detected .
45 RWX WOX_AND WOX_OR MM_FIR1_SPARE: FBC local checkstop error detected .
46:61 RO n/a n/a constant=0b0000000000000000

NMMU FIR1 Mask Register
Addr: 0000000003010C43 (SCOM)
0000000003010C44 (SCOM1)
0000000003010C45 (SCOM2)
Name:MM1.MM_FIR1_MASK_REG
Constant(s):
Comments:NMMU FIR1 Mask Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:45MM1.MM_PRV.SCOM1.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:45) [0000000000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:45 RW WO_AND WO_OR MM_FIR1_MASK:
46:61 RO n/a n/a constant=0b0000000000000000

NMMU FIR1 Action0 Register
Addr: 0000000003010C46 (SCOM)
Name:MM1.MM_FIR1_ACTION0_REG
Constant(s):
Comments:NMMU FIR1 Action0 Register
Action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable
(1,0) = Unused
(1,1) = Local checkstop
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:45MM1.MM_PRV.SCOM1.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:45) [0000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:45 RW MM_FIR1_ACTION0:
46:61 RO constant=0b0000000000000000

NMMU FIR1 Action1 Register
Addr: 0000000003010C47 (SCOM)
Name:MM1.MM_FIR1_ACTION1_REG
Constant(s):
Comments:NMMU FIR1 Action1 Register
Action select for corresponding bit in FIR
(Action1,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable
(1,0) = Unused
(1,1) = Local checkstop
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:45MM1.MM_PRV.SCOM1.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:45) [0000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:45 RW MM_FIR1_ACTION1:
46:61 RO constant=0b0000000000000000

NMMU FIR1 WOF Register
Addr: 0000000003010C48 (SCOM)
Name:MM1.MM_FIR1_WOF_REG
Constant(s):
Comments:NMMU FIR1 WOF Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:45MM1.MM_PRV.SCOM1.PAR_OFF.LEM_FIR.LOCALFIR.FIR.WOF_LAT_YES.WOF.LATC.L2(0:45) [0000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:45 RWX_WCLRREG
46:61 RO constant=0b0000000000000000

NMMU Hypervisor Real Mode Offset Register (HRMOR), as follows... 0 - Overall ACM enable for NMMU 1:7 - Reserved 8:51 - HRMOR(8:51) - offset applied for hypervisor real mode when EA(0)=0, S=0 52:63 - Reserved
Addr: 0000000003010C4A (SCOM)
Name:MM1.MM_CFG_NMMU_XLAT_CTL_REG0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.CFG_HRMOR_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW MM_CFG_XLAT_CTL_HRMOR: Details the HRMOR register for hypervisor RA mode when DR=0,HV=1,EA(0)=0. Only bits 8:51 valid

NMMU Partition Table Control Register (PTCR)
Addr: 0000000003010C4B (SCOM)
Name:MM1.MM_CFG_NMMU_XLAT_CTL_REG1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.CFG_PTCR_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW MM_CFG_XLAT_CTL_PTCR: Details the Partition Table Control Register set up by the hypervisor. 0 - valid, 1:52 - PPTB (table base addr), 59:63 - PPTS (table size).

NMMU Ultravisor Real Mode Offset Register (URMOR)
Addr: 0000000003010C4C (SCOM)
Name:MM1.MM_CFG_NMMU_XLAT_CTL_REG2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.CFG_URMOR_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW MM_CFG_XLAT_CTL_URMOR: Details the URMOR register for ultravisor RA mode when DR=0,HV=1,EA(0)=0,S=1, plus SMF enables, as follows... 0 - Overall SMF enable for NMMU 1:2 - SMF property select 0b00 - SMF checking disabled 0b01 - SMF checking enabled , SM=RA(19) for large system cfgs w/ 4-sockets x 16 0b10 - SMF checking enabled , SM=RA(15) for large system cfgs w/o 4-sockets x 16 0b11 - SMF checking enabled , SM=RA(17) for small system cfgs 3:7 - Reserved 8:51 - URMOR(8:51) - offset applied for ultravisor real mode when EA(0)=0, S=1 52:63 - Reserved

NMMU PMU0 Control Register
Addr: 0000000003010C4D (SCOM)
Name:MM1.MM_NMMU_PMU0_CTL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.PMU0_CFG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW MM_PMU0_CTL: Details the NMMU PMU0 Control Register... 0:3 - event_sel0 4:7 - event_sel1 8:11- event_sel2 12:15- event_sel3 16 - enable 17 - reset 18 - dis_glob_scom 19 - freeze 20 - freeze_on_overflow 21:22 - cnt0_pair_op 23:24 - cnt1_pair_op 25:26 - cnt2_pair_op 27:28 - cnt3_pair_op 29:31 - cfg_cascade 32:33 - prescaler_sel0 34:35 - prescaler_sel1 36:37 - prescaler_sel2 38:39 - prescaler_sel3 40:63 - reserved

NMMU PMU1 Control Register
Addr: 0000000003010C4E (SCOM)
Name:MM1.MM_NMMU_PMU1_CTL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.PMU1_CFG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW MM_PMU1_CTL: Details the NMMU PMU1 Control Register... 0:3 - event_sel0 4:7 - event_sel1 8:11- event_sel2 12:15- event_sel3 16 - enable 17 - reset 18 - dis_glob_scom 19 - freeze 20 - freeze_on_overflow 21:22 - cnt0_pair_op 23:24 - cnt1_pair_op 25:26 - cnt2_pair_op 27:28 - cnt3_pair_op 29:31 - cfg_cascade 32:33 - prescaler_sel0 34:35 - prescaler_sel1 36:37 - prescaler_sel2 38:39 - prescaler_sel3 40:63 - reserved

NMMU PMU0 Counter Register
Addr: 0000000003010C4F (SCOM)
Name:MM1.MM_NMMU_PMU0_CNT_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.PMU0_CNT_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX MM_PMU0_CNT: Details the NMMU PMU0 Counter Register... 0:15 - count0 16:31 - count1 32:47 - count2 48:63 - count3

NMMU PMU1 Counter Register
Addr: 0000000003010C50 (SCOM)
Name:MM1.MM_NMMU_PMU1_CNT_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.PMU1_CNT_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX MM_PMU1_CNT: Details the NMMU PMU1 Counter Register... 0:15 - count0 16:31 - count1 32:47 - count2 48:63 - count3

NMMU Snp Inv Filter Status Register
Addr: 0000000003010C51 (SCOM)
Name:MM1.MM_NMMU_FLT_STAT_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15MM1.MM_PRV.FLT_SCOMSTAT_Q_0_INST.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0:15 ROX MM_FLT_STAT: Details the NMMU Snp Inv Filter Status Register... snp inv flt status( 0)=lpid overflow det snp inv flt status( 1)=pid overflow det snp inv flt status( 2)=multiple pid overflows det snp inv flt status( 3)=spare snp inv flt status( 4:15)=lpid corresponding to pid overflow
16:63 RO constant=0b000000000000000000000000000000000000000000000000

NMMU State Machine Control Register
Addr: 0000000003010C52 (SCOM)
Name:MM1.MM_CFG_NMMU_CTL_SM
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.CFG_NMMU_CTL_SM_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:11 RW MM_CFG_NMMU_CTL_SM_TWSM_DIS: Per sm disables for tablewalk state machines. At least one must always be enabled w/i NMMU.
12:19 RW MM_CFG_NMMU_CTL_SM_CKINSM_DIS: Per sm disables for check-in state machines. At least one must always be enabled w/i NMMU.
20 RW MM_CFG_NMMU_CTL_SM_INV_SINGLE_THREAD_EN: Enables single-thread mode for snoop invalidates within fbc macro.
21 RW MM_CFG_NMMU_CTL_TW_CXT_CAC_DIS: Disables twsm from allocating into the Context cache.
22:23 RW reserved_22_23
24 RW MM_CFG_NMMU_CTL_SM_ISS487_EN: Enables fix for iss487 where NX traffic runs as ST under DMT mode.
25 RW reserved_25
26 RW MM_CFG_NMMU_CTL_SM_ISS526_EN: Enables fix for iss526 where snp inv ops run as ST under DMT mode.
27:29 RW reserved_27_29
30 RW MM_CFG_NMMU_CTL_DYN_ST_FREQ_MULT: For dynamic single-thread mode, defines the interval over which slowdown pulses will be counted: 0b00000 - triggers freq period of 1k cycles 0b00001 - triggers freq period of 2k cycles 0b00010 - triggers freq period of 3k cycles 0b00100 - triggers freq period of 4k cycles 0b00111 - triggers freq period of 8k cycles 0b01111 - triggers freq period of 16k cycles 0b11111 - triggers freq period of 32k cycles
31 RW MM_CFG_NMMU_CTL_TW_MPSS_DIS: Disable TW from finding MPSS (HPT) PTE hits
32:39 RW MM_CFG_NMMU_CTL_NCU_SNP_TLBIE_CNT_THRESH: Defines ncscoms_cfg_tlbie_cnt_thresh in nmmu ncu snooper for tlbie throttling mechanism.
40 RW MM_CFG_NMMU_CTL_TW_ATT_HPT_SAO_FOLD_DIS: Disables twsm from allowing SAO WIMG encoding for HPT to fold into normal mem category.
41 RW MM_CFG_NMMU_CTL_TW_ATT_RDX_SAO_FOLD_DIS: Disables twsm from allowing SAO WIMG encoding for Rdx to fold into normal mem category.
42 RW MM_CFG_NMMU_CTL_TW_ATT_RDX_NIO_FOLD_DIS: Disables twsm from allowing non-idempotent i/o encoding for Rdx to fold into cache-inh mem category.
43 RW MM_CFG_NMMU_CTL_TW_ATT_RDX_TIO_FOLD_DIS: Disables twsm from allowing tolerant i/o encoding for Rdx to fold into cache-inh mem category.
44 RW MM_CFG_NMMU_CTL_TW_LCO_RDX_EN: Enables twsm to attempt lateral castouts for all Radix guest and host pte cachelines for performance.
45 RW MM_CFG_NMMU_CTL_TW_LCO_ABRT_IF_UPRC: LCO Function: 0b1 --> Abort LCO if PTE-Update is required
46 RW MM_CFG_NMMU_CTL_TW_LCO_ABRT_IF_PF: LCO Function: 0b1 --> Abort LCO if Prefetch active
47 RW reserved_47
48 RW reserved_48
49 RW reserved_49
50 RW reserved_50
51 RW MM_CFG_NMMU_CTL_TW_LCO_RDX_PDE_EN: Enables twsm to attempt lateral castouts for Radix pde cachelines.
52 RW MM_CFG_NMMU_CTL_TW_RDX_PWC_DIS: Disables twsm from allocating into Radix page-walk cache.
53 RW MM_CFG_NMMU_CTL_TW_RDX_INT_PWC_DIS: Disables twsm from allocating intermediate xlatns into Radix page-walk cache.
54 RW MM_CFG_NMMU_CTL_TW_RDX_INT_TLB_DIS: Disables twsm from allocating intermediate xlatns into TLB.
55 RW MM_CFG_NMMU_CTL_TW_RDX_PWC_SPLIT_EN: Drives twsm to split Radix page-walk cache in half for guest and half for host entries.
56 RW MM_CFG_NMMU_CTL_TW_RDX_PWC_VA_HASH: Radix page-walk cache CGC hash only uses VA bits, Lpid,Pid treated as zeros
57 RW MM_CFG_NMMU_CTL_NCU_SNP_TLBIE_OVERLAP_EN: Enables NCU snoopers to expect overlapping of tlbi_op2 with tlbi_set for P10.
58 RW MM_CFG_NMMU_CTL_TW_PTE_UPD_INTR_EN: Force Atomic PTE Update exception whenever a PTE Update is required.
59 RW MM_CFG_NMMU_CTL_NCU_SNP_TLBIE_PACING_CNT_EN: Defines ncscoms_cfg_tlbie_pacing_cnt_en in nmmu ncu snooper for tlbie throttling mechanism.
60:63 RW MM_CFG_NMMU_CTL_DYN_ST_FREQ_MULT: For dynamic single-thread mode, defines the interval over which slowdown pulses will be counted: 0b00000 - triggers freq period of 1k cycles 0b00001 - triggers freq period of 2k cycles 0b00010 - triggers freq period of 3k cycles 0b00100 - triggers freq period of 4k cycles 0b00111 - triggers freq period of 8k cycles 0b01111 - triggers freq period of 16k cycles 0b11111 - triggers freq period of 32k cycles

NMMU Miscellaneous Control Register
Addr: 0000000003010C53 (SCOM)
Name:MM1.MM_CFG_NMMU_CTL_MISC
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.CFG_NMMU_CTL_MISC_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW reserved_0
1 RW MM_CFG_NMMU_CTL_MISC_BKINV_INTERLOCK_DIS: Disables ctl sm interlock on lower-barrier phase of a back-invalidate sequence.
2 RW MM_CFG_NMMU_CTL_MISC_DYN_ST_MODE_EN: Enables dynamic single-thread mode under multi-thread operation (i.e. single-thread mode disabled).
3 RW MM_CFG_NMMU_CTL_MISC_DYN_ST_MODE_HANGP_EN: Enables dynamic single-thread mode with every unit hang pulse under multi-thread operation.
4:7 RW MM_CFG_NMMU_CTL_MISC_DYN_ST_MODE_THRESHOLD: Defines threshold of slowdown cond det pulses before engaging dynamic single-thread mode... 0b00000000 - triggers dyn st mode sequence w/ every slowdown cond det pulse during freq period/interval 0b00000001 - triggers dyn st mode sequence w/ every other slowdown cond det pulse during freq period/interval 0b00000010 - triggers dyn st mode sequence w/ every 1/3 slowdown cond det pulse during freq period/interval 0b00000011 - triggers dyn st mode sequence w/ every 1/4 slowdown cond det pulse during freq period/interval 0b00000111 - triggers dyn st mode sequence w/ every 1/8 slowdown cond det pulse during freq period/interval 0b00001111 - triggers dyn st mode sequence w/ every 1/16 slowdown cond det pulse during freq period/interval 0b00011111 - triggers dyn st mode sequence w/ every 1/32 slowdown cond det pulse during freq period/interval 0b00111111 - triggers dyn st mode sequence w/ every 1/64 slowdown cond det pulse during freq period/interval 0b01111111 - triggers dyn st mode sequence w/ every 1/128 slowdown cond det pulse during freq period/interval 0b11111111 - triggers dyn st mode sequence w/ every 1/256 slowdown cond det pulse during freq period/interval
8 RW MM_CFG_NMMU_CTL_MISC_CTL_LFSR_DIS: Disables ctl lbs lfsr.
9 RW MM_CFG_NMMU_CTL_MISC_FBC_LFSR_DIS: Disables fbc lbs lfsr.
10 RW MM_CFG_NMMU_CTL_MISC_FBC_INV_AMORT_DIS: Disables fbc bkinvsm from amortizing multiple inv ops under a single barrier to inclusive agent.
11 RW reserved_10_11
12 RW MM_CFG_NMMU_CTL_MISC_FBC_DIN_ECC_CHK_DIS: Disables fbc din mstr rd array ecc checks.
13 RW MM_CFG_NMMU_CTL_MISC_FBC_XLAT_ECC_CHK_DIS: Disables fbc din xlat array ecc checks.
14 RW MM_CFG_NMMU_CTL_MISC_FBC_XLAT_PROT_ERR_CHK_DIS: Disables fbc xlat protocol error checks.
15 RW MM_CFG_NMMU_CTL_MISC_FBC_XLAT_TIMEOUT_CHK_DIS: Disables fbc xlat timeout error checks.
16 RW MM_CFG_NMMU_CTL_MISC_CO_PROT_ERR_CHK_DIS: Disables castout sm protocol error checks.
17 RW MM_CFG_NMMU_CTL_MISC_CO_TIMEOUT_CHK_DIS: Disables castout sm timeout error checks.
18 RW MM_CFG_NMMU_CTL_MISC_CKIN_PROT_ERR_CHK_DIS: Disables checkin sm protocol error checks.
19 RW MM_CFG_NMMU_CTL_MISC_CKIN_TIMEOUT_CHK_DIS: Disables checkin sm timeout error checks.
20 RW MM_CFG_NMMU_CTL_MISC_INV_PROT_ERR_CHK_DIS: Disables inv sm protocol error checks.
21 RW MM_CFG_NMMU_CTL_MISC_INV_TIMEOUT_CHK_DIS: Disables inv sm timeout error checks.
22 RW MM_CFG_NMMU_CTL_MISC_TW_PROT_ERR_CHK_DIS: Disables twalk sm protocol error checks.
23 RW MM_CFG_NMMU_CTL_MISC_TW_TIMEOUT_CHK_DIS: Disables twalk sm timeout error checks.
24 RW MM_CFG_NMMU_CTL_MISC_FBC_SNP_PROT_ERR_CHK_DIS: Disables fbc snp protocol error checks.
25 RW MM_CFG_NMMU_CTL_MISC_FBC_SNP_TIMEOUT_CHK_DIS: Disables fbc snp timeout error checks.
26 RW MM_CFG_NMMU_CTL_MISC_FBC_CMD_PROT_ERR_CHK_DIS: Disables fbc cmd protocol error checks.
27 RW reserved_27
28:31 RW MM_CFG_NMMU_CTL_MISC_DYN_ST_MODE_THRESHOLD: Defines threshold of slowdown cond det pulses before engaging dynamic single-thread mode... 0b00000000 - triggers dyn st mode sequence w/ every slowdown cond det pulse during freq period/interval 0b00000001 - triggers dyn st mode sequence w/ every other slowdown cond det pulse during freq period/interval 0b00000010 - triggers dyn st mode sequence w/ every 1/3 slowdown cond det pulse during freq period/interval 0b00000011 - triggers dyn st mode sequence w/ every 1/4 slowdown cond det pulse during freq period/interval 0b00000111 - triggers dyn st mode sequence w/ every 1/8 slowdown cond det pulse during freq period/interval 0b00001111 - triggers dyn st mode sequence w/ every 1/16 slowdown cond det pulse during freq period/interval 0b00011111 - triggers dyn st mode sequence w/ every 1/32 slowdown cond det pulse during freq period/interval 0b00111111 - triggers dyn st mode sequence w/ every 1/64 slowdown cond det pulse during freq period/interval 0b01111111 - triggers dyn st mode sequence w/ every 1/128 slowdown cond det pulse during freq period/interval 0b11111111 - triggers dyn st mode sequence w/ every 1/256 slowdown cond det pulse during freq period/interval
32:47 RW MM_CFG_NMMU_CTL_MISC_HANG_PLS_MULT: Defines base hang pulse multipler in forming unit hang pulse timer. Base pulse is every 1k cycles.
48:55 RW MM_CFG_NMMU_CTL_MISC_NCU_SNP_TLBIE_INC_RATE: Defines ncscoms_cfg_tlbie_inc_rate in nmmu ncu snooper for tlbie throttling mechanism.
56:63 RW MM_CFG_NMMU_CTL_MISC_NCU_SNP_TLBIE_DEC_RATE: Defines ncscoms_cfg_tlbie_dec_rate in nmmu ncu snooper for tlbie throttling mechanism.

NMMU SLB Control Register
Addr: 0000000003010C54 (SCOM)
Name:MM1.MM_CFG_NMMU_CTL_SLB
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.CFG_NMMU_CTL_SLB_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:15 RW MM_CFG_NMMU_CTL_SLB_MBR_DIS: Per member disables for slb dir/cache per cgc. Coarse-granularity for disables, as follows... - no cfg disables set for any mbr = ways 00-15 enabled - cfg disables for any mbr 00-03 = ways 00-15 enabled - cfg disables for any mbr 04-07 = ways 04-15 disabled - cfg disables for any mbr 08-11 = ways 08-15 disabled - cfg disables for any mbr 12-15 = ways 12-15 disabled
16 RW MM_CFG_NMMU_CTL_SLB_SNGL_THD_EN: Enables single-thread mode for xlat ops through slb pipe.
17 RW MM_CFG_NMMU_CTL_SLB_CAC_ALLOC_DIS: Disables all SLB cache allocations. Instead, forces tablewalk always. -- RESERVED BIT
18 RW MM_CFG_NMMU_CTL_SLB_DMAP_MODE_EN: Enables SLB direct-mapped mode. Not used in p9 dd1.
19 RW MM_CFG_NMMU_CTL_SLB_ALT_SEGSZ_DIS: Disables use of alternate segment size within SLB.
20 RW MM_CFG_NMMU_CTL_SLB_DIR_PERR_CHK_DIS: Disables slb directory parity error checks.
21 RW MM_CFG_NMMU_CTL_SLB_CAC_PERR_CHK_DIS: Disables slb cache parity error checks.
22 RW MM_CFG_NMMU_CTL_SLB_LRU_PERR_CHK_DIS: Disables slb lru parity error checks.
23 RW MM_CFG_NMMU_CTL_SLB_MULTIHIT_CHK_DIS: Disables slb multi-hit error checks.
24 RW MM_CFG_NMMU_CTL_SLB_ISS505_FIX_DIS: Disable fix for issue505 override of tw_dir_wr status for lock release xltype
25 RW MM_CFG_NMMU_CTL_SLB_ISS510_FIX_DIS: Disable fix for issue510 tags active SLS override of lock_snp_val
26 RW MM_CFG_NMMU_CTL_SLB_ISS511_FIX_DIS: Disable fix for issue511 abort op holdoff of chkout slow_retry generator
27 RW MM_CFG_NMMU_CTL_SLB_ISS544_FIX_DIS: Disable fix for issue544 for tag compare of error promote op with current single-thd op.
28 RW MM_CFG_NMMU_CTL_SLB_ISS554_FIX_DIS: Disable fix for issue554 for holding off tlbie cmds until subsequent st wdw grants token to tlbie cmd.
29 RW MM_CFG_NMMU_CTL_SLB_ISS560_FIX_DIS: Disable fix for issue560 for holding off use of tm_st_wdw_rising_edge_pls_d in slb_tm_st_wdw_start_holdoff.
30 RW MM_CFG_NMMU_CTL_SLB_DD2_ISS584_FIX_DIS: Disable fix for issue584 to remove impact of hv or virtual real mode xlats upon multi-hit detection.
31 RW reserved_31
32:35 RW MM_CFG_NMMU_CTL_SLB_DBG_BUS0_STG0_SEL: NMMU SLB macro bus0 stage0 mux select.
36:39 RW MM_CFG_NMMU_CTL_SLB_DBG_BUS1_STG0_SEL: NMMU SLB macro bus1 stage0 mux select.
40:51 RW reserved_40_51
52 RW MM_CFG_NMMU_CTL_SLB_ISS542_FIX_DIS: Disables slb fix for iss542 where inuse bits are allowed to impact lru state calculation
53:56 RW reserved_53_56
57 RW MM_CFG_NMMU_CTL_SLB_TWSM_11_1_MODE_ENA: Enable for 11/1 tlb/slb twsm mode for radix-only (vs. 8/4 normal mode which accomodates hpt).
58 RW MM_CFG_NMMU_CTL_SLB_SNGL_SHOT_ENA: Enable for slb single-shot arbiter mode (only one op in pipe at a time).
59 RW MM_CFG_NMMU_CTL_SLB_FBC_SNGL_SHOT_HOLDOFF_ENA: Enable for slb single-shot arbiter mode to impact the slb fbc requests.
60:63 RW

NMMU TLB Control Register
Addr: 0000000003010C55 (SCOM)
Name:MM1.MM_CFG_NMMU_CTL_TLB
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.CFG_NMMU_CTL_TLB_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:15 RW MM_CFG_NMMU_CTL_TLB_MBR_DIS: Per member disables for tlb dir/cache per cgc. Coarse-granularity for disables, as follows... - no cfg disables set for any mbr = ways 00-15 enabled - cfg disables for any mbr 00-03 = ways 00-15 enabled - cfg disables for any mbr 04-07 = ways 04-15 disabled - cfg disables for any mbr 08-11 = ways 08-15 disabled - cfg disables for any mbr 12-15 = ways 12-15 disabled
16 RW MM_CFG_NMMU_CTL_TLB_SNGL_THD_EN: Enables single-thread mode for xlat ops through tlb pipe.
17 RW MM_CFG_NMMU_CTL_TLB_CAC_ALLOC_DIS: Disables all TLB cache allocations. Instead, forces tablewalk always. -- RESERVED BIT
18 RW MM_CFG_NMMU_CTL_TLB_DMAP_MODE_EN: Enables TLB direct-mapped mode.
19 RW MM_CFG_NMMU_CTL_TLB_MPSS_DIS: Disables mpss mode within TLB.
20 RW MM_CFG_NMMU_CTL_TLB_HASH_LPID_DIS: Disables lpid influence within tlb hash
21 RW MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS: Disables pid influence within tlb hash
22 RW MM_CFG_NMMU_CTL_TLB_DIR_PERR_CHK_DIS: Disables tlb directory parity error checks.
23 RW MM_CFG_NMMU_CTL_TLB_CAC_PERR_CHK_DIS: Disables tlb cache parity error checks.
24 RW MM_CFG_NMMU_CTL_TLB_LRU_PERR_CHK_DIS: Disables tlb lru parity error checks.
25 RW MM_CFG_NMMU_CTL_TLB_MULTIHIT_CHK_DIS: Disables tlb multi-hit error checks.
26 RW MM_CFG_NMMU_CTL_TLB_EA_RANGE_CHK_DIS: Disables tlb ea(2:11) range check for exerciser purposes.
27 RW MM_CFG_NMMU_CTL_TLB_ISS426_FIX_DIS: Disables fix for iss426 for twsm handoff of mpss cgc, instead of base cgc, for nearhit.
28 RW MM_CFG_NMMU_CTL_TLB_ISS486_FIX_DIS: Disable fix for issue486 generating a stat=x6 for sec resv behind another sec resv/lock.
29 RW MM_CFG_NMMU_CTL_TLB_ISS505_FIX_DIS: Disable fix for issue505 override of tw_dir_wr status for lock release xltype
30 RW MM_CFG_NMMU_CTL_TLB_ISS510_FIX_DIS: Disable fix for issue510 TA-SLS and virt_real terms into car0 host_replay calc
31 RW MM_CFG_NMMU_CTL_TLB_ISS512_FIX_DIS: Disable fix for issue512 slb recyc release all locks sending promote with ST arbiter error flag
32:35 RW MM_CFG_NMMU_CTL_TLB_DBG_BUS0_STG0_SEL: NMMU TLB macro bus0 stage0 mux select.
36:39 RW MM_CFG_NMMU_CTL_TLB_DBG_BUS1_STG0_SEL: NMMU TLB macro bus1 stage0 mux select.
40 RW MM_CFG_NMMU_CTL_TLB_ISS534_FIX_DIS: Disable fix for issue534 for fast retry of an op immediately following a recycle w/ exception.
41 RW MM_CFG_NMMU_CTL_TLB_ISS537_FIX_DIS: Disable fix for issue537 of sending Radix demote op from TLB to SLB to clear local inUse latches.
42 RW MM_CFG_NMMU_CTL_TLB_ISS540_FIX_DIS: Disable fix for issue540 for DD2 only.
43 RW MM_CFG_NMMU_CTL_TLB_ISS543_FIX_DIS: Disables tlb fix for iss543 to override xltype dependency on the flush op behind int dir rd.
44:47 RW MM_CFG_NMMU_CTL_TLB_GUEST_PREF_PGSZ: Defines preferred Radix guest page size when mpss is disabled within the TLB pipe.
48:51 RW MM_CFG_NMMU_CTL_TLB_HOST_PREF_PGSZ: Defines preferred Radix host page size when mpss is disabled within the TLB pipe.
52 RW MM_CFG_NMMU_CTL_TLB_ISS542_FIX_DIS: Disables tlb fix for iss542 where inuse bits are allowed to impact lru state calculation
53 RW MM_CFG_NMMU_CTL_TLB_ISS543B_FIX_EN: Enables tlb fix for iss543 part b to broaden fast-retry for any adjacent op to a flush
54 RW MM_CFG_NMMU_CTL_TLB_ISS567_FIX_DIS: Disables tlb fix for iss567 where guest side inuse scrub is aborted for case with large guest pg mapped to multi host pgs.
55 RW MM_CFG_NMMU_CTL_TLB_ISS586_FIX_DIS: Disables tlb fix for iss586 where prs bit is ignored in tlbie is=2 and is=3 compares, in conjunction w/ filter mechanism.
56 RW MM_CFG_NMMU_CTL_TLB_MPSS_PREF_PGSZ_ENA: Enable for mpss checks with preferred pgsz from bits 44:51 (requires bit 19 = 0 = mpss enabled).
57 RW MM_CFG_NMMU_CTL_TLB_TWSM_11_1_MODE_ENA: Enable for 11/1 tlb/slb twsm mode for radix-only (vs. 8/4 normal mode which accomodates hpt).
58 RW MM_CFG_NMMU_CTL_TLB_SNGL_SHOT_ENA: Enable for tlb single-shot arbiter mode (only one op in pipe at a time).
59 RW MM_CFG_NMMU_CTL_TLB_SLB_SNGL_SHOT_HOLDOFF_ENA: Enable for tlb single-shot arbiter mode to impact the slb pipe holdoff (fast retry in slb).
60:63 RW

NMMU Error Log Register
Addr: 0000000003010C57 (SCOM)
Name:MM1.MM_NMMU_ERR_LOG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.ERRLOG_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RW reserved_0_1
2 RW MM_ERR_INJ_SNP_FLT_EN: Starting in p10, enables error inject within snp filter .
3 RW MM_ERR_INJ_SNP_FLT_SNGL_SHOT_EN: Starting in p10, enables error inject within snp filter on a single-shot basis.
4 RW MM_ERR_INJ_SNP_FLT_OVERLAP_EN: Starting in p10, allows error injects to cascade within snp filter .
5:7 RW MM_ERR_INJ_SNP_FLT_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
8:63 RW reserved_08_63
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111

NMMU Error Inject Register
Addr: 0000000003010C58 (SCOM)
Name:MM1.MM_NMMU_ERR_INJ
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.ERRINJ_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RW reserved_0_1
2 RW MM_ERR_INJ_TLB_DIR_EN: Starting in p10, enables error inject within tlb directory.
3 RW MM_ERR_INJ_TLB_DIR_SNGL_SHOT_EN: Starting in p10, enables error inject within tlb directory on a single-shot basis.
4 RW MM_ERR_INJ_TLB_DIR_OVERLAP_EN: Starting in p10, allows error injects to cascade within tlb directory.
5:7 RW MM_ERR_INJ_TLB_DIR_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
8 RW MM_ERR_INJ_TLB_CAC_EN: Starting in p10, enables error inject within tlb cache.
9 RW MM_ERR_INJ_TLB_CAC_SNGL_SHOT_EN: Starting in p10, enables error inject within tlb cache on a single-shot basis.
10 RW MM_ERR_INJ_TLB_CAC_OVERLAP_EN: Starting in p10, allows error injects to cascade within tlb cache.
11:13 RW MM_ERR_INJ_TLB_CAC_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
14 RW MM_ERR_INJ_TLB_LRU_EN: Starting in p10, enables error inject within tlb lru .
15 RW MM_ERR_INJ_TLB_LRU_SNGL_SHOT_EN: Starting in p10, enables error inject within tlb lru on a single-shot basis.
16 RW MM_ERR_INJ_TLB_LRU_OVERLAP_EN: Starting in p10, allows error injects to cascade within tlb lru .
17:19 RW MM_ERR_INJ_TLB_LRU_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
20 RW MM_ERR_INJ_PWC_DIR_EN: Starting in p10, enables error inject within pwc directory.
21 RW MM_ERR_INJ_PWC_DIR_SNGL_SHOT_EN: Starting in p10, enables error inject within pwc directory on a single-shot basis.
22 RW MM_ERR_INJ_PWC_DIR_OVERLAP_EN: Starting in p10, allows error injects to cascade within pwc directory.
23:25 RW MM_ERR_INJ_PWC_DIR_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
26 RW MM_ERR_INJ_PWC_CAC_EN: Starting in p10, enables error inject within pwc cache .
27 RW MM_ERR_INJ_PWC_CAC_SNGL_SHOT_EN: Starting in p10, enables error inject within pwc cache on a single-shot basis.
28 RW MM_ERR_INJ_PWC_CAC_OVERLAP_EN: Starting in p10, allows error injects to cascade within pwc cache .
29:31 RW MM_ERR_INJ_PWC_CAC_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
32:33 RW reserved_32_33
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
34 RW MM_ERR_INJ_SLB_DIR_EN: Starting in p10, enables error inject within SLB directory.
35 RW MM_ERR_INJ_SLB_DIR_SNGL_SHOT_EN: Starting in p10, enables error inject within SLB directory on a single-shot basis.
36 RW MM_ERR_INJ_SLB_DIR_OVERLAP_EN: Starting in p10, allows error injects to cascade within SLB directory.
37:39 RW MM_ERR_INJ_SLB_DIR_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
40 RW MM_ERR_INJ_SLB_CAC_EN: Starting in p10, enables error inject within SLB cache.
41 RW MM_ERR_INJ_SLB_CAC_SNGL_SHOT_EN: Starting in p10, enables error inject within SLB cache on a single-shot basis.
42 RW MM_ERR_INJ_SLB_CAC_OVERLAP_EN: Starting in p10, allows error injects to cascade within SLB cache.
43:45 RW MM_ERR_INJ_SLB_CAC_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
46 RW MM_ERR_INJ_SLB_LRU_EN: Starting in p10, enables error inject within SLB lru .
47 RW MM_ERR_INJ_SLB_LRU_SNGL_SHOT_EN: Starting in p10, enables error inject within SLB lru on a single-shot basis.
48 RW MM_ERR_INJ_SLB_LRU_OVERLAP_EN: Starting in p10, allows error injects to cascade within SLB lru .
49:51 RW MM_ERR_INJ_SLB_LRU_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
52 RW MM_ERR_INJ_CXT_DIR_EN: Starting in p10, enables error inject within CXT directory.
53 RW MM_ERR_INJ_CXT_DIR_SNGL_SHOT_EN: Starting in p10, enables error inject within CXT directory on a single-shot basis.
54 RW MM_ERR_INJ_CXT_DIR_OVERLAP_EN: Starting in p10, allows error injects to cascade within CXT directory.
55:57 RW MM_ERR_INJ_CXT_DIR_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111
58 RW MM_ERR_INJ_CXT_CAC_EN: Starting in p10, enables error inject within CXT cache .
59 RW MM_ERR_INJ_CXT_CAC_SNGL_SHOT_EN: Starting in p10, enables error inject within CXT cache on a single-shot basis.
60 RW MM_ERR_INJ_CXT_CAC_OVERLAP_EN: Starting in p10, allows error injects to cascade within CXT cache .
61:63 RW MM_ERR_INJ_CXT_CAC_MULT_SEL: For p10, defines the number of array writes before hw will inject an error.
Dial enums:
INJ_EVERY_256_ARY_WRS=>0b000
INJ_EVERY_002_ARY_WRS=>0b001
INJ_EVERY_004_ARY_WRS=>0b010
INJ_EVERY_008_ARY_WRS=>0b011
INJ_EVERY_016_ARY_WRS=>0b100
INJ_EVERY_032_ARY_WRS=>0b101
INJ_EVERY_064_ARY_WRS=>0b110
INJ_EVERY_128_ARY_WRS=>0b111

NMMU Debug Mode Register
Addr: 0000000003010C59 (SCOM)
Name:MM1.MM_NMMU_DBG_MODE
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63MM1.MM_PRV.DBG_MODE_REG_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW MM_DBG_MODE_EN: Enables NMMU Debug Bus mode latches.
1 RW MM_DBG_MODE_PRV_BUS0_STG2_SEL: NMMU prv macro bus0 stage2 mux select.
2 RW MM_DBG_MODE_PRV_BUS1_STG2_SEL: NMMU prv macro bus1 stage2 mux select.
3 RW MM_DBG_MODE_FBC_BUS0_STG2_SEL: NMMU fbc macro bus0 stage2 mux select.
4 RW MM_DBG_MODE_FBC_BUS1_STG2_SEL: NMMU fbc macro bus1 stage2 mux select.
5 RW MM_DBG_MODE_MSC_BUS0_STG2_SEL: NMMU msc macro bus0 stage2 mux select.
6 RW MM_DBG_MODE_MSC_BUS1_STG2_SEL: NMMU msc macro bus1 stage2 mux select.
7 RW MM_DBG_MODE_SLB_BUS0_STG2_SEL: NMMU SLB macro bus0 stage2 mux select.
8 RW MM_DBG_MODE_SLB_BUS1_STG2_SEL: NMMU SLB macro bus1 stage2 mux select.
9 RW MM_DBG_MODE_TW_BUS0_STG2_SEL: NMMU TW macro bus0 stage2 mux select.
10 RW MM_DBG_MODE_TW_BUS1_STG2_SEL: NMMU TW macro bus1 stage2 mux select.
11 RW MM_DBG_MODE_RDX_BUS0_STG2_SEL: NMMU RDX macro bus0 stage2 mux select.
12 RW MM_DBG_MODE_RDX_BUS1_STG2_SEL: NMMU RDX macro bus1 stage2 mux select.
13 RW MM_DBG_MODE_TLB_BUS0_STG2_SEL: NMMU TLB macro bus0 stage2 mux select.
14 RW MM_DBG_MODE_TLB_BUS1_STG2_SEL: NMMU TLB macro bus1 stage2 mux select.
15 RW MM_DBG_MODE_FBC_BUS0_STG1_SEL: NMMU fbc macro bus0 stage1 mux select.
16 RW MM_DBG_MODE_FBC_BUS1_STG1_SEL: NMMU fbc macro bus1 stage1 mux select.
17 RW MM_DBG_MODE_MSC_BUS0_STG1_SEL: NMMU msc macro bus0 stage1 mux select.
18 RW MM_DBG_MODE_MSC_BUS1_STG1_SEL: NMMU msc macro bus1 stage1 mux select.
19 RW MM_DBG_MODE_SLB_BUS0_STG1_SEL: NMMU SLB macro bus0 stage1 mux select.
20 RW MM_DBG_MODE_SLB_BUS1_STG1_SEL: NMMU SLB macro bus1 stage1 mux select.
21 RW MM_DBG_MODE_TW_BUS0_STG1_SEL: NMMU TW macro bus0 stage1 mux select.
22 RW MM_DBG_MODE_TW_BUS1_STG1_SEL: NMMU TW macro bus1 stage1 mux select.
23 RW MM_DBG_MODE_RDX_BUS0_STG1_SEL: NMMU RDX macro bus0 stage1 mux select.
24 RW MM_DBG_MODE_RDX_BUS1_STG1_SEL: NMMU RDX macro bus1 stage1 mux select.
25 RW MM_DBG_MODE_TLB_BUS0_STG1_SEL: NMMU TLB macro bus0 stage1 mux select.
26 RW MM_DBG_MODE_TLB_BUS1_STG1_SEL: NMMU TLB macro bus1 stage1 mux select.
27:31 RW reserved_27_31
32:35 RW MM_DBG_MODE_FBC_BUS0_STG0_SEL: NMMU FBC macro bus0 stage0 mux select.
36:39 RW MM_DBG_MODE_FBC_BUS1_STG0_SEL: NMMU FBC macro bus1 stage0 mux select.
40:43 RW MM_DBG_MODE_MSC_BUS0_STG0_SEL: NMMU MSC macro bus0 stage0 mux select.
44:47 RW MM_DBG_MODE_MSC_BUS1_STG0_SEL: NMMU MSC macro bus1 stage0 mux select.
48:53 RW MM_DBG_MODE_TW_BUS0_STG0_SEL: NMMU TW macro bus0 stage0 mux select.
54:59 RW MM_DBG_MODE_TW_BUS1_STG0_SEL: NMMU TW macro bus1 stage0 mux select.
60:61 RW MM_DBG_MODE_RDX_BUS0_STG0_SEL: NMMU RDX macro bus0 stage0 mux select.
62:63 RW MM_DBG_MODE_RDX_BUS1_STG0_SEL: NMMU RDX macro bus1 stage0 mux select.

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011000 (SCOM)
0000000003011001 (SCOM1)
0000000003011002 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ0.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011003 (SCOM)
0000000003011004 (SCOM1)
0000000003011005 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ0.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011006 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ0.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011007 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ0.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301100A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EQ0.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EQ0.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EQ0.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EQ0: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EQ0: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EQ0: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EQ0: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EQ0: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EQ0: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EQ0: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EQ0: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EQ0: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EQ0: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EQ0: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EQ0: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EQ0: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EQ0: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EQ0: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EQ0: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EQ0: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EQ0: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EQ0: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EQ0: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EQ0: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EQ0: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301100B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EQ0: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EQ0: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EQ0: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EQ0: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EQ0: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EQ0: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EQ0: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EQ0: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EQ0: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EQ0: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EQ0: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EQ0: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EQ0: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301100C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EQ0: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EQ0: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EQ0: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EQ0: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EQ0: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EQ0: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EQ0: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EQ0: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EQ0: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EQ0: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EQ0: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EQ0: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EQ0: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301100D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EQ0: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EQ0: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EQ0: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EQ0: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EQ0: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EQ0: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EQ0: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EQ0: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EQ0: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EQ0: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EQ0: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EQ0: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EQ0: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EQ0: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EQ0: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EQ0: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EQ0: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EQ0: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EQ0: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EQ0: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EQ0: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EQ0: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EQ0: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EQ0: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EQ0: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EQ0: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EQ0: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EQ0: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EQ0: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EQ0: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EQ0: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EQ0: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301100E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EQ0: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EQ0: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EQ0: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EQ0: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EQ0: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EQ0: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EQ0: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EQ0: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EQ0: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EQ0: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EQ0: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EQ0: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EQ0: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EQ0: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EQ0: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EQ0: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EQ0: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EQ0: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EQ0: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EQ0: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EQ0: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EQ0: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EQ0: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EQ0: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EQ0: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EQ0: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EQ0: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EQ0: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EQ0: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EQ0: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EQ0: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EQ0: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301100F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EQ0: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EQ0: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EQ0: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EQ0: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EQ0: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EQ0: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EQ0: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EQ0: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EQ0: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EQ0: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EQ0: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EQ0: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EQ0: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EQ0: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EQ0: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EQ0: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EQ0: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EQ0: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EQ0: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EQ0: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EQ0: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EQ0: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EQ0: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EQ0: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EQ0: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EQ0: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EQ0: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EQ0: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EQ0: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EQ0: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EQ0: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EQ0: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011010 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EQ0: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EQ0: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EQ0: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EQ0: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EQ0: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EQ0: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EQ0: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EQ0: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EQ0: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EQ0: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EQ0: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EQ0: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EQ0: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EQ0: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EQ0: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EQ0: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EQ0: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EQ0: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EQ0: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EQ0: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EQ0: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EQ0: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EQ0: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EQ0: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EQ0: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EQ0: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EQ0: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EQ0: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EQ0: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EQ0: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EQ0: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EQ0: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011011 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EQ0: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EQ0: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EQ0: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EQ0: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EQ0: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EQ0: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EQ0: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EQ0: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EQ0: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EQ0: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EQ0: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EQ0: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EQ0: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EQ0: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EQ0: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EQ0: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EQ0: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EQ0: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EQ0: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EQ0: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EQ0: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EQ0: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EQ0: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EQ0: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EQ0: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EQ0: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EQ0: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EQ0: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EQ0: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EQ0: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EQ0: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EQ0: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011012 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EQ0: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EQ0: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EQ0: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EQ0: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EQ0: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EQ0: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EQ0: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EQ0: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EQ0: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EQ0: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EQ0: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EQ0: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EQ0: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EQ0: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EQ0: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EQ0: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EQ0: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EQ0: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EQ0: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EQ0: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EQ0: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EQ0: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EQ0: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EQ0: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EQ0: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EQ0: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EQ0: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EQ0: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EQ0: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EQ0: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EQ0: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EQ0: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011013 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EQ0: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EQ0: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EQ0: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EQ0: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EQ0: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EQ0: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EQ0: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EQ0: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EQ0: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EQ0: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EQ0: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011014 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EQ0.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EQ0.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EQ0.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EQ0: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EQ0: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EQ0: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EQ0: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EQ0: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EQ0: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EQ0: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EQ0: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EQ0: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EQ0: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EQ0: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011015 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EQ0: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX pb_cfg_pbiasy_unit0_disable
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX pb_cfg_pbiasy_unit0_selcd
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301101A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EQ0: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EQ0: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301101B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EQ0: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EQ0: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EQ0: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EQ0: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EQ0: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EQ0: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EQ0: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EQ0: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EQ0: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EQ0: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301101C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EQ0: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EQ0: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EQ0: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EQ0: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EQ0: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EQ0: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EQ0: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EQ0: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EQ0: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EQ0: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301101D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EQ0: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EQ0: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EQ0: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EQ0: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EQ0: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EQ0: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EQ0: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301101E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EQ0.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EQ0.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX PB_CFG_EX00_HBUS_DISABLE: Disable H-Bus. {Default=1}.
9 RWX PB_CFG_EX01_HBUS_DISABLE: Disable H-Bus. {Default=1}.
10 RWX PB_CFG_EX02_HBUS_DISABLE: Disable H-Bus. {Default=1}.
11 RWX PB_CFG_EX03_HBUS_DISABLE: Disable H-Bus. {Default=1}.
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301101F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EQ0: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EQ0: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EQ0: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EQ0: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 000000000301102A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EQ0: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EQ0: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EQ0: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EQ0: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EQ0: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EQ0: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EQ0: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EQ0: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 000000000301102B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ0.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EQ0: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EQ0: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EQ0: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EQ0: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EQ0: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EQ0: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EQ0: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EQ0: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 000000000301102C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ0.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EQ0.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011040 (SCOM)
0000000003011041 (SCOM1)
0000000003011042 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011043 (SCOM)
0000000003011044 (SCOM1)
0000000003011045 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011046 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011047 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301104A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EQ1.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EQ1.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EQ1.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EQ1: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EQ1: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EQ1: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EQ1: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EQ1: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EQ1: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EQ1: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EQ1: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EQ1: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EQ1: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EQ1: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EQ1: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EQ1: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EQ1: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EQ1: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EQ1: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EQ1: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EQ1: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EQ1: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EQ1: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EQ1: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EQ1: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301104B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EQ1: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EQ1: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EQ1: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EQ1: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EQ1: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EQ1: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EQ1: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EQ1: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EQ1: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EQ1: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EQ1: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EQ1: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EQ1: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301104C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EQ1: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EQ1: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EQ1: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EQ1: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EQ1: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EQ1: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EQ1: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EQ1: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EQ1: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EQ1: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EQ1: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EQ1: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EQ1: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301104D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EQ1: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EQ1: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EQ1: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EQ1: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EQ1: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EQ1: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EQ1: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EQ1: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EQ1: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EQ1: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EQ1: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EQ1: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EQ1: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EQ1: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EQ1: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EQ1: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EQ1: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EQ1: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EQ1: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EQ1: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EQ1: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EQ1: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EQ1: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EQ1: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EQ1: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EQ1: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EQ1: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EQ1: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EQ1: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EQ1: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EQ1: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EQ1: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301104E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EQ1: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EQ1: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EQ1: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EQ1: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EQ1: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EQ1: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EQ1: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EQ1: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EQ1: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EQ1: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EQ1: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EQ1: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EQ1: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EQ1: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EQ1: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EQ1: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EQ1: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EQ1: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EQ1: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EQ1: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EQ1: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EQ1: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EQ1: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EQ1: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EQ1: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EQ1: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EQ1: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EQ1: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EQ1: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EQ1: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EQ1: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EQ1: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301104F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EQ1: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EQ1: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EQ1: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EQ1: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EQ1: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EQ1: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EQ1: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EQ1: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EQ1: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EQ1: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EQ1: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EQ1: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EQ1: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EQ1: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EQ1: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EQ1: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EQ1: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EQ1: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EQ1: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EQ1: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EQ1: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EQ1: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EQ1: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EQ1: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EQ1: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EQ1: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EQ1: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EQ1: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EQ1: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EQ1: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EQ1: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EQ1: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011050 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EQ1: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EQ1: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EQ1: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EQ1: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EQ1: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EQ1: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EQ1: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EQ1: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EQ1: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EQ1: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EQ1: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EQ1: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EQ1: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EQ1: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EQ1: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EQ1: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EQ1: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EQ1: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EQ1: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EQ1: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EQ1: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EQ1: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EQ1: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EQ1: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EQ1: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EQ1: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EQ1: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EQ1: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EQ1: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EQ1: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EQ1: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EQ1: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011051 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EQ1: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EQ1: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EQ1: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EQ1: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EQ1: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EQ1: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EQ1: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EQ1: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EQ1: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EQ1: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EQ1: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EQ1: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EQ1: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EQ1: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EQ1: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EQ1: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EQ1: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EQ1: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EQ1: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EQ1: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EQ1: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EQ1: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EQ1: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EQ1: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EQ1: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EQ1: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EQ1: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EQ1: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EQ1: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EQ1: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EQ1: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EQ1: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011052 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EQ1: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EQ1: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EQ1: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EQ1: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EQ1: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EQ1: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EQ1: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EQ1: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EQ1: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EQ1: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EQ1: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EQ1: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EQ1: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EQ1: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EQ1: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EQ1: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EQ1: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EQ1: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EQ1: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EQ1: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EQ1: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EQ1: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EQ1: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EQ1: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EQ1: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EQ1: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EQ1: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EQ1: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EQ1: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EQ1: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EQ1: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EQ1: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011053 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EQ1: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EQ1: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EQ1: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EQ1: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EQ1: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EQ1: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EQ1: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EQ1: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EQ1: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EQ1: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EQ1: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011054 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EQ1.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EQ1.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EQ1.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EQ1: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EQ1: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EQ1: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EQ1: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EQ1: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EQ1: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EQ1: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EQ1: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EQ1: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EQ1: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EQ1: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011055 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EQ1: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX pb_cfg_pbiasy_unit0_disable
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX pb_cfg_pbiasy_unit0_selcd
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301105A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EQ1: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EQ1: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301105B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EQ1: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EQ1: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EQ1: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EQ1: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EQ1: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EQ1: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EQ1: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EQ1: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EQ1: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EQ1: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301105C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EQ1: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EQ1: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EQ1: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EQ1: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EQ1: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EQ1: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EQ1: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EQ1: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EQ1: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EQ1: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301105D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EQ1: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EQ1: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EQ1: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EQ1: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EQ1: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EQ1: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EQ1: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301105E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EQ1.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EQ1.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX PB_CFG_EX04_HBUS_DISABLE: Disable H-Bus. {Default=1}.
9 RWX PB_CFG_EX05_HBUS_DISABLE: Disable H-Bus. {Default=1}.
10 RWX PB_CFG_EX06_HBUS_DISABLE: Disable H-Bus. {Default=1}.
11 RWX PB_CFG_EX07_HBUS_DISABLE: Disable H-Bus. {Default=1}.
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301105F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EQ1: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EQ1: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EQ1: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EQ1: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 000000000301106A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EQ1: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EQ1: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EQ1: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EQ1: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EQ1: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EQ1: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EQ1: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EQ1: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 000000000301106B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ1.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EQ1: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EQ1: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EQ1: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EQ1: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EQ1: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EQ1: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EQ1: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EQ1: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 000000000301106C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ1.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EQ1.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011080 (SCOM)
0000000003011081 (SCOM1)
0000000003011082 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011083 (SCOM)
0000000003011084 (SCOM1)
0000000003011085 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011086 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011087 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301108A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EQ2.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EQ2.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EQ2.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EQ2: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EQ2: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EQ2: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EQ2: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EQ2: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EQ2: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EQ2: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EQ2: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EQ2: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EQ2: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EQ2: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EQ2: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EQ2: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EQ2: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EQ2: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EQ2: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EQ2: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EQ2: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EQ2: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EQ2: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EQ2: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EQ2: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301108B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EQ2: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EQ2: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EQ2: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EQ2: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EQ2: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EQ2: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EQ2: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EQ2: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EQ2: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EQ2: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EQ2: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EQ2: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EQ2: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301108C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EQ2: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EQ2: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EQ2: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EQ2: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EQ2: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EQ2: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EQ2: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EQ2: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EQ2: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EQ2: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EQ2: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EQ2: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EQ2: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301108D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EQ2: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EQ2: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EQ2: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EQ2: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EQ2: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EQ2: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EQ2: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EQ2: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EQ2: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EQ2: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EQ2: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EQ2: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EQ2: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EQ2: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EQ2: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EQ2: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EQ2: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EQ2: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EQ2: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EQ2: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EQ2: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EQ2: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EQ2: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EQ2: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EQ2: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EQ2: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EQ2: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EQ2: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EQ2: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EQ2: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EQ2: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EQ2: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301108E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EQ2: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EQ2: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EQ2: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EQ2: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EQ2: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EQ2: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EQ2: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EQ2: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EQ2: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EQ2: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EQ2: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EQ2: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EQ2: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EQ2: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EQ2: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EQ2: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EQ2: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EQ2: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EQ2: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EQ2: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EQ2: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EQ2: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EQ2: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EQ2: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EQ2: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EQ2: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EQ2: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EQ2: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EQ2: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EQ2: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EQ2: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EQ2: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301108F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EQ2: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EQ2: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EQ2: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EQ2: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EQ2: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EQ2: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EQ2: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EQ2: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EQ2: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EQ2: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EQ2: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EQ2: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EQ2: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EQ2: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EQ2: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EQ2: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EQ2: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EQ2: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EQ2: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EQ2: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EQ2: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EQ2: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EQ2: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EQ2: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EQ2: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EQ2: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EQ2: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EQ2: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EQ2: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EQ2: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EQ2: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EQ2: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011090 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EQ2: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EQ2: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EQ2: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EQ2: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EQ2: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EQ2: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EQ2: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EQ2: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EQ2: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EQ2: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EQ2: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EQ2: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EQ2: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EQ2: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EQ2: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EQ2: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EQ2: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EQ2: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EQ2: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EQ2: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EQ2: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EQ2: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EQ2: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EQ2: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EQ2: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EQ2: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EQ2: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EQ2: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EQ2: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EQ2: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EQ2: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EQ2: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011091 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EQ2: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EQ2: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EQ2: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EQ2: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EQ2: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EQ2: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EQ2: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EQ2: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EQ2: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EQ2: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EQ2: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EQ2: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EQ2: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EQ2: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EQ2: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EQ2: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EQ2: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EQ2: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EQ2: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EQ2: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EQ2: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EQ2: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EQ2: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EQ2: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EQ2: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EQ2: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EQ2: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EQ2: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EQ2: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EQ2: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EQ2: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EQ2: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011092 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EQ2: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EQ2: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EQ2: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EQ2: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EQ2: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EQ2: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EQ2: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EQ2: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EQ2: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EQ2: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EQ2: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EQ2: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EQ2: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EQ2: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EQ2: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EQ2: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EQ2: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EQ2: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EQ2: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EQ2: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EQ2: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EQ2: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EQ2: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EQ2: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EQ2: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EQ2: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EQ2: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EQ2: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EQ2: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EQ2: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EQ2: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EQ2: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011093 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EQ2: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EQ2: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EQ2: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EQ2: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EQ2: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EQ2: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EQ2: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EQ2: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EQ2: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EQ2: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EQ2: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011094 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EQ2.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EQ2.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EQ2.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EQ2: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EQ2: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EQ2: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EQ2: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EQ2: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EQ2: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EQ2: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EQ2: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EQ2: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EQ2: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EQ2: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011095 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EQ2: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX pb_cfg_pbiasy_unit0_disable
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX pb_cfg_pbiasy_unit0_selcd
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301109A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EQ2: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EQ2: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301109B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EQ2: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EQ2: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EQ2: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EQ2: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EQ2: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EQ2: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EQ2: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EQ2: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EQ2: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EQ2: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301109C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EQ2: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EQ2: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EQ2: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EQ2: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EQ2: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EQ2: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EQ2: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EQ2: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EQ2: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EQ2: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301109D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EQ2: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EQ2: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EQ2: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EQ2: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EQ2: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EQ2: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EQ2: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301109E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EQ2.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EQ2.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX PB_CFG_EX08_HBUS_DISABLE: Disable H-Bus. {Default=1}.
9 RWX PB_CFG_EX09_HBUS_DISABLE: Disable H-Bus. {Default=1}.
10 RWX PB_CFG_EX10_HBUS_DISABLE: Disable H-Bus. {Default=1}.
11 RWX PB_CFG_EX11_HBUS_DISABLE: Disable H-Bus. {Default=1}.
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301109F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EQ2: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EQ2: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EQ2: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EQ2: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 00000000030110AA (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EQ2: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EQ2: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EQ2: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EQ2: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EQ2: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EQ2: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EQ2: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EQ2: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 00000000030110AB (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ2.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EQ2: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EQ2: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EQ2: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EQ2: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EQ2: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EQ2: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EQ2: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EQ2: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 00000000030110AC (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ2.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EQ2.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 00000000030110C0 (SCOM)
00000000030110C1 (SCOM1)
00000000030110C2 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 00000000030110C3 (SCOM)
00000000030110C4 (SCOM1)
00000000030110C5 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 00000000030110C6 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 00000000030110C7 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 00000000030110CA (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EQ3.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EQ3.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EQ3.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EQ3: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EQ3: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EQ3: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EQ3: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EQ3: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EQ3: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EQ3: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EQ3: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EQ3: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EQ3: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EQ3: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EQ3: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EQ3: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EQ3: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EQ3: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EQ3: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EQ3: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EQ3: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EQ3: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EQ3: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EQ3: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EQ3: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 00000000030110CB (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EQ3: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EQ3: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EQ3: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EQ3: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EQ3: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EQ3: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EQ3: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EQ3: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EQ3: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EQ3: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EQ3: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EQ3: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EQ3: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 00000000030110CC (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EQ3: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EQ3: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EQ3: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EQ3: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EQ3: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EQ3: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EQ3: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EQ3: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EQ3: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EQ3: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EQ3: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EQ3: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EQ3: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 00000000030110CD (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EQ3: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EQ3: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EQ3: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EQ3: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EQ3: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EQ3: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EQ3: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EQ3: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EQ3: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EQ3: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EQ3: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EQ3: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EQ3: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EQ3: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EQ3: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EQ3: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EQ3: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EQ3: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EQ3: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EQ3: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EQ3: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EQ3: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EQ3: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EQ3: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EQ3: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EQ3: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EQ3: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EQ3: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EQ3: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EQ3: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EQ3: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EQ3: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 00000000030110CE (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EQ3: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EQ3: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EQ3: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EQ3: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EQ3: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EQ3: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EQ3: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EQ3: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EQ3: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EQ3: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EQ3: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EQ3: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EQ3: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EQ3: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EQ3: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EQ3: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EQ3: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EQ3: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EQ3: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EQ3: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EQ3: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EQ3: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EQ3: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EQ3: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EQ3: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EQ3: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EQ3: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EQ3: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EQ3: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EQ3: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EQ3: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EQ3: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 00000000030110CF (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EQ3: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EQ3: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EQ3: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EQ3: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EQ3: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EQ3: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EQ3: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EQ3: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EQ3: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EQ3: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EQ3: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EQ3: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EQ3: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EQ3: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EQ3: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EQ3: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EQ3: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EQ3: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EQ3: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EQ3: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EQ3: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EQ3: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EQ3: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EQ3: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EQ3: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EQ3: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EQ3: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EQ3: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EQ3: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EQ3: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EQ3: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EQ3: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 00000000030110D0 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EQ3: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EQ3: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EQ3: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EQ3: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EQ3: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EQ3: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EQ3: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EQ3: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EQ3: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EQ3: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EQ3: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EQ3: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EQ3: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EQ3: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EQ3: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EQ3: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EQ3: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EQ3: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EQ3: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EQ3: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EQ3: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EQ3: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EQ3: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EQ3: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EQ3: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EQ3: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EQ3: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EQ3: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EQ3: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EQ3: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EQ3: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EQ3: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 00000000030110D1 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EQ3: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EQ3: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EQ3: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EQ3: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EQ3: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EQ3: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EQ3: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EQ3: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EQ3: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EQ3: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EQ3: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EQ3: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EQ3: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EQ3: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EQ3: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EQ3: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EQ3: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EQ3: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EQ3: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EQ3: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EQ3: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EQ3: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EQ3: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EQ3: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EQ3: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EQ3: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EQ3: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EQ3: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EQ3: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EQ3: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EQ3: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EQ3: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 00000000030110D2 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EQ3: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EQ3: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EQ3: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EQ3: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EQ3: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EQ3: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EQ3: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EQ3: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EQ3: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EQ3: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EQ3: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EQ3: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EQ3: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EQ3: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EQ3: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EQ3: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EQ3: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EQ3: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EQ3: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EQ3: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EQ3: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EQ3: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EQ3: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EQ3: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EQ3: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EQ3: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EQ3: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EQ3: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EQ3: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EQ3: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EQ3: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EQ3: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 00000000030110D3 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EQ3: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EQ3: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EQ3: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EQ3: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EQ3: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EQ3: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EQ3: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EQ3: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EQ3: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EQ3: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EQ3: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 00000000030110D4 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EQ3.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EQ3.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EQ3.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EQ3: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EQ3: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EQ3: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EQ3: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EQ3: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EQ3: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EQ3: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EQ3: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EQ3: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EQ3: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EQ3: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 00000000030110D5 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EQ3: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX pb_cfg_pbiasy_unit0_disable
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX pb_cfg_pbiasy_unit0_selcd
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 00000000030110DA (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EQ3: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EQ3: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 00000000030110DB (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EQ3: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EQ3: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EQ3: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EQ3: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EQ3: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EQ3: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EQ3: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EQ3: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EQ3: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EQ3: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 00000000030110DC (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EQ3: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EQ3: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EQ3: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EQ3: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EQ3: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EQ3: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EQ3: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EQ3: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EQ3: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EQ3: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 00000000030110DD (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EQ3: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EQ3: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EQ3: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EQ3: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EQ3: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EQ3: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EQ3: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 00000000030110DE (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EQ3.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EQ3.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX PB_CFG_EX12_HBUS_DISABLE: Disable H-Bus. {Default=1}.
9 RWX PB_CFG_EX13_HBUS_DISABLE: Disable H-Bus. {Default=1}.
10 RWX PB_CFG_EX14_HBUS_DISABLE: Disable H-Bus. {Default=1}.
11 RWX PB_CFG_EX15_HBUS_DISABLE: Disable H-Bus. {Default=1}.
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 00000000030110DF (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EQ3: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EQ3: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EQ3: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EQ3: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 00000000030110EA (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EQ3: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EQ3: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EQ3: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EQ3: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EQ3: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EQ3: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EQ3: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EQ3: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 00000000030110EB (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ3.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EQ3: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EQ3: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EQ3: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EQ3: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EQ3: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EQ3: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EQ3: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EQ3: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 00000000030110EC (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ3.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EQ3.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011100 (SCOM)
0000000003011101 (SCOM1)
0000000003011102 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011103 (SCOM)
0000000003011104 (SCOM1)
0000000003011105 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011106 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011107 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301110A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EQ4.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EQ4.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EQ4.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EQ4: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EQ4: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EQ4: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EQ4: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EQ4: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EQ4: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EQ4: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EQ4: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EQ4: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EQ4: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EQ4: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EQ4: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EQ4: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EQ4: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EQ4: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EQ4: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EQ4: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EQ4: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EQ4: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EQ4: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EQ4: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EQ4: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301110B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EQ4: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EQ4: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EQ4: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EQ4: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EQ4: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EQ4: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EQ4: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EQ4: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EQ4: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EQ4: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EQ4: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EQ4: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EQ4: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301110C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EQ4: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EQ4: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EQ4: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EQ4: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EQ4: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EQ4: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EQ4: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EQ4: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EQ4: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EQ4: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EQ4: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EQ4: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EQ4: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301110D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EQ4: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EQ4: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EQ4: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EQ4: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EQ4: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EQ4: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EQ4: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EQ4: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EQ4: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EQ4: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EQ4: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EQ4: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EQ4: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EQ4: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EQ4: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EQ4: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EQ4: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EQ4: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EQ4: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EQ4: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EQ4: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EQ4: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EQ4: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EQ4: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EQ4: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EQ4: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EQ4: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EQ4: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EQ4: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EQ4: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EQ4: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EQ4: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301110E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EQ4: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EQ4: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EQ4: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EQ4: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EQ4: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EQ4: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EQ4: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EQ4: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EQ4: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EQ4: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EQ4: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EQ4: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EQ4: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EQ4: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EQ4: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EQ4: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EQ4: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EQ4: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EQ4: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EQ4: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EQ4: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EQ4: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EQ4: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EQ4: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EQ4: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EQ4: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EQ4: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EQ4: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EQ4: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EQ4: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EQ4: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EQ4: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301110F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EQ4: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EQ4: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EQ4: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EQ4: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EQ4: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EQ4: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EQ4: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EQ4: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EQ4: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EQ4: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EQ4: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EQ4: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EQ4: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EQ4: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EQ4: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EQ4: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EQ4: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EQ4: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EQ4: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EQ4: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EQ4: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EQ4: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EQ4: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EQ4: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EQ4: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EQ4: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EQ4: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EQ4: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EQ4: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EQ4: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EQ4: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EQ4: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011110 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EQ4: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EQ4: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EQ4: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EQ4: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EQ4: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EQ4: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EQ4: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EQ4: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EQ4: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EQ4: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EQ4: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EQ4: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EQ4: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EQ4: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EQ4: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EQ4: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EQ4: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EQ4: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EQ4: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EQ4: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EQ4: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EQ4: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EQ4: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EQ4: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EQ4: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EQ4: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EQ4: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EQ4: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EQ4: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EQ4: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EQ4: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EQ4: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011111 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EQ4: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EQ4: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EQ4: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EQ4: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EQ4: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EQ4: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EQ4: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EQ4: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EQ4: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EQ4: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EQ4: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EQ4: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EQ4: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EQ4: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EQ4: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EQ4: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EQ4: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EQ4: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EQ4: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EQ4: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EQ4: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EQ4: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EQ4: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EQ4: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EQ4: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EQ4: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EQ4: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EQ4: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EQ4: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EQ4: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EQ4: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EQ4: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011112 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EQ4: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EQ4: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EQ4: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EQ4: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EQ4: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EQ4: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EQ4: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EQ4: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EQ4: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EQ4: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EQ4: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EQ4: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EQ4: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EQ4: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EQ4: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EQ4: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EQ4: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EQ4: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EQ4: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EQ4: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EQ4: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EQ4: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EQ4: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EQ4: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EQ4: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EQ4: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EQ4: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EQ4: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EQ4: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EQ4: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EQ4: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EQ4: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011113 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EQ4: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EQ4: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EQ4: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EQ4: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EQ4: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EQ4: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EQ4: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EQ4: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EQ4: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EQ4: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EQ4: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011114 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EQ4.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EQ4.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EQ4.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EQ4: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EQ4: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EQ4: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EQ4: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EQ4: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EQ4: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EQ4: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EQ4: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EQ4: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EQ4: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EQ4: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011115 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EQ4: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX pb_cfg_pbiasy_unit0_disable
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX pb_cfg_pbiasy_unit0_selcd
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301111A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EQ4: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EQ4: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301111B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EQ4: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EQ4: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EQ4: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EQ4: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EQ4: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EQ4: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EQ4: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EQ4: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EQ4: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EQ4: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301111C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EQ4: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EQ4: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EQ4: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EQ4: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EQ4: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EQ4: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EQ4: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EQ4: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EQ4: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EQ4: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301111D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EQ4: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EQ4: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EQ4: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EQ4: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EQ4: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EQ4: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EQ4: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301111E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EQ4.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EQ4.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX PB_CFG_EX16_HBUS_DISABLE: Disable H-Bus. {Default=1}.
9 RWX PB_CFG_EX17_HBUS_DISABLE: Disable H-Bus. {Default=1}.
10 RWX PB_CFG_EX18_HBUS_DISABLE: Disable H-Bus. {Default=1}.
11 RWX PB_CFG_EX19_HBUS_DISABLE: Disable H-Bus. {Default=1}.
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301111F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EQ4: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EQ4: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EQ4: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EQ4: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 000000000301112A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EQ4: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EQ4: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EQ4: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EQ4: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EQ4: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EQ4: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EQ4: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EQ4: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 000000000301112B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ4.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EQ4: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EQ4: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EQ4: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EQ4: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EQ4: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EQ4: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EQ4: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EQ4: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 000000000301112C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ4.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EQ4.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011140 (SCOM)
0000000003011141 (SCOM1)
0000000003011142 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ5.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011143 (SCOM)
0000000003011144 (SCOM1)
0000000003011145 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ5.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011146 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ5.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011147 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ5.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301114A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EQ5.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EQ5.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EQ5.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EQ5: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EQ5: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EQ5: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EQ5: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EQ5: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EQ5: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EQ5: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EQ5: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EQ5: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EQ5: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EQ5: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EQ5: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EQ5: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EQ5: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EQ5: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EQ5: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EQ5: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EQ5: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EQ5: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EQ5: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EQ5: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EQ5: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301114B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EQ5: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EQ5: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EQ5: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EQ5: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EQ5: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EQ5: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EQ5: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EQ5: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EQ5: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EQ5: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EQ5: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EQ5: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EQ5: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301114C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EQ5: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EQ5: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EQ5: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EQ5: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EQ5: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EQ5: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EQ5: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EQ5: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EQ5: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EQ5: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EQ5: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EQ5: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EQ5: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301114D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EQ5: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EQ5: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EQ5: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EQ5: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EQ5: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EQ5: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EQ5: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EQ5: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EQ5: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EQ5: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EQ5: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EQ5: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EQ5: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EQ5: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EQ5: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EQ5: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EQ5: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EQ5: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EQ5: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EQ5: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EQ5: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EQ5: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EQ5: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EQ5: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EQ5: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EQ5: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EQ5: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EQ5: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EQ5: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EQ5: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EQ5: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EQ5: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301114E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EQ5: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EQ5: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EQ5: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EQ5: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EQ5: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EQ5: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EQ5: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EQ5: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EQ5: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EQ5: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EQ5: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EQ5: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EQ5: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EQ5: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EQ5: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EQ5: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EQ5: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EQ5: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EQ5: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EQ5: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EQ5: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EQ5: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EQ5: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EQ5: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EQ5: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EQ5: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EQ5: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EQ5: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EQ5: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EQ5: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EQ5: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EQ5: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301114F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EQ5: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EQ5: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EQ5: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EQ5: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EQ5: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EQ5: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EQ5: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EQ5: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EQ5: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EQ5: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EQ5: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EQ5: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EQ5: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EQ5: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EQ5: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EQ5: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EQ5: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EQ5: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EQ5: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EQ5: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EQ5: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EQ5: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EQ5: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EQ5: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EQ5: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EQ5: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EQ5: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EQ5: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EQ5: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EQ5: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EQ5: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EQ5: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011150 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EQ5: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EQ5: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EQ5: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EQ5: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EQ5: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EQ5: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EQ5: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EQ5: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EQ5: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EQ5: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EQ5: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EQ5: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EQ5: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EQ5: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EQ5: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EQ5: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EQ5: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EQ5: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EQ5: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EQ5: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EQ5: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EQ5: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EQ5: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EQ5: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EQ5: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EQ5: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EQ5: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EQ5: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EQ5: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EQ5: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EQ5: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EQ5: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011151 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EQ5: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EQ5: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EQ5: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EQ5: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EQ5: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EQ5: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EQ5: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EQ5: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EQ5: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EQ5: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EQ5: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EQ5: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EQ5: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EQ5: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EQ5: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EQ5: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EQ5: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EQ5: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EQ5: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EQ5: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EQ5: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EQ5: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EQ5: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EQ5: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EQ5: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EQ5: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EQ5: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EQ5: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EQ5: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EQ5: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EQ5: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EQ5: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011152 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EQ5: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EQ5: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EQ5: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EQ5: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EQ5: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EQ5: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EQ5: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EQ5: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EQ5: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EQ5: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EQ5: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EQ5: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EQ5: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EQ5: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EQ5: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EQ5: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EQ5: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EQ5: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EQ5: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EQ5: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EQ5: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EQ5: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EQ5: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EQ5: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EQ5: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EQ5: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EQ5: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EQ5: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EQ5: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EQ5: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EQ5: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EQ5: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011153 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EQ5: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EQ5: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EQ5: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EQ5: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EQ5: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EQ5: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EQ5: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EQ5: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EQ5: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EQ5: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EQ5: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011154 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EQ5.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EQ5.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EQ5.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EQ5: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EQ5: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EQ5: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EQ5: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EQ5: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EQ5: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EQ5: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EQ5: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EQ5: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EQ5: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EQ5: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011155 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EQ5: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX pb_cfg_pbiasy_unit0_disable
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX pb_cfg_pbiasy_unit0_selcd
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301115A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EQ5: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EQ5: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301115B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EQ5: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EQ5: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EQ5: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EQ5: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EQ5: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EQ5: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EQ5: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EQ5: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EQ5: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EQ5: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301115C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EQ5: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EQ5: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EQ5: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EQ5: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EQ5: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EQ5: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EQ5: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EQ5: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EQ5: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EQ5: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301115D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EQ5: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EQ5: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EQ5: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EQ5: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EQ5: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EQ5: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EQ5: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301115E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EQ5.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EQ5.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX PB_CFG_EX20_HBUS_DISABLE: Disable H-Bus. {Default=1}.
9 RWX PB_CFG_EX21_HBUS_DISABLE: Disable H-Bus. {Default=1}.
10 RWX PB_CFG_EX22_HBUS_DISABLE: Disable H-Bus. {Default=1}.
11 RWX PB_CFG_EX23_HBUS_DISABLE: Disable H-Bus. {Default=1}.
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301115F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EQ5: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EQ5: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EQ5: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EQ5: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 000000000301116A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EQ5: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EQ5: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EQ5: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EQ5: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EQ5: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EQ5: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EQ5: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EQ5: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 000000000301116B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ5.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EQ5: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EQ5: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EQ5: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EQ5: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EQ5: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EQ5: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EQ5: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EQ5: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 000000000301116C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ5.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EQ5.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011180 (SCOM)
0000000003011181 (SCOM1)
0000000003011182 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ6.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011183 (SCOM)
0000000003011184 (SCOM1)
0000000003011185 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ6.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011186 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ6.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011187 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ6.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301118A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EQ6.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EQ6.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EQ6.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EQ6: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EQ6: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EQ6: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EQ6: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EQ6: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EQ6: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EQ6: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EQ6: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EQ6: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EQ6: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EQ6: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EQ6: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EQ6: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EQ6: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EQ6: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EQ6: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EQ6: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EQ6: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EQ6: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EQ6: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EQ6: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EQ6: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301118B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EQ6: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EQ6: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EQ6: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EQ6: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EQ6: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EQ6: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EQ6: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EQ6: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EQ6: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EQ6: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EQ6: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EQ6: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EQ6: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301118C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EQ6: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EQ6: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EQ6: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EQ6: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EQ6: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EQ6: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EQ6: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EQ6: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EQ6: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EQ6: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EQ6: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EQ6: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EQ6: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301118D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EQ6: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EQ6: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EQ6: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EQ6: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EQ6: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EQ6: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EQ6: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EQ6: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EQ6: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EQ6: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EQ6: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EQ6: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EQ6: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EQ6: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EQ6: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EQ6: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EQ6: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EQ6: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EQ6: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EQ6: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EQ6: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EQ6: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EQ6: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EQ6: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EQ6: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EQ6: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EQ6: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EQ6: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EQ6: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EQ6: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EQ6: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EQ6: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301118E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EQ6: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EQ6: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EQ6: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EQ6: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EQ6: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EQ6: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EQ6: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EQ6: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EQ6: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EQ6: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EQ6: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EQ6: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EQ6: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EQ6: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EQ6: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EQ6: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EQ6: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EQ6: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EQ6: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EQ6: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EQ6: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EQ6: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EQ6: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EQ6: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EQ6: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EQ6: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EQ6: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EQ6: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EQ6: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EQ6: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EQ6: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EQ6: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301118F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EQ6: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EQ6: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EQ6: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EQ6: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EQ6: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EQ6: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EQ6: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EQ6: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EQ6: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EQ6: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EQ6: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EQ6: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EQ6: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EQ6: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EQ6: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EQ6: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EQ6: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EQ6: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EQ6: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EQ6: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EQ6: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EQ6: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EQ6: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EQ6: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EQ6: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EQ6: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EQ6: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EQ6: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EQ6: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EQ6: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EQ6: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EQ6: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011190 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EQ6: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EQ6: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EQ6: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EQ6: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EQ6: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EQ6: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EQ6: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EQ6: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EQ6: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EQ6: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EQ6: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EQ6: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EQ6: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EQ6: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EQ6: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EQ6: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EQ6: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EQ6: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EQ6: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EQ6: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EQ6: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EQ6: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EQ6: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EQ6: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EQ6: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EQ6: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EQ6: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EQ6: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EQ6: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EQ6: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EQ6: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EQ6: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011191 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EQ6: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EQ6: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EQ6: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EQ6: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EQ6: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EQ6: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EQ6: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EQ6: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EQ6: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EQ6: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EQ6: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EQ6: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EQ6: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EQ6: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EQ6: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EQ6: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EQ6: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EQ6: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EQ6: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EQ6: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EQ6: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EQ6: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EQ6: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EQ6: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EQ6: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EQ6: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EQ6: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EQ6: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EQ6: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EQ6: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EQ6: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EQ6: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011192 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EQ6: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EQ6: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EQ6: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EQ6: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EQ6: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EQ6: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EQ6: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EQ6: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EQ6: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EQ6: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EQ6: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EQ6: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EQ6: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EQ6: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EQ6: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EQ6: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EQ6: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EQ6: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EQ6: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EQ6: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EQ6: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EQ6: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EQ6: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EQ6: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EQ6: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EQ6: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EQ6: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EQ6: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EQ6: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EQ6: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EQ6: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EQ6: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011193 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EQ6: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EQ6: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EQ6: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EQ6: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EQ6: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EQ6: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EQ6: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EQ6: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EQ6: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EQ6: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EQ6: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011194 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EQ6.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EQ6.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EQ6.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EQ6: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EQ6: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EQ6: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EQ6: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EQ6: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EQ6: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EQ6: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EQ6: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EQ6: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EQ6: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EQ6: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011195 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EQ6: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX pb_cfg_pbiasy_unit0_disable
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX pb_cfg_pbiasy_unit0_selcd
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301119A (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EQ6: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EQ6: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301119B (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EQ6: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EQ6: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EQ6: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EQ6: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EQ6: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EQ6: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EQ6: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EQ6: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EQ6: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EQ6: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301119C (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EQ6: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EQ6: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EQ6: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EQ6: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EQ6: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EQ6: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EQ6: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EQ6: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EQ6: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EQ6: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301119D (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EQ6: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EQ6: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EQ6: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EQ6: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EQ6: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EQ6: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EQ6: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301119E (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EQ6.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EQ6.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX PB_CFG_EX24_HBUS_DISABLE: Disable H-Bus. {Default=1}.
9 RWX PB_CFG_EX25_HBUS_DISABLE: Disable H-Bus. {Default=1}.
10 RWX PB_CFG_EX26_HBUS_DISABLE: Disable H-Bus. {Default=1}.
11 RWX PB_CFG_EX27_HBUS_DISABLE: Disable H-Bus. {Default=1}.
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301119F (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EQ6: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EQ6: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EQ6: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EQ6: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 00000000030111AA (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EQ6: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EQ6: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EQ6: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EQ6: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EQ6: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EQ6: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EQ6: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EQ6: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 00000000030111AB (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ6.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EQ6: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EQ6: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EQ6: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EQ6: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EQ6: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EQ6: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EQ6: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EQ6: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 00000000030111AC (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ6.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EQ6.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 00000000030111C0 (SCOM)
00000000030111C1 (SCOM1)
00000000030111C2 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ7.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 00000000030111C3 (SCOM)
00000000030111C4 (SCOM1)
00000000030111C5 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ7.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 00000000030111C6 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ7.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 00000000030111C7 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EQ7.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 00000000030111CA (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EQ7.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EQ7.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EQ7.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EQ7: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EQ7: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EQ7: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EQ7: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EQ7: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EQ7: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EQ7: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EQ7: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EQ7: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EQ7: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EQ7: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EQ7: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EQ7: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EQ7: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EQ7: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EQ7: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EQ7: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EQ7: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EQ7: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EQ7: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EQ7: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EQ7: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 00000000030111CB (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EQ7: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EQ7: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EQ7: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EQ7: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EQ7: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EQ7: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EQ7: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EQ7: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EQ7: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EQ7: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EQ7: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EQ7: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EQ7: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 00000000030111CC (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EQ7: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EQ7: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EQ7: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EQ7: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EQ7: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EQ7: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EQ7: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EQ7: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EQ7: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EQ7: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EQ7: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EQ7: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EQ7: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 00000000030111CD (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EQ7: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EQ7: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EQ7: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EQ7: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EQ7: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EQ7: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EQ7: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EQ7: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EQ7: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EQ7: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EQ7: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EQ7: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EQ7: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EQ7: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EQ7: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EQ7: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EQ7: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EQ7: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EQ7: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EQ7: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EQ7: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EQ7: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EQ7: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EQ7: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EQ7: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EQ7: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EQ7: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EQ7: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EQ7: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EQ7: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EQ7: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EQ7: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 00000000030111CE (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EQ7: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EQ7: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EQ7: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EQ7: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EQ7: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EQ7: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EQ7: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EQ7: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EQ7: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EQ7: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EQ7: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EQ7: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EQ7: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EQ7: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EQ7: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EQ7: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EQ7: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EQ7: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EQ7: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EQ7: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EQ7: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EQ7: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EQ7: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EQ7: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EQ7: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EQ7: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EQ7: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EQ7: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EQ7: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EQ7: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EQ7: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EQ7: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 00000000030111CF (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EQ7: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EQ7: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EQ7: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EQ7: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EQ7: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EQ7: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EQ7: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EQ7: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EQ7: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EQ7: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EQ7: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EQ7: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EQ7: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EQ7: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EQ7: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EQ7: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EQ7: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EQ7: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EQ7: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EQ7: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EQ7: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EQ7: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EQ7: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EQ7: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EQ7: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EQ7: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EQ7: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EQ7: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EQ7: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EQ7: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EQ7: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EQ7: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 00000000030111D0 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EQ7: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EQ7: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EQ7: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EQ7: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EQ7: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EQ7: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EQ7: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EQ7: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EQ7: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EQ7: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EQ7: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EQ7: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EQ7: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EQ7: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EQ7: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EQ7: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EQ7: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EQ7: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EQ7: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EQ7: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EQ7: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EQ7: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EQ7: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EQ7: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EQ7: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EQ7: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EQ7: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EQ7: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EQ7: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EQ7: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EQ7: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EQ7: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 00000000030111D1 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EQ7: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EQ7: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EQ7: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EQ7: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EQ7: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EQ7: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EQ7: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EQ7: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EQ7: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EQ7: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EQ7: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EQ7: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EQ7: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EQ7: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EQ7: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EQ7: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EQ7: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EQ7: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EQ7: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EQ7: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EQ7: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EQ7: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EQ7: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EQ7: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EQ7: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EQ7: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EQ7: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EQ7: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EQ7: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EQ7: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EQ7: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EQ7: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 00000000030111D2 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EQ7: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EQ7: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EQ7: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EQ7: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EQ7: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EQ7: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EQ7: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EQ7: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EQ7: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EQ7: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EQ7: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EQ7: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EQ7: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EQ7: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EQ7: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EQ7: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EQ7: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EQ7: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EQ7: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EQ7: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EQ7: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EQ7: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EQ7: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EQ7: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EQ7: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EQ7: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EQ7: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EQ7: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EQ7: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EQ7: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EQ7: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EQ7: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 00000000030111D3 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EQ7: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EQ7: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EQ7: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EQ7: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EQ7: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EQ7: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EQ7: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EQ7: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EQ7: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EQ7: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EQ7: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 00000000030111D4 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EQ7.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EQ7.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EQ7.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EQ7: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EQ7: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EQ7: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EQ7: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EQ7: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EQ7: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EQ7: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EQ7: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EQ7: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EQ7: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EQ7: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 00000000030111D5 (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EQ7: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX pb_cfg_pbiasy_unit0_disable
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX pb_cfg_pbiasy_unit0_selcd
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 00000000030111DA (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EQ7: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EQ7: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 00000000030111DB (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EQ7: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EQ7: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EQ7: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EQ7: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EQ7: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EQ7: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EQ7: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EQ7: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EQ7: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EQ7: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 00000000030111DC (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EQ7: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EQ7: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EQ7: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EQ7: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EQ7: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EQ7: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EQ7: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EQ7: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EQ7: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EQ7: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 00000000030111DD (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EQ7: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EQ7: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EQ7: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EQ7: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EQ7: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EQ7: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EQ7: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 00000000030111DE (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EQ7.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EQ7.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX PB_CFG_EX28_HBUS_DISABLE: Disable H-Bus. {Default=1}.
9 RWX PB_CFG_EX29_HBUS_DISABLE: Disable H-Bus. {Default=1}.
10 RWX PB_CFG_EX30_HBUS_DISABLE: Disable H-Bus. {Default=1}.
11 RWX PB_CFG_EX31_HBUS_DISABLE: Disable H-Bus. {Default=1}.
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 00000000030111DF (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EQ7: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EQ7: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EQ7: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EQ7: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 00000000030111EA (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EQ7: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EQ7: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EQ7: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EQ7: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EQ7: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EQ7: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EQ7: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EQ7: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 00000000030111EB (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EQ7.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EQ7: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EQ7: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EQ7: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EQ7: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EQ7: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EQ7: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EQ7: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EQ7: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 00000000030111EC (SCOM)
Name:PB.PB_COM.PB_SCOM_EQ7.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EQ7.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011200 (SCOM)
0000000003011201 (SCOM1)
0000000003011202 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011203 (SCOM)
0000000003011204 (SCOM1)
0000000003011205 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011206 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011207 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301120A (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EN1.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EN1.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EN1.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EN1: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EN1: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EN1: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EN1: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EN1: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EN1: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EN1: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EN1: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EN1: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EN1: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EN1: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EN1: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EN1: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EN1: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EN1: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EN1: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EN1: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EN1: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EN1: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EN1: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EN1: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EN1: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301120B (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EN1: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EN1: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EN1: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EN1: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EN1: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EN1: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EN1: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EN1: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EN1: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EN1: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EN1: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EN1: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EN1: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301120C (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EN1: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EN1: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EN1: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EN1: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EN1: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EN1: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EN1: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EN1: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EN1: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EN1: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EN1: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EN1: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EN1: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301120D (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EN1: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EN1: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EN1: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EN1: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EN1: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EN1: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EN1: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EN1: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EN1: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EN1: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EN1: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EN1: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EN1: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EN1: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EN1: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EN1: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EN1: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EN1: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EN1: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EN1: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EN1: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EN1: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EN1: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EN1: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EN1: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EN1: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EN1: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EN1: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EN1: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EN1: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EN1: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EN1: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301120E (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EN1: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EN1: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EN1: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EN1: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EN1: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EN1: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EN1: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EN1: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EN1: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EN1: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EN1: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EN1: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EN1: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EN1: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EN1: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EN1: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EN1: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EN1: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EN1: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EN1: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EN1: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EN1: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EN1: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EN1: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EN1: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EN1: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EN1: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EN1: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EN1: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EN1: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EN1: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EN1: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301120F (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EN1: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EN1: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EN1: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EN1: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EN1: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EN1: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EN1: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EN1: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EN1: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EN1: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EN1: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EN1: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EN1: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EN1: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EN1: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EN1: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EN1: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EN1: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EN1: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EN1: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EN1: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EN1: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EN1: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EN1: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EN1: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EN1: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EN1: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EN1: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EN1: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EN1: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EN1: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EN1: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011210 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EN1: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EN1: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EN1: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EN1: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EN1: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EN1: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EN1: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EN1: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EN1: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EN1: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EN1: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EN1: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EN1: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EN1: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EN1: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EN1: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EN1: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EN1: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EN1: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EN1: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EN1: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EN1: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EN1: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EN1: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EN1: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EN1: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EN1: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EN1: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EN1: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EN1: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EN1: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EN1: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011211 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EN1: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EN1: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EN1: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EN1: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EN1: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EN1: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EN1: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EN1: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EN1: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EN1: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EN1: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EN1: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EN1: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EN1: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EN1: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EN1: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EN1: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EN1: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EN1: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EN1: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EN1: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EN1: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EN1: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EN1: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EN1: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EN1: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EN1: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EN1: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EN1: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EN1: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EN1: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EN1: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011212 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EN1: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EN1: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EN1: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EN1: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EN1: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EN1: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EN1: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EN1: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EN1: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EN1: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EN1: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EN1: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EN1: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EN1: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EN1: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EN1: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EN1: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EN1: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EN1: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EN1: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EN1: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EN1: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EN1: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EN1: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EN1: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EN1: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EN1: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EN1: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EN1: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EN1: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EN1: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EN1: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011213 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EN1: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EN1: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EN1: configures the OC expiration time
12:16 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_LIMIT_AX6: OC outbound when the credit reaches this value. Set to 0 to disable. Default = 8.
17:21 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_LIMIT_AX7: OC outbound when the credit reaches this value. Set to 0 to disable. Default = 8.
22:23 RWX pb_cfg_spare1
24:27 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_MIN_AX6: CPB=0 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
28:31 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_MAX_AX6: CPB=1 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
32:33 RWX PB_CFG_DAT_LINK0_DON_PTL_VCINIT_AX6: Configures number of entries per VC. 00=32VC0. 01=24VC0,8VC1. 10=8VC0,24VC1. 11=16VC0,16VC1.

Dial enums:
DON_32_0=>0b00
DON_24_8=>0b01
DON_8_24=>0b10
DON_16_16=>0b11
34:35 RWX PB_CFG_DAT_LINK1_DON_PTL_VCINIT_AX7: Configures number of entries per VC. 00=32VC0. 01=24VC0,8VC1. 10=8VC0,24VC1. 11=16VC0,16VC1.

Dial enums:
DON_32_0=>0b00
DON_24_8=>0b01
DON_8_24=>0b10
DON_16_16=>0b11
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EN1: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EN1: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EN1: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EN1: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EN1: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EN1: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EN1: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EN1: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_MIN_AX7: CPB=0 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
60:63 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_MAX_AX7: CPB=1 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011214 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EN1.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EN1.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EN1.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EN1: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EN1: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EN1: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EN1: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EN1: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EN1: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EN1: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX PB_CFG_DAT_LINK_DOB_VC0_LIMIT_AX6: Configures DOB doff VC0 link credits. Default=64.
31:37 RWX PB_CFG_DAT_LINK_DOB_VC1_LIMIT_AX6: Configures DOB doff VC1 link credits. Default=64.
38:44 RWX PB_CFG_DAT_LINK_DOB_VC0_LIMIT_AX7: Configures DOB doff VC0 link credits. Default=64.
45:51 RWX PB_CFG_DAT_LINK_DOB_VC1_LIMIT_AX7: Configures DOB doff VC1 link credits. Default=64.
52 NCX PB_CFG_DAT_TOK_INIT_EN1: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EN1: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EN1: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EN1: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011215 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EN1: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX PB_CFG_PBIASY_PA6_DISABLE: Disable PA6 PBIASY. Default=0
17 RWX PB_CFG_PBIASY_PA7_DISABLE: Disable PA7 PBIASY. Default=0
18 RWX PB_CFG_PBIASY_PTL6_DISABLE: Disable PTL6 PBIASY. Default=0
19 RWX PB_CFG_PBIASY_PTL7_DISABLE: Disable PTL7 PBIASY. Default=0
20 RWX PB_CFG_PBIASY_PA6_SELCD: Select PA6 PBIASY mode C or mode D. C=0, D=1. Default=0
21 RWX PB_CFG_PBIASY_PA7_SELCD: Select PA7 PBIASY mode C or mode D. C=0, D=1. Default=0
22 RWX PB_CFG_PBIASY_PTL6_SELCD: Select PTL6 PBIASY mode C or mode D. C=0, D=1. Default=0
23 RWX PB_CFG_PBIASY_PTL7_SELCD: Select PTL7 PBIASY mode C or mode D. C=0, D=1. Default=0
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301121A (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EN1: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EN1: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301121B (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EN1: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EN1: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EN1: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EN1: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EN1: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EN1: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EN1: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EN1: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EN1: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EN1: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301121C (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EN1: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EN1: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EN1: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EN1: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EN1: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EN1: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EN1: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EN1: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EN1: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EN1: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301121D (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EN1: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EN1: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EN1: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EN1: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EN1: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EN1: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EN1: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301121E (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EN1.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EN1.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX pb_cfg_ex0_hbus_disable
9 RWX pb_cfg_ex1_hbus_disable
10 RWX pb_cfg_ex2_hbus_disable
11 RWX pb_cfg_ex3_hbus_disable
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301121F (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EN1: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EN1: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EN1: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EN1: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 000000000301122A (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EN1: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EN1: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EN1: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EN1: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EN1: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EN1: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EN1: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EN1: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 000000000301122B (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN1.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EN1: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EN1: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EN1: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EN1: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EN1: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EN1: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EN1: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EN1: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 000000000301122C (SCOM)
Name:PB.PB_COM.PB_SCOM_EN1.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EN1.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011240 (SCOM)
0000000003011241 (SCOM1)
0000000003011242 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011243 (SCOM)
0000000003011244 (SCOM1)
0000000003011245 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011246 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011247 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301124A (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EN2.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EN2.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EN2.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EN2: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EN2: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EN2: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EN2: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EN2: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EN2: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EN2: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EN2: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EN2: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EN2: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EN2: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EN2: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EN2: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EN2: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EN2: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EN2: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EN2: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EN2: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EN2: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EN2: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EN2: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EN2: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301124B (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EN2: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EN2: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EN2: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EN2: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EN2: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EN2: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EN2: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EN2: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EN2: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EN2: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EN2: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EN2: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EN2: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301124C (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EN2: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EN2: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EN2: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EN2: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EN2: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EN2: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EN2: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EN2: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EN2: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EN2: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EN2: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EN2: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EN2: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301124D (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EN2: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EN2: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EN2: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EN2: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EN2: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EN2: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EN2: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EN2: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EN2: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EN2: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EN2: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EN2: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EN2: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EN2: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EN2: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EN2: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EN2: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EN2: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EN2: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EN2: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EN2: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EN2: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EN2: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EN2: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EN2: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EN2: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EN2: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EN2: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EN2: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EN2: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EN2: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EN2: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301124E (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EN2: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EN2: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EN2: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EN2: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EN2: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EN2: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EN2: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EN2: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EN2: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EN2: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EN2: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EN2: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EN2: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EN2: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EN2: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EN2: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EN2: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EN2: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EN2: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EN2: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EN2: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EN2: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EN2: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EN2: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EN2: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EN2: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EN2: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EN2: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EN2: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EN2: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EN2: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EN2: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301124F (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EN2: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EN2: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EN2: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EN2: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EN2: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EN2: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EN2: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EN2: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EN2: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EN2: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EN2: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EN2: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EN2: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EN2: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EN2: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EN2: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EN2: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EN2: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EN2: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EN2: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EN2: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EN2: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EN2: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EN2: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EN2: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EN2: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EN2: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EN2: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EN2: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EN2: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EN2: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EN2: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011250 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EN2: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EN2: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EN2: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EN2: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EN2: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EN2: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EN2: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EN2: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EN2: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EN2: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EN2: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EN2: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EN2: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EN2: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EN2: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EN2: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EN2: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EN2: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EN2: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EN2: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EN2: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EN2: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EN2: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EN2: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EN2: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EN2: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EN2: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EN2: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EN2: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EN2: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EN2: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EN2: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011251 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EN2: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EN2: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EN2: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EN2: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EN2: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EN2: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EN2: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EN2: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EN2: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EN2: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EN2: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EN2: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EN2: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EN2: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EN2: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EN2: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EN2: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EN2: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EN2: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EN2: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EN2: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EN2: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EN2: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EN2: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EN2: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EN2: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EN2: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EN2: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EN2: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EN2: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EN2: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EN2: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011252 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EN2: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EN2: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EN2: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EN2: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EN2: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EN2: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EN2: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EN2: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EN2: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EN2: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EN2: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EN2: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EN2: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EN2: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EN2: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EN2: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EN2: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EN2: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EN2: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EN2: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EN2: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EN2: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EN2: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EN2: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EN2: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EN2: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EN2: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EN2: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EN2: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EN2: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EN2: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EN2: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011253 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EN2: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EN2: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EN2: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EN2: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EN2: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EN2: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EN2: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EN2: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EN2: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EN2: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EN2: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011254 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EN2.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EN2.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EN2.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EN2: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EN2: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EN2: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EN2: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EN2: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EN2: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EN2: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EN2: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EN2: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EN2: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EN2: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011255 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EN2: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX PB_CFG_PBIASY_MC3_DISABLE: Disable MC3 PBIASY. Default=0
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX PB_CFG_PBIASY_MC3_SELCD: Select MC3 PBIASY mode C or mode D. C=0, D=1. Default=0
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301125A (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EN2: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EN2: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301125B (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EN2: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EN2: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EN2: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EN2: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EN2: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EN2: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EN2: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EN2: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EN2: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EN2: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301125C (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EN2: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EN2: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EN2: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EN2: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EN2: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EN2: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EN2: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EN2: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EN2: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EN2: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301125D (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EN2: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EN2: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EN2: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EN2: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EN2: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EN2: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EN2: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301125E (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EN2.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EN2.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX pb_cfg_ex0_hbus_disable
9 RWX pb_cfg_ex1_hbus_disable
10 RWX pb_cfg_ex2_hbus_disable
11 RWX pb_cfg_ex3_hbus_disable
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301125F (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EN2: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EN2: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EN2: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EN2: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 000000000301126A (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EN2: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EN2: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EN2: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EN2: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EN2: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EN2: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EN2: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EN2: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 000000000301126B (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN2.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EN2: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EN2: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EN2: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EN2: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EN2: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EN2: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EN2: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EN2: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 000000000301126C (SCOM)
Name:PB.PB_COM.PB_SCOM_EN2.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EN2.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011280 (SCOM)
0000000003011281 (SCOM1)
0000000003011282 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011283 (SCOM)
0000000003011284 (SCOM1)
0000000003011285 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011286 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011287 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301128A (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EN3.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EN3.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EN3.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EN3: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EN3: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EN3: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EN3: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EN3: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EN3: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EN3: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EN3: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EN3: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EN3: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EN3: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EN3: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EN3: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EN3: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EN3: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EN3: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EN3: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EN3: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EN3: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EN3: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EN3: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EN3: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301128B (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EN3: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EN3: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EN3: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EN3: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EN3: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EN3: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EN3: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EN3: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EN3: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EN3: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EN3: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EN3: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EN3: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301128C (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EN3: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EN3: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EN3: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EN3: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EN3: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EN3: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EN3: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EN3: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EN3: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EN3: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EN3: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EN3: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EN3: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301128D (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EN3: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EN3: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EN3: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EN3: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EN3: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EN3: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EN3: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EN3: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EN3: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EN3: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EN3: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EN3: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EN3: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EN3: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EN3: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EN3: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EN3: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EN3: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EN3: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EN3: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EN3: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EN3: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EN3: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EN3: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EN3: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EN3: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EN3: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EN3: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EN3: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EN3: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EN3: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EN3: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301128E (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EN3: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EN3: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EN3: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EN3: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EN3: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EN3: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EN3: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EN3: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EN3: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EN3: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EN3: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EN3: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EN3: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EN3: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EN3: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EN3: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EN3: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EN3: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EN3: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EN3: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EN3: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EN3: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EN3: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EN3: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EN3: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EN3: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EN3: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EN3: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EN3: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EN3: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EN3: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EN3: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301128F (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EN3: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EN3: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EN3: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EN3: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EN3: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EN3: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EN3: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EN3: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EN3: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EN3: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EN3: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EN3: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EN3: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EN3: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EN3: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EN3: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EN3: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EN3: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EN3: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EN3: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EN3: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EN3: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EN3: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EN3: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EN3: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EN3: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EN3: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EN3: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EN3: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EN3: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EN3: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EN3: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011290 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EN3: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EN3: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EN3: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EN3: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EN3: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EN3: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EN3: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EN3: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EN3: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EN3: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EN3: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EN3: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EN3: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EN3: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EN3: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EN3: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EN3: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EN3: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EN3: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EN3: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EN3: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EN3: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EN3: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EN3: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EN3: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EN3: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EN3: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EN3: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EN3: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EN3: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EN3: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EN3: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011291 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EN3: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EN3: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EN3: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EN3: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EN3: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EN3: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EN3: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EN3: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EN3: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EN3: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EN3: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EN3: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EN3: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EN3: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EN3: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EN3: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EN3: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EN3: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EN3: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EN3: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EN3: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EN3: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EN3: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EN3: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EN3: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EN3: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EN3: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EN3: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EN3: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EN3: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EN3: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EN3: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011292 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EN3: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EN3: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EN3: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EN3: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EN3: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EN3: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EN3: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EN3: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EN3: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EN3: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EN3: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EN3: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EN3: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EN3: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EN3: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EN3: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EN3: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EN3: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EN3: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EN3: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EN3: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EN3: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EN3: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EN3: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EN3: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EN3: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EN3: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EN3: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EN3: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EN3: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EN3: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EN3: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011293 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EN3: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EN3: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EN3: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EN3: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EN3: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EN3: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EN3: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EN3: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EN3: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EN3: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EN3: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011294 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EN3.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EN3.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EN3.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EN3: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EN3: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EN3: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EN3: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EN3: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EN3: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EN3: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_EN3: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EN3: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EN3: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EN3: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011295 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EN3: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX PB_CFG_PBIASY_MC2_DISABLE: Disable MC2 PBIASY. Default=0
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX PB_CFG_PBIASY_MC2_SELCD: Select MC2 PBIASY mode C or mode D. C=0, D=1. Default=0
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301129A (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_PBN_EVENT_SEL0: Performance Monitor Event Bus 0:7 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
3:5 RWX PB_CFG_PBN_EVENT_SEL1: Performance Monitor Event Bus 8:15 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
6:8 RWX PB_CFG_PBN_EVENT_SEL2: Performance Monitor Event Bus 16:23 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
9:11 RWX PB_CFG_PBN_EVENT_SEL3: Performance Monitor Event Bus 24:31 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
12:14 RWX PB_CFG_PBN_EVENT_SEL4: Performance Monitor Event Bus 32:39 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
15:17 RWX PB_CFG_PBN_EVENT_SEL5: Performance Monitor Event Bus 40:47 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
18:20 RWX PB_CFG_PBN_EVENT_SEL6: Performance Monitor Event Bus 48:55 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
21:23 RWX PB_CFG_PBN_EVENT_SEL7: Performance Monitor Event Bus 56:63 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EN3: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EN3: bit-pair enable of PB events asserted on event bus
56 RWX PB_CFG_PBN_EVENT_PORT_SEL: Selects PMU rcmd port. 0=rcmd0&rcmd1, 1=rcmd2&rcmd3
57 RWX PB_CFG_PBN_EVENT_PORT_SEL2: Selects PMU rcmd port for events 32:51. 0=data_xfer, 1=rcmd2&rcmd3
58 RWX PB_CFG_CNPMN_PBN_MASK: PBN unit event bus mask. When set, unit event bus inputs are disabled. default=0.
59 RWX PB_CFG_CNPMN_MC2_MASK: MC2 unit event bus mask. When set, unit event bus inputs are disabled. default=0.
60 RWX PB_CFG_CNPMN_MC3_MASK: MC3 unit event bus mask. When set, unit event bus inputs are disabled. default=0.
61 RWX PB_CFG_CNPMN_VAS_MASK: VAS unit event bus mask. When set, unit event bus inputs are disabled. default=0.
62 RWX PB_CFG_CNPMN_INT_MASK: INT unit event bus mask. When set, unit event bus inputs are disabled. default=0.
63 RWX PB_CFG_CNPMN_PE1_MASK: PE1 unit event bus mask. When set, unit event bus inputs are disabled. default=0.

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301129B (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EN3: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EN3: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EN3: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EN3: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EN3: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EN3: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EN3: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EN3: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EN3: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EN3: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301129C (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EN3: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EN3: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EN3: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EN3: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EN3: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EN3: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EN3: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EN3: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EN3: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EN3: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301129D (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EN3: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EN3: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EN3: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EN3: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EN3: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EN3: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EN3: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301129E (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EN3.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EN3.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX pb_cfg_ex0_hbus_disable
9 RWX pb_cfg_ex1_hbus_disable
10 RWX pb_cfg_ex2_hbus_disable
11 RWX pb_cfg_ex3_hbus_disable
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301129F (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EN3: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EN3: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EN3: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EN3: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 00000000030112AA (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EN3: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EN3: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EN3: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EN3: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EN3: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EN3: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EN3: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EN3: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 00000000030112AB (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN3.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EN3: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EN3: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EN3: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EN3: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EN3: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EN3: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EN3: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EN3: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 00000000030112AC (SCOM)
Name:PB.PB_COM.PB_SCOM_EN3.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EN3.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 00000000030112C0 (SCOM)
00000000030112C1 (SCOM1)
00000000030112C2 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 00000000030112C3 (SCOM)
00000000030112C4 (SCOM1)
00000000030112C5 (SCOM2)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 00000000030112C6 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 00000000030112C7 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_EN4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 00000000030112CA (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_EN4.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_EN4.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_EN4.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_EN4: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_EN4: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_EN4: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_EN4: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_EN4: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_EN4: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_EN4: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_EN4: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_EN4: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_EN4: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_EN4: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_EN4: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_EN4: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_EN4: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_EN4: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_EN4: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_EN4: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_EN4: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_EN4: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_EN4: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_EN4: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_EN4: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 00000000030112CB (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_EN4: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_EN4: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_EN4: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_EN4: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_EN4: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_EN4: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_EN4: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_EN4: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_EN4: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_EN4: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_EN4: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_EN4: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_EN4: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 00000000030112CC (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_EN4: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_EN4: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_EN4: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_EN4: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_EN4: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_EN4: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_EN4: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_EN4: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_EN4: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_EN4: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_EN4: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_EN4: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_EN4: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 00000000030112CD (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_EN4: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_EN4: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_EN4: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_EN4: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_EN4: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_EN4: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_EN4: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_EN4: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_EN4: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_EN4: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_EN4: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_EN4: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_EN4: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_EN4: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_EN4: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_EN4: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_EN4: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_EN4: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_EN4: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_EN4: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_EN4: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_EN4: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_EN4: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_EN4: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_EN4: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_EN4: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_EN4: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_EN4: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_EN4: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_EN4: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_EN4: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_EN4: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 00000000030112CE (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_EN4: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_EN4: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_EN4: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_EN4: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_EN4: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_EN4: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_EN4: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_EN4: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_EN4: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_EN4: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_EN4: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_EN4: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_EN4: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_EN4: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_EN4: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_EN4: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_EN4: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_EN4: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_EN4: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_EN4: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_EN4: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_EN4: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_EN4: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_EN4: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_EN4: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_EN4: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_EN4: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_EN4: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_EN4: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_EN4: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_EN4: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_EN4: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 00000000030112CF (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_EN4: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_EN4: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_EN4: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_EN4: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_EN4: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_EN4: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_EN4: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_EN4: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_EN4: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_EN4: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_EN4: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_EN4: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_EN4: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_EN4: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_EN4: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_EN4: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_EN4: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_EN4: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_EN4: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_EN4: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_EN4: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_EN4: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_EN4: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_EN4: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_EN4: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_EN4: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_EN4: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_EN4: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_EN4: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_EN4: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_EN4: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_EN4: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 00000000030112D0 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_EN4: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_EN4: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_EN4: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_EN4: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_EN4: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_EN4: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_EN4: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_EN4: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_EN4: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_EN4: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_EN4: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_EN4: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_EN4: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_EN4: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_EN4: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_EN4: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_EN4: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_EN4: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_EN4: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_EN4: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_EN4: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_EN4: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_EN4: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_EN4: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_EN4: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_EN4: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_EN4: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_EN4: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_EN4: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_EN4: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_EN4: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_EN4: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 00000000030112D1 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_EN4: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_EN4: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_EN4: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_EN4: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_EN4: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_EN4: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_EN4: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_EN4: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_EN4: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_EN4: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_EN4: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_EN4: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_EN4: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_EN4: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_EN4: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_EN4: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_EN4: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_EN4: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_EN4: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_EN4: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_EN4: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_EN4: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_EN4: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_EN4: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_EN4: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_EN4: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_EN4: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_EN4: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_EN4: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_EN4: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_EN4: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_EN4: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 00000000030112D2 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_EN4: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_EN4: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_EN4: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_EN4: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_EN4: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_EN4: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_EN4: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_EN4: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_EN4: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_EN4: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_EN4: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_EN4: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_EN4: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_EN4: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_EN4: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_EN4: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_EN4: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_EN4: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_EN4: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_EN4: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_EN4: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_EN4: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_EN4: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_EN4: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_EN4: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_EN4: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_EN4: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_EN4: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_EN4: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_EN4: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_EN4: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_EN4: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 00000000030112D3 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_EN4: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_EN4: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_EN4: configures the OC expiration time
12:16 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_LIMIT_AX2: OC outbound when the credit reaches this value. Set to 0 to disable. Default = 8.
17:21 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_LIMIT_AX3: OC outbound when the credit reaches this value. Set to 0 to disable. Default = 8.
22:23 RWX pb_cfg_spare1
24:27 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_MIN_AX2: CPB=0 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
28:31 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_MAX_AX2: CPB=1 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
32:33 RWX PB_CFG_DAT_LINK0_DON_PTL_VCINIT_AX2: Configures number of entries per VC. 00=32VC0. 01=24VC0,8VC1. 10=8VC0,24VC1. 11=16VC0,16VC1.

Dial enums:
DON_32_0=>0b00
DON_24_8=>0b01
DON_8_24=>0b10
DON_16_16=>0b11
34:35 RWX PB_CFG_DAT_LINK1_DON_PTL_VCINIT_AX3: Configures number of entries per VC. 00=32VC0. 01=24VC0,8VC1. 10=8VC0,24VC1. 11=16VC0,16VC1.

Dial enums:
DON_32_0=>0b00
DON_24_8=>0b01
DON_8_24=>0b10
DON_16_16=>0b11
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_EN4: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_EN4: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_EN4: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_EN4: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_EN4: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_EN4: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_EN4: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_EN4: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_MIN_AX3: CPB=0 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
60:63 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_MAX_AX3: CPB=1 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 00000000030112D4 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_EN4.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_EN4.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_EN4.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_EN4: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_EN4: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_EN4: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_EN4: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_EN4: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_EN4: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_EN4: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX PB_CFG_DAT_LINK_DOB_VC0_LIMIT_AX2: Configures DOB doff VC0 link credits. Default=64.
31:37 RWX PB_CFG_DAT_LINK_DOB_VC1_LIMIT_AX2: Configures DOB doff VC1 link credits. Default=64.
38:44 RWX PB_CFG_DAT_LINK_DOB_VC0_LIMIT_AX3: Configures DOB doff VC0 link credits. Default=64.
45:51 RWX PB_CFG_DAT_LINK_DOB_VC1_LIMIT_AX3: Configures DOB doff VC1 link credits. Default=64.
52 NCX PB_CFG_DAT_TOK_INIT_EN4: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_EN4: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_EN4: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_EN4: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 00000000030112D5 (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_EN4: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX PB_CFG_PBIASY_PA3_DISABLE: Disable PA3 PBIASY. Default=0
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX PB_CFG_PBIASY_PTL2_DISABLE: Disable PTL2 PBIASY. Default=0
19 RWX PB_CFG_PBIASY_PTL3_DISABLE: Disable PTL3 PBIASY. Default=0
20 RWX PB_CFG_PBIASY_PA3_SELCD: Select PA3 PBIASY mode C or mode D. C=0, D=1. Default=0
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX PB_CFG_PBIASY_PTL2_SELCD: Select PTL2 PBIASY mode C or mode D. C=0, D=1. Default=0
23 RWX PB_CFG_PBIASY_PTL3_SELCD: Select PTL3 PBIASY mode C or mode D. C=0, D=1. Default=0
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 00000000030112DA (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_EN4: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_EN4: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 00000000030112DB (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_EN4: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_EN4: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_EN4: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_EN4: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_EN4: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_EN4: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_EN4: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_EN4: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_EN4: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_EN4: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 00000000030112DC (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_EN4: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_EN4: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_EN4: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_EN4: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_EN4: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_EN4: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_EN4: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_EN4: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_EN4: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_EN4: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 00000000030112DD (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_EN4: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_EN4: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_EN4: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_EN4: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_EN4: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_EN4: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_EN4: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 00000000030112DE (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_EN4.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_EN4.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX pb_cfg_ex0_hbus_disable
9 RWX pb_cfg_ex1_hbus_disable
10 RWX pb_cfg_ex2_hbus_disable
11 RWX pb_cfg_ex3_hbus_disable
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 00000000030112DF (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_EN4: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_EN4: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_EN4: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_EN4: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 00000000030112EA (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_EN4: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_EN4: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_EN4: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_EN4: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_EN4: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_EN4: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_EN4: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_EN4: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 00000000030112EB (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_EN4.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_EN4: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_EN4: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_EN4: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_EN4: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_EN4: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_EN4: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_EN4: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_EN4: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 00000000030112EC (SCOM)
Name:PB.PB_COM.PB_SCOM_EN4.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_EN4.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011300 (SCOM)
0000000003011301 (SCOM1)
0000000003011302 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011303 (SCOM)
0000000003011304 (SCOM1)
0000000003011305 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011306 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011307 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES1.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301130A (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_ES1.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_ES1.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_ES1.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_ES1: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_ES1: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_ES1: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_ES1: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_ES1: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_ES1: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_ES1: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_ES1: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_ES1: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_ES1: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_ES1: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_ES1: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_ES1: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_ES1: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_ES1: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_ES1: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_ES1: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_ES1: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_ES1: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_ES1: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_ES1: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_ES1: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301130B (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_ES1: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_ES1: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_ES1: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_ES1: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_ES1: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_ES1: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_ES1: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_ES1: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_ES1: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_ES1: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_ES1: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_ES1: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_ES1: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301130C (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_ES1: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_ES1: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_ES1: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_ES1: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_ES1: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_ES1: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_ES1: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_ES1: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_ES1: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_ES1: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_ES1: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_ES1: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_ES1: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301130D (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_ES1: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_ES1: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_ES1: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_ES1: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_ES1: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_ES1: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_ES1: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_ES1: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_ES1: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_ES1: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_ES1: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_ES1: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_ES1: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_ES1: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_ES1: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_ES1: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_ES1: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_ES1: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_ES1: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_ES1: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_ES1: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_ES1: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_ES1: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_ES1: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_ES1: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_ES1: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_ES1: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_ES1: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_ES1: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_ES1: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_ES1: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_ES1: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301130E (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_ES1: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_ES1: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_ES1: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_ES1: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_ES1: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_ES1: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_ES1: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_ES1: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_ES1: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_ES1: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_ES1: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_ES1: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_ES1: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_ES1: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_ES1: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_ES1: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_ES1: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_ES1: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_ES1: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_ES1: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_ES1: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_ES1: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_ES1: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_ES1: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_ES1: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_ES1: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_ES1: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_ES1: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_ES1: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_ES1: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_ES1: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_ES1: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301130F (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_ES1: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_ES1: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_ES1: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_ES1: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_ES1: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_ES1: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_ES1: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_ES1: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_ES1: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_ES1: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_ES1: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_ES1: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_ES1: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_ES1: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_ES1: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_ES1: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_ES1: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_ES1: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_ES1: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_ES1: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_ES1: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_ES1: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_ES1: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_ES1: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_ES1: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_ES1: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_ES1: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_ES1: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_ES1: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_ES1: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_ES1: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_ES1: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011310 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_ES1: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_ES1: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_ES1: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_ES1: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_ES1: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_ES1: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_ES1: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_ES1: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_ES1: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_ES1: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_ES1: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_ES1: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_ES1: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_ES1: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_ES1: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_ES1: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_ES1: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_ES1: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_ES1: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_ES1: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_ES1: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_ES1: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_ES1: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_ES1: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_ES1: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_ES1: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_ES1: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_ES1: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_ES1: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_ES1: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_ES1: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_ES1: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011311 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_ES1: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_ES1: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_ES1: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_ES1: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_ES1: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_ES1: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_ES1: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_ES1: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_ES1: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_ES1: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_ES1: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_ES1: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_ES1: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_ES1: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_ES1: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_ES1: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_ES1: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_ES1: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_ES1: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_ES1: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_ES1: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_ES1: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_ES1: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_ES1: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_ES1: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_ES1: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_ES1: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_ES1: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_ES1: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_ES1: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_ES1: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_ES1: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011312 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_ES1: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_ES1: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_ES1: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_ES1: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_ES1: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_ES1: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_ES1: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_ES1: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_ES1: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_ES1: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_ES1: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_ES1: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_ES1: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_ES1: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_ES1: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_ES1: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_ES1: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_ES1: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_ES1: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_ES1: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_ES1: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_ES1: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_ES1: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_ES1: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_ES1: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_ES1: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_ES1: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_ES1: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_ES1: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_ES1: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_ES1: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_ES1: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011313 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_ES1: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_ES1: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_ES1: configures the OC expiration time
12:16 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_LIMIT_AX4: OC outbound when the credit reaches this value. Set to 0 to disable. Default = 8.
17:21 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_LIMIT_AX5: OC outbound when the credit reaches this value. Set to 0 to disable. Default = 8.
22:23 RWX pb_cfg_spare1
24:27 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_MIN_AX4: CPB=0 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
28:31 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_MAX_AX4: CPB=1 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
32:33 RWX PB_CFG_DAT_LINK0_DON_PTL_VCINIT_AX4: Configures number of entries per VC. 00=32VC0. 01=24VC0,8VC1. 10=8VC0,24VC1. 11=16VC0,16VC1.

Dial enums:
DON_32_0=>0b00
DON_24_8=>0b01
DON_8_24=>0b10
DON_16_16=>0b11
34:35 RWX PB_CFG_DAT_LINK1_DON_PTL_VCINIT_AX5: Configures number of entries per VC. 00=32VC0. 01=24VC0,8VC1. 10=8VC0,24VC1. 11=16VC0,16VC1.

Dial enums:
DON_32_0=>0b00
DON_24_8=>0b01
DON_8_24=>0b10
DON_16_16=>0b11
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_ES1: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_ES1: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_ES1: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_ES1: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_ES1: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_ES1: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_ES1: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_ES1: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_MIN_AX5: CPB=0 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
60:63 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_MAX_AX5: CPB=1 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011314 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_ES1.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_ES1.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_ES1.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_ES1: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_ES1: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_ES1: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_ES1: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_ES1: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_ES1: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_ES1: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX PB_CFG_DAT_LINK_DOB_VC0_LIMIT_AX4: Configures DOB doff VC0 link credits. Default=64.
31:37 RWX PB_CFG_DAT_LINK_DOB_VC1_LIMIT_AX4: Configures DOB doff VC1 link credits. Default=64.
38:44 RWX PB_CFG_DAT_LINK_DOB_VC0_LIMIT_AX5: Configures DOB doff VC0 link credits. Default=64.
45:51 RWX PB_CFG_DAT_LINK_DOB_VC1_LIMIT_AX5: Configures DOB doff VC1 link credits. Default=64.
52 NCX PB_CFG_DAT_TOK_INIT_ES1: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_ES1: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_ES1: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_ES1: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011315 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_ES1: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX PB_CFG_PBIASY_PA4_DISABLE: Disable PA4 PBIASY. Default=0
17 RWX PB_CFG_PBIASY_PA5_DISABLE: Disable PA5 PBIASY. Default=0
18 RWX PB_CFG_PBIASY_PTL4_DISABLE: Disable PTL4 PBIASY. Default=0
19 RWX PB_CFG_PBIASY_PTL5_DISABLE: Disable PTL5 PBIASY. Default=0
20 RWX PB_CFG_PBIASY_PA4_SELCD: Select PA4 PBIASY mode C or mode D. C=0, D=1. Default=0
21 RWX PB_CFG_PBIASY_PA5_SELCD: Select PA5 PBIASY mode C or mode D. C=0, D=1. Default=0
22 RWX PB_CFG_PBIASY_PTL4_SELCD: Select PTL4 PBIASY mode C or mode D. C=0, D=1. Default=0
23 RWX PB_CFG_PBIASY_PTL5_SELCD: Select PTL5 PBIASY mode C or mode D. C=0, D=1. Default=0
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301131A (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_ES1: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_ES1: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301131B (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_ES1: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_ES1: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_ES1: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_ES1: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_ES1: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_ES1: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_ES1: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_ES1: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_ES1: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_ES1: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301131C (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_ES1: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_ES1: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_ES1: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_ES1: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_ES1: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_ES1: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_ES1: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_ES1: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_ES1: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_ES1: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301131D (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_ES1: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_ES1: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_ES1: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_ES1: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_ES1: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_ES1: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_ES1: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301131E (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_ES1.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_ES1.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX pb_cfg_ex0_hbus_disable
9 RWX pb_cfg_ex1_hbus_disable
10 RWX pb_cfg_ex2_hbus_disable
11 RWX pb_cfg_ex3_hbus_disable
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301131F (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_ES1: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_ES1: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_ES1: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_ES1: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 000000000301132A (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_ES1: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_ES1: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_ES1: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_ES1: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_ES1: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_ES1: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_ES1: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_ES1: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 000000000301132B (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES1.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_ES1: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_ES1: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_ES1: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_ES1: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_ES1: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_ES1: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_ES1: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_ES1: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 000000000301132C (SCOM)
Name:PB.PB_COM.PB_SCOM_ES1.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_ES1.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011340 (SCOM)
0000000003011341 (SCOM1)
0000000003011342 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011343 (SCOM)
0000000003011344 (SCOM1)
0000000003011345 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011346 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011347 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES2.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301134A (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_ES2.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_ES2.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_ES2.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_ES2: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_ES2: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_ES2: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_ES2: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_ES2: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_ES2: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_ES2: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_ES2: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_ES2: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_ES2: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_ES2: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_ES2: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_ES2: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_ES2: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_ES2: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_ES2: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_ES2: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_ES2: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_ES2: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_ES2: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_ES2: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_ES2: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301134B (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_ES2: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_ES2: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_ES2: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_ES2: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_ES2: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_ES2: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_ES2: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_ES2: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_ES2: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_ES2: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_ES2: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_ES2: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_ES2: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301134C (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_ES2: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_ES2: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_ES2: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_ES2: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_ES2: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_ES2: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_ES2: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_ES2: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_ES2: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_ES2: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_ES2: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_ES2: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_ES2: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301134D (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_ES2: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_ES2: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_ES2: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_ES2: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_ES2: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_ES2: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_ES2: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_ES2: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_ES2: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_ES2: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_ES2: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_ES2: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_ES2: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_ES2: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_ES2: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_ES2: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_ES2: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_ES2: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_ES2: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_ES2: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_ES2: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_ES2: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_ES2: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_ES2: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_ES2: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_ES2: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_ES2: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_ES2: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_ES2: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_ES2: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_ES2: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_ES2: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301134E (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_ES2: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_ES2: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_ES2: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_ES2: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_ES2: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_ES2: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_ES2: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_ES2: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_ES2: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_ES2: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_ES2: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_ES2: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_ES2: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_ES2: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_ES2: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_ES2: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_ES2: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_ES2: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_ES2: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_ES2: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_ES2: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_ES2: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_ES2: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_ES2: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_ES2: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_ES2: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_ES2: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_ES2: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_ES2: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_ES2: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_ES2: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_ES2: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301134F (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_ES2: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_ES2: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_ES2: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_ES2: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_ES2: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_ES2: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_ES2: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_ES2: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_ES2: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_ES2: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_ES2: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_ES2: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_ES2: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_ES2: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_ES2: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_ES2: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_ES2: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_ES2: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_ES2: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_ES2: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_ES2: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_ES2: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_ES2: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_ES2: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_ES2: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_ES2: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_ES2: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_ES2: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_ES2: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_ES2: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_ES2: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_ES2: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011350 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_ES2: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_ES2: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_ES2: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_ES2: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_ES2: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_ES2: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_ES2: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_ES2: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_ES2: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_ES2: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_ES2: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_ES2: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_ES2: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_ES2: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_ES2: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_ES2: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_ES2: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_ES2: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_ES2: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_ES2: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_ES2: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_ES2: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_ES2: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_ES2: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_ES2: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_ES2: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_ES2: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_ES2: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_ES2: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_ES2: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_ES2: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_ES2: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011351 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_ES2: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_ES2: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_ES2: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_ES2: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_ES2: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_ES2: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_ES2: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_ES2: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_ES2: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_ES2: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_ES2: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_ES2: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_ES2: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_ES2: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_ES2: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_ES2: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_ES2: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_ES2: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_ES2: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_ES2: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_ES2: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_ES2: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_ES2: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_ES2: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_ES2: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_ES2: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_ES2: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_ES2: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_ES2: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_ES2: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_ES2: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_ES2: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011352 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_ES2: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_ES2: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_ES2: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_ES2: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_ES2: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_ES2: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_ES2: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_ES2: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_ES2: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_ES2: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_ES2: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_ES2: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_ES2: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_ES2: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_ES2: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_ES2: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_ES2: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_ES2: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_ES2: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_ES2: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_ES2: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_ES2: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_ES2: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_ES2: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_ES2: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_ES2: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_ES2: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_ES2: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_ES2: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_ES2: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_ES2: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_ES2: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011353 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_ES2: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_ES2: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_ES2: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_ES2: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_ES2: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_ES2: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_ES2: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_ES2: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_ES2: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_ES2: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_ES2: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011354 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_ES2.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_ES2.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_ES2.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_ES2: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_ES2: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_ES2: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_ES2: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_ES2: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_ES2: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_ES2: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_ES2: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_ES2: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_ES2: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_ES2: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011355 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_ES2: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX PB_CFG_PBIASY_MC1_DISABLE: Disable MC1 PBIASY. Default=0
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX PB_CFG_PBIASY_MC1_SELCD: Select MC1 PBIASY mode C or mode D. C=0, D=1. Default=0
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301135A (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_ES2: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_ES2: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301135B (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_ES2: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_ES2: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_ES2: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_ES2: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_ES2: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_ES2: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_ES2: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_ES2: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_ES2: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_ES2: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301135C (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_ES2: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_ES2: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_ES2: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_ES2: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_ES2: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_ES2: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_ES2: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_ES2: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_ES2: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_ES2: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301135D (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_ES2: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_ES2: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_ES2: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_ES2: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_ES2: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_ES2: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_ES2: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301135E (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_ES2.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_ES2.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX pb_cfg_ex0_hbus_disable
9 RWX pb_cfg_ex1_hbus_disable
10 RWX pb_cfg_ex2_hbus_disable
11 RWX pb_cfg_ex3_hbus_disable
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301135F (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_ES2: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_ES2: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_ES2: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_ES2: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 000000000301136A (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_ES2: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_ES2: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_ES2: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_ES2: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_ES2: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_ES2: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_ES2: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_ES2: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 000000000301136B (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES2.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_ES2: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_ES2: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_ES2: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_ES2: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_ES2: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_ES2: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_ES2: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_ES2: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 000000000301136C (SCOM)
Name:PB.PB_COM.PB_SCOM_ES2.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_ES2.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 0000000003011380 (SCOM)
0000000003011381 (SCOM1)
0000000003011382 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_INACTIVE_LINK_ERROR: inactive_link_error
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_ACTIVE_LINK_ERROR: active_link_error
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 0000000003011383 (SCOM)
0000000003011384 (SCOM1)
0000000003011385 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_INACTIVE_LINK_ERROR_MASK: inactive_link_error_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_ACTIVE_LINK_ERROR_MASK: active_link_error_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 0000000003011386 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 0000000003011387 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES3.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 000000000301138A (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_ES3.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_ES3.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_ES3.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX PB_ES3_PBIXXX_INIT: Indicates that the fabric is initialized.
1:3 ROX PB_ES3_DBG_MAX_HANG_STAGE_REACHED: Indicates the max hang stage reached.
4 RWX PB_CFG_HOP_MODE_ES3: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_ES3: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_ES3: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_ES3: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX PB_CFG_HNG_CHK_DISABLE: Hang Check Disable.
9 RWX PB_DBG_CLR_MAX_HANG_STAGE: Resets the maximum hang state level (pb_hang_level)
10 RWX PB_CFG_REQ_GATHER_ENABLE_ES3: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_ES3: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_ES3: SCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_ES3: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_ES3: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_ES3: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_ES3: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_ES3: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_ES3: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_ES3: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_ES3: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_ES3: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_ES3: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_ES3: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_ES3: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_ES3: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_ES3: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_ES3: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301138B (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_ES3: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_ES3: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_ES3: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_ES3: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_ES3: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_ES3: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_ES3: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_ES3: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_ES3: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_ES3: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_ES3: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_ES3: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_ES3: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 000000000301138C (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_ES3: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_ES3: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_ES3: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_ES3: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_ES3: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_ES3: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_ES3: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_ES3: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_ES3: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_ES3: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_ES3: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_ES3: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_ES3: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301138D (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_ES3: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_ES3: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_ES3: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_ES3: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_ES3: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_ES3: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_ES3: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_ES3: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_ES3: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_ES3: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_ES3: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_ES3: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_ES3: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_ES3: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_ES3: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_ES3: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_ES3: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_ES3: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_ES3: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_ES3: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_ES3: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_ES3: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_ES3: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_ES3: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_ES3: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_ES3: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_ES3: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_ES3: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_ES3: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_ES3: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_ES3: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_ES3: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 000000000301138E (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_ES3: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_ES3: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_ES3: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_ES3: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_ES3: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_ES3: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_ES3: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_ES3: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_ES3: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_ES3: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_ES3: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_ES3: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_ES3: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_ES3: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_ES3: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_ES3: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_ES3: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_ES3: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_ES3: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_ES3: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_ES3: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_ES3: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_ES3: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_ES3: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_ES3: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_ES3: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_ES3: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_ES3: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_ES3: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_ES3: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_ES3: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_ES3: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 000000000301138F (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_ES3: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_ES3: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_ES3: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_ES3: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_ES3: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_ES3: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_ES3: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_ES3: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_ES3: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_ES3: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_ES3: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_ES3: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_ES3: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_ES3: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_ES3: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_ES3: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_ES3: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_ES3: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_ES3: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_ES3: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_ES3: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_ES3: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_ES3: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_ES3: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_ES3: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_ES3: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_ES3: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_ES3: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_ES3: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_ES3: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_ES3: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_ES3: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 0000000003011390 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_ES3: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_ES3: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_ES3: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_ES3: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_ES3: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_ES3: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_ES3: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_ES3: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_ES3: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_ES3: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_ES3: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_ES3: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_ES3: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_ES3: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_ES3: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_ES3: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_ES3: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_ES3: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_ES3: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_ES3: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_ES3: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_ES3: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_ES3: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_ES3: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_ES3: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_ES3: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_ES3: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_ES3: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_ES3: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_ES3: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_ES3: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_ES3: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011391 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_ES3: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_ES3: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_ES3: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_ES3: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_ES3: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_ES3: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_ES3: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_ES3: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_ES3: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_ES3: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_ES3: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_ES3: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_ES3: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_ES3: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_ES3: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_ES3: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_ES3: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_ES3: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_ES3: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_ES3: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_ES3: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_ES3: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_ES3: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_ES3: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_ES3: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_ES3: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_ES3: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_ES3: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_ES3: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_ES3: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_ES3: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_ES3: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 0000000003011392 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_ES3: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_ES3: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_ES3: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_ES3: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_ES3: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_ES3: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_ES3: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_ES3: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_ES3: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_ES3: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_ES3: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_ES3: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_ES3: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_ES3: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_ES3: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_ES3: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_ES3: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_ES3: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_ES3: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_ES3: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_ES3: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_ES3: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_ES3: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_ES3: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_ES3: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_ES3: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_ES3: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_ES3: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_ES3: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_ES3: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_ES3: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_ES3: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 0000000003011393 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_ES3: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_ES3: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_ES3: configures the OC expiration time
12:16 RWX pb_cfg_link0_outbound_queue_limit
17:21 RWX pb_cfg_link1_outbound_queue_limit
22:23 RWX pb_cfg_spare1
24:27 RWX pb_cfg_link0_outbound_queue_min
28:31 RWX pb_cfg_link0_outbound_queue_max
32:33 RWX pb_cfg_dat_link0_don_ptl_vcinit
34:35 RWX pb_cfg_dat_link1_don_ptl_vcinit
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_ES3: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_ES3: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_ES3: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_ES3: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_ES3: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_ES3: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_ES3: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_ES3: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX pb_cfg_link1_outbound_queue_min
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
60:63 RWX pb_cfg_link1_outbound_queue_max
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 0000000003011394 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_ES3.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_ES3.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_ES3.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_ES3: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_ES3: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_ES3: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_ES3: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_ES3: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_ES3: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_ES3: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX pb_cfg_dat_link0_dob_vc0_limit
31:37 RWX pb_cfg_dat_link0_dob_vc1_limit
38:44 RWX pb_cfg_dat_link1_dob_vc0_limit
45:51 RWX pb_cfg_dat_link1_dob_vc1_limit
52 NCX PB_CFG_DAT_TOK_INIT_ES3: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_ES3: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_ES3: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_ES3: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 0000000003011395 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_ES3: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX PB_CFG_PBIASY_MC0_DISABLE: Disable MC0 PBIASY. Default=0
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX pb_cfg_pbiasy_link0_disable
19 RWX pb_cfg_pbiasy_link1_disable
20 RWX PB_CFG_PBIASY_MC0_SELCD: Select MC0 PBIASY mode C or mode D. C=0, D=1. Default=0
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX pb_cfg_pbiasy_link0_selcd
23 RWX pb_cfg_pbiasy_link1_selcd
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Snooper Configuration Register 1
Addr: 0000000003011396 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_SNOOPER_CFG1
Constant(s):
Comments:00:11 pb_cfg_chg_rate_gp_cresp_sample_time 12:23 pb_cfg_chg_rate_sp_cresp_sample_time 24:35 pb_cfg_chg_rate_gp_req_sample_time 36:47 pb_cfg_chg_rate_sp_req_sample_time 48:50 pb_cfg_chg_rate_gp_jump 51:53 pb_cfg_chg_rate_sp_jump 54 pb_cfg_follow_scope_rate_disable 55:57 pb_cfg_follow_scope_rate_jump_level 58:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG8_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:11 RWX PB_CFG_CHG_RATE_GP_CRESP_SAMPLE_TIME_ES3: Sample time for gathering up all the chg_rate.reqs
12:23 RWX PB_CFG_CHG_RATE_SP_CRESP_SAMPLE_TIME_ES3: Sample time for gathering up all the chg_rate.reqs
24:35 RWX PB_CFG_CHG_RATE_GP_REQ_SAMPLE_TIME_ES3: sample time for gathering up all the chg_rate.reqs and then issue a grant
36:47 RWX PB_CFG_CHG_RATE_SP_REQ_SAMPLE_TIME_ES3: sample time for gathering up all the chg_rate.reqs and then issue a grant
48:50 RWX PB_CFG_CHG_RATE_GP_JUMP_ES3: Sets the jump level for change rate grants.
51:53 RWX PB_CFG_CHG_RATE_SP_JUMP_ES3: Sets the jump level for change rate grants.
54 RWX PB_CFG_FOLLOW_SCOPE_RATE_DISABLE_ES3: Jump level for all scopes if one scope is not making progress.
55:57 RWX PB_CFG_FOLLOW_SCOPE_RATE_JUMP_LEVEL_ES3: Jump level for all scopes if one scope is not making progress.
58:63 RWX pb_cfg_spare

PowerBus PB RaceTrack Snooper Configuration Register 2
Addr: 0000000003011397 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_SNOOPER_CFG2
Constant(s):
Comments:00:09 pb_cfg_chg_rate_gp_rty_threshold 10:19 pb_cfg_chg_rate_sp_rty_threshold 20:22 pb_cfg_cpo_jump_level 23:28 pb_cfg_cpo_rty_level 29:30 pb_cfg_sleep_backoff 31:33 pb_cfg_rty_percentage 34 pb_cfg_include_lpc_rty 35:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG9_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:9 RWX PB_CFG_CHG_RATE_GP_RTY_THRESHOLD_ES3: Threshold config bits. If counter reaches this amount within time limit (ports0:1 combined), then trigger a chg_rate_request
10:19 RWX PB_CFG_CHG_RATE_SP_RTY_THRESHOLD_ES3: Threshold config bits. If counter reaches this amount within time limit (ports0:1 combined), then trigger a chg_rate_request
20:22 RWX PB_CFG_CPO_JUMP_LEVEL_ES3: Jump level for cpo
23:28 RWX PB_CFG_CPO_RTY_LEVEL_ES3: Number of retries before cpo signal is raised.
29:30 RWX PB_CFG_SLEEP_BACKOFF_ES3: P7 method, configures how long to disable local arbitration after an early hang command to enable the sleep function to drain

Dial enums:
DISABLED=>0b00
BACKOFF_512=>0b01
BACKOFF_1K=>0b10
BACKOFF_2K=>0b11
31:33 RWX PB_CFG_RTY_PERCENTAGE_ES3: Set the amount of retries that are included in the calculation. Each entry = 12.5%, starting at 0; 7=100%.
34 RWX PB_CFG_INCLUDE_LPC_RTY_ES3: Include normal retries for change rate requests.
35:63 RWX pb_cfg_spare

PowerBus PB RaceTrack Snooper Configuration Register 3
Addr: 0000000003011398 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_SNOOPER_CFG3
Constant(s):
Comments:00:02 pb_cfg_gp_lvl0_chgrate_clk_div 03:05 pb_cfg_gp_lvl1_chgrate_clk_div 06:08 pb_cfg_gp_lvl2_chgrate_clk_div 09:11 pb_cfg_gp_lvl3_chgrate_clk_div 12:14 pb_cfg_gp_lvl4_chgrate_clk_div 15:17 pb_cfg_gp_lvl5_chgrate_clk_div 18:20 pb_cfg_gp_lvl6_chgrate_clk_div 21:23 pb_cfg_gp_lvl7_chgrate_clk_div 24:26 pb_cfg_sp_lvl0_chgrate_clk_div 27:29 pb_cfg_sp_lvl1_chgrate_clk_div 30:32 pb_cfg_sp_lvl2_chgrate_clk_div 33:35 pb_cfg_sp_lvl3_chgrate_clk_div 36:38 pb_cfg_sp_lvl4_chgrate_clk_div 39:41 pb_cfg_sp_lvl5_chgrate_clk_div 42:44 pb_cfg_sp_lvl6_chgrate_clk_div 45:47 pb_cfg_sp_lvl7_chgrate_clk_div 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG10_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_GP_LVL0_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
3:5 RWX PB_CFG_GP_LVL1_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
6:8 RWX PB_CFG_GP_LVL2_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
9:11 RWX PB_CFG_GP_LVL3_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
12:14 RWX PB_CFG_GP_LVL4_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
15:17 RWX PB_CFG_GP_LVL5_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
18:20 RWX PB_CFG_GP_LVL6_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
21:23 RWX PB_CFG_GP_LVL7_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
24:26 RWX PB_CFG_SP_LVL0_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
27:29 RWX PB_CFG_SP_LVL1_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
30:32 RWX PB_CFG_SP_LVL2_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
33:35 RWX PB_CFG_SP_LVL3_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
36:38 RWX PB_CFG_SP_LVL4_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
39:41 RWX PB_CFG_SP_LVL5_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
42:44 RWX PB_CFG_SP_LVL6_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
45:47 RWX PB_CFG_SP_LVL7_CHGRATE_CLK_DIV_ES3: Change Rate Clock Divider.
48:63 RWX pb_cfg_spare

PowerBus PB RaceTrack Snooper Configuration Register 4
Addr: 0000000003011399 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_SNOOPER_CFG4
Constant(s):
Comments:00:04 pb_cfg_hang0_cmd_rate 05:09 pb_cfg_hang1_cmd_rate 10:14 pb_cfg_hang2_cmd_rate 15:19 pb_cfg_hang3_cmd_rate 20:24 pb_cfg_hang4_cmd_rate 25:29 pb_cfg_hang5_cmd_rate 30:34 pb_cfg_hang6_cmd_rate 35 pb_cfg_use_slow_go_rate 36:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG11_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:4 RWX PB_CFG_HANG0_CMD_RATE_ES3: Change Rate Hang Level 0.
5:9 RWX PB_CFG_HANG1_CMD_RATE_ES3: Change Rate Hang Level 1.
10:14 RWX PB_CFG_HANG2_CMD_RATE_ES3: Change Rate Hang Level 2.
15:19 RWX PB_CFG_HANG3_CMD_RATE_ES3: Change Rate Hang Level 3.
20:24 RWX PB_CFG_HANG4_CMD_RATE_ES3: Change Rate Hang Level 4.
25:29 RWX PB_CFG_HANG5_CMD_RATE_ES3: Change Rate Hang Level 5.
30:34 RWX PB_CFG_HANG6_CMD_RATE_ES3: Change Rate Hang Level 6.
35 RWX PB_CFG_USE_SLOW_GO_RATE_ES3: Uses the 1 every 64k and 1 every 128k hang settings.
36:38 RWX PB_CFG_TMGR_DEC_MASK_ES3: Sets the LFSR max value of time to inhibit giving out tokens once we reach two tokens remaining

Dial enums:
DISABLED=>0b000
LFSR_MAX_4=>0b001
LFSR_MAX_8=>0b010
LFSR_MAX_16=>0b011
LFSR_MAX_32=>0b100
LFSR_MAX_64=>0b101
LFSR_MAX_128=>0b110
LFSR_MAX_256=>0b111
39:51 RWX pb_cfg_spare
Dial enums:
DISABLED=>0b000
LFSR_MAX_4=>0b001
LFSR_MAX_8=>0b010
LFSR_MAX_16=>0b011
LFSR_MAX_32=>0b100
LFSR_MAX_64=>0b101
LFSR_MAX_128=>0b110
LFSR_MAX_256=>0b111
52:57 RWX PB_CFG_COM_CR_TOK_XLINK_MAX_ES3: how many cresp can send to X-Link FIFO Out (max tokens used). Default=32.
58:63 RWX PB_CFG_COM_CR_TOK_ALINK_MAX_ES3: how many cresp can send to A-Link FIFO Out (max tokens used). Default=32.

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 000000000301139A (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_PBS_EVENT_SEL0: Performance Monitor Event Bus 0:7 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
3:5 RWX PB_CFG_PBS_EVENT_SEL1: Performance Monitor Event Bus 8:15 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
6:8 RWX PB_CFG_PBS_EVENT_SEL2: Performance Monitor Event Bus 16:23 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
9:11 RWX PB_CFG_PBS_EVENT_SEL3: Performance Monitor Event Bus 24:31 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
12:14 RWX PB_CFG_PBS_EVENT_SEL4: Performance Monitor Event Bus 32:39 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
15:17 RWX PB_CFG_PBS_EVENT_SEL5: Performance Monitor Event Bus 40:47 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
18:20 RWX PB_CFG_PBS_EVENT_SEL6: Performance Monitor Event Bus 48:55 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
21:23 RWX PB_CFG_PBS_EVENT_SEL7: Performance Monitor Event Bus 56:63 Select

Dial enums:
SEL_GRP0=>0b000
SEL_GRP1=>0b001
SEL_GRP2=>0b010
SEL_GRP3=>0b011
SEL_GRP4=>0b100
SEL_GRP5=>0b101
SEL_GRP6=>0b110
SEL_GRP7=>0b111
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_ES3: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_ES3: bit-pair enable of PB events asserted on event bus
56 RWX PB_CFG_PBS_EVENT_PORT_SEL: Selects PMU rcmd port. 0=rcmd0&rcmd1, 1=rcmd2&rcmd3
57 RWX PB_CFG_PBS_EVENT_PORT_SEL2: Selects PMU rcmd port for events 32:51. 0=data_xfer, 1=rcmd2&rcmd3
58 RWX PB_CFG_CNPMS_PBS_MASK: PBS unit event bus mask. When set, unit event bus inputs are disabled. default=0.
59 RWX PB_CFG_CNPMS_MC0_MASK: MC0 unit event bus mask. When set, unit event bus inputs are disabled. default=0.
60 RWX PB_CFG_CNPMS_MC1_MASK: MC1 unit event bus mask. When set, unit event bus inputs are disabled. default=0.
61 RWX PB_CFG_CNPMS_MCD_MASK: MCD unit event bus mask. When set, unit event bus inputs are disabled. default=0.
62 RWX pb_cfg_cnpm_mask
63 RWX PB_CFG_CNPMS_PE0_MASK: PE0 unit event bus mask. When set, unit event bus inputs are disabled. default=0.

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 000000000301139B (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_ES3: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_ES3: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_ES3: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_ES3: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_ES3: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_ES3: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_ES3: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_ES3: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_ES3: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_ES3: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 000000000301139C (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_ES3: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_ES3: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_ES3: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_ES3: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_ES3: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_ES3: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_ES3: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_ES3: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_ES3: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_ES3: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 000000000301139D (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_ES3: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_ES3: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_ES3: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_ES3: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_ES3: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_ES3: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_ES3: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 000000000301139E (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_ES3.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_ES3.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX pb_cfg_ex0_hbus_disable
9 RWX pb_cfg_ex1_hbus_disable
10 RWX pb_cfg_ex2_hbus_disable
11 RWX pb_cfg_ex3_hbus_disable
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 000000000301139F (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX PB_CFG_TRACE_SELSN0: configures PB Trace SN0 inputs; 10=rcmd0{por}, 01=data, 00=none

Dial enums:
PB_TRACE_SN0_NONE_SEL=>0b00
PB_TRACE_SN0_B_SEL=>0b01
PB_TRACE_SN0_A_SEL=>0b10
2:3 RWX PB_CFG_TRACE_SELSN1: configures PB Trace SN1 inputs; 10=rcmd1{por}, 01=data, 00=none

Dial enums:
PB_TRACE_SN1_NONE_SEL=>0b00
PB_TRACE_SN1_B_SEL=>0b01
PB_TRACE_SN1_A_SEL=>0b10
4:5 RWX PB_CFG_TRACE_SELSN2: configures PB Trace SN2 inputs; 10=rcmd2{por}, 01=data, 00=none

Dial enums:
PB_TRACE_SN2_NONE_SEL=>0b00
PB_TRACE_SN2_B_SEL=>0b01
PB_TRACE_SN2_A_SEL=>0b10
6:7 RWX PB_CFG_TRACE_SELSN3: configures PB Trace SN3 inputs; 10=rcmd3{por}, 01=data, 00=none

Dial enums:
PB_TRACE_SN3_NONE_SEL=>0b00
PB_TRACE_SN3_B_SEL=>0b01
PB_TRACE_SN3_A_SEL=>0b10
PB_TRACE_SN3_C_SEL=>0b11
8:9 RWX PB_CFG_TRACE_SELCR0: configures PB Trace CR0 inputs; 10=crsp0+lpr0{por}, 01=crsp0+rpr0, 00=none

Dial enums:
PB_TRACE_CR0_NONE_SEL=>0b00
PB_TRACE_CR0_B_SEL=>0b01
PB_TRACE_CR0_A_SEL=>0b10
10:11 RWX PB_CFG_TRACE_SELCR1: configures PB Trace CR1 inputs; 10=crsp1+lpr1{por}, 01=crsp1+rpr1, 00=none

Dial enums:
PB_TRACE_CR1_NONE_SEL=>0b00
PB_TRACE_CR1_B_SEL=>0b01
PB_TRACE_CR1_A_SEL=>0b10
12:13 RWX PB_CFG_TRACE_SELCR2: configures PB Trace CR2 inputs; 10=crsp2+lpr2{por}, 01=crsp2+rpr2, 00=none

Dial enums:
PB_TRACE_CR2_NONE_SEL=>0b00
PB_TRACE_CR2_B_SEL=>0b01
PB_TRACE_CR2_A_SEL=>0b10
14:15 RWX PB_CFG_TRACE_SELCR3: configures PB Trace CR3 inputs; 10=crsp3+lpr3{por}, 01=crsp3+rpr3, 00=none

Dial enums:
PB_TRACE_CR3_NONE_SEL=>0b00
PB_TRACE_CR3_B_SEL=>0b01
PB_TRACE_CR3_A_SEL=>0b10
16:23 RWX pb_cfg_trace_spare1
Dial enums:
PB_TRACE_CR3_NONE_SEL=>0b00
PB_TRACE_CR3_B_SEL=>0b01
PB_TRACE_CR3_A_SEL=>0b10
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_ES3: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_ES3: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_ES3: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_ES3: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 00000000030113AA (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_ES3: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_ES3: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_ES3: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_ES3: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_ES3: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_ES3: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_ES3: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_ES3: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 00000000030113AB (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES3.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_ES3: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_ES3: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_ES3: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_ES3: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_ES3: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_ES3: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_ES3: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_ES3: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 00000000030113AC (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_ES3.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PowerBus EH EXTFIR register
Addr: 00000000030113AE (SCOM)
00000000030113AF (SCOM1)
00000000030113B0 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES3.EXTFIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PB.PB_COM.PB_SCOM_ES3.EXT_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:7) [00000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_AX0_FIR_ERR: pb_x0_fir_err
1 RWX WOX_AND WOX_OR PB_AX1_FIR_ERR: pb_x1_fir_err
2 RWX WOX_AND WOX_OR PB_AX2_FIR_ERR: pb_x2_fir_err
3 RWX WOX_AND WOX_OR PB_AX3_FIR_ERR: pb_x3_fir_err
4 RWX WOX_AND WOX_OR PB_AX4_FIR_ERR: pb_x4_fir_err
5 RWX WOX_AND WOX_OR PB_AX5_FIR_ERR: pb_x5_fir_err
6 RWX WOX_AND WOX_OR PB_AX6_FIR_ERR: pb_x6_fir_err
7 RWX WOX_AND WOX_OR PB_AX7_FIR_ERR: pb_x7_fir_err
8:63 RO n/a n/a constant=0b00000000000000000000000000000000000000000000000000000000

PowerBus EXTFIR mask registers
Addr: 00000000030113B1 (SCOM)
00000000030113B2 (SCOM1)
00000000030113B3 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES3.EXTFIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PB.PB_COM.PB_SCOM_ES3.EXT_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:7) [00000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_AND WO_OR PB_AX0_FIR_ERR_MASK: pb_ax0_fir_err_mask
1 RW WO_AND WO_OR PB_AX1_FIR_ERR_MASK: pb_ax1_fir_err_mask
2 RW WO_AND WO_OR PB_AX2_FIR_ERR_MASK: pb_ax2_fir_err_mask
3 RW WO_AND WO_OR PB_AX3_FIR_ERR_MASK: pb_ax3_fir_err_mask
4 RW WO_AND WO_OR PB_AX4_FIR_ERR_MASK: pb_ax4_fir_err_mask
5 RW WO_AND WO_OR PB_AX5_FIR_ERR_MASK: pb_ax5_fir_err_mask
6 RW WO_AND WO_OR PB_AX6_FIR_ERR_MASK: pb_ax6_fir_err_mask
7 RW WO_AND WO_OR PB_AX7_FIR_ERR_MASK: pb_ax7_fir_err_mask
8:63 RO n/a n/a constant=0b00000000000000000000000000000000000000000000000000000000

PowerBus EXTFIR Action 0 Register
Addr: 00000000030113B4 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.EXTFIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PB.PB_COM.PB_SCOM_ES3.EXT_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0:7 RO EXTFIR_ACTION0: PowerBus EXTFIR MSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid
8:63 RO constant=0b00000000000000000000000000000000000000000000000000000000

PowerBus EXTFIR Action 1 Register
Addr: 00000000030113B5 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES3.EXTFIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PB.PB_COM.PB_SCOM_ES3.EXT_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0:7 RO EXTFIR_ACTION1: PowerBus EXTFIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid
8:63 RO constant=0b00000000000000000000000000000000000000000000000000000000

PowerBus PB RaceTrack Station nest domain FIR register
Addr: 00000000030113C0 (SCOM)
00000000030113C1 (SCOM1)
00000000030113C2 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR: protocol_error
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR: overflow_error
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR: hw_parity_error
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3: fir_spare_3
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR: coherency_error
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR: cresp_addr_error
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR: cresp_error
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR: hang_recovery_limit_error
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8: fir_spare_8
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1: hang_recovery_gte_level1
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL: force_mp_ipl
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR: pb_cmd_snooper_error
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR: data_overflow_error
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR: data_protocol_error
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR: data_route_error
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER: fir_compab_trigger
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR: link0_protocol_error
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR: link0_overflow_error
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR: link0_hw_parity_error
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR: link1_protocol_error
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR: link1_overflow_error
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR: link1_hw_parity_error

PowerBus PB RaceTrack Station nest domain FIR MASK register
Addr: 00000000030113C3 (SCOM)
00000000030113C4 (SCOM1)
00000000030113C5 (SCOM2)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_STATION_PROTOCOL_ERROR_MASK: protocol_error_mask
1 RWX WOX_AND WOX_OR PB_STATION_OVERFLOW_ERROR_MASK: overflow_error_mask
2 RWX WOX_AND WOX_OR PB_STATION_HW_PARITY_ERROR_MASK: hw_parity_error_mask
3 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_3_MASK: fir_spare_3_mask
4 RWX WOX_AND WOX_OR PB_STATION_COHERENCY_ERROR_MASK: coherency_error_mask
5 RWX WOX_AND WOX_OR PB_STATION_CRESP_ADDR_ERROR_MASK: cresp_addr_error_mask
6 RWX WOX_AND WOX_OR PB_STATION_CRESP_ERROR_MASK: cresp_error_mask
7 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_LIMIT_ERROR_MASK: hang_recovery_limit_error_mask
8 RWX WOX_AND WOX_OR PB_STATION_FIR_SPARE_8_MASK: fir_spare_8_mask
9 RWX WOX_AND WOX_OR PB_STATION_HANG_RECOVERY_GTE_LEVEL1_MASK: hang_recovery_gte_level1_mask
10 RWX WOX_AND WOX_OR PB_STATION_FORCE_MP_IPL_MASK: force_mp_ipl_mask
11 RWX WOX_AND WOX_OR PB_STATION_PB_CMD_SNOOPER_ERROR_MASK: pb_cmd_snooper_error_mask
12 RWX WOX_AND WOX_OR PB_STATION_DATA_OVERFLOW_ERROR_MASK: data_overflow_error_mask
13 RWX WOX_AND WOX_OR PB_STATION_DATA_PROTOCOL_ERROR_MASK: data_protocol_error_mask
14 RWX WOX_AND WOX_OR PB_STATION_DATA_ROUTE_ERROR_MASK: data_route_error_mask
15 RWX WOX_AND WOX_OR PB_STATION_FIR_COMPAB_TRIGGER_MASK: fir_compab_trigger_mask
16 RWX WOX_AND WOX_OR PB_STATION_LINK0_PROTOCOL_ERROR_MASK: link0_protocol_error_mask
17 RWX WOX_AND WOX_OR PB_STATION_LINK0_OVERFLOW_ERROR_MASK: link0_overflow_error_mask
18 RWX WOX_AND WOX_OR PB_STATION_LINK0_HW_PARITY_ERROR_MASK: link0_hw_parity_error_mask
19 RWX WOX_AND WOX_OR PB_STATION_LINK1_PROTOCOL_ERROR_MASK: link1_protocol_error_mask
20 RWX WOX_AND WOX_OR PB_STATION_LINK1_OVERFLOW_ERROR_MASK: link1_overflow_error_mask
21 RWX WOX_AND WOX_OR PB_STATION_LINK1_HW_PARITY_ERROR_MASK: link1_hw_parity_error_mask

PowerBus PB RaceTrack Station nest domain FIR Action 0 Register
Addr: 00000000030113C6 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_ACTION0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION0: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station nest domain FIR Action 1 Register
Addr: 00000000030113C7 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_ACTION1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:21PB.PB_COM.PB_SCOM_ES4.FIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:21) [0000000000000000000000]
Bit(s)SCOM Dial: Description
0:21 RW PB_STATION_FIR_ACTION1: PowerBus PB RaceTrack Station nest domain FIR LSB of action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = Checkstop
(0,1) = Recoverable Error to Service Processor
(1,0) = Recoverable Interrupt to Processor
(1,1) = Invalid

PowerBus PB RaceTrack Station Mode Config reg
Addr: 00000000030113CA (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_MODE
Constant(s):
Comments:00 pb_station_pbixxx_init 01:03 pb_station_dbg_max_hang_stage_reached 04 pb_cfg_hop_mode 05 pb_cfg_pump_mode 06 pb_cfg_repro_mode 07 pb_cfg_sl_domain_size 08 pb_cfg_hng_chk_disable 09 pb_cfg_dbg_clr_max_hang_stage 10 pb_cfg_req_gather_enable 11 spare 12:15 pb_cfg_sw_ab_wait(0:3) 16:22 pb_cfg_sp_hw_mark(0:6) 23:29 pb_cfg_gp_hw_mark(0:6) 30:35 pb_cfg_lcl_hw_mark(0:5) 36:38 pb_cfg_mca_ratio_override 39:41 pb_cfg_mca_ratio_internal 42:43 pb_cfg_mca_ratio_sel 44 pb_cfg_pau_step_override 45:46 pb_cfg_pau_step_sel 47 spare 48:51 pb_cfg_pau_ratio_internal 52:62 pb_cfg_tmgr_protocol 63 pb_cfg_reset_error_capture
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0PB.PB_COM.PB_SCOM_ES4.PB_PBIXXX_INIT_Q_INST.LATC.L2(0) [0]
1:3PB.PB_COM.PB_SCOM_ES4.PB_DBG_MAX_HANG_STAGE_REACHED_Q_0_INST.LATC.L2(0:2) [000]
4:63PB.PB_COM.PB_SCOM_ES4.REG0_DATA_Q_4_INST.LATC.L2(4:63) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_station_pbixxx_init
1:3 ROX pb_station_dbg_max_hang_stage_reached
4 RWX PB_CFG_HOP_MODE_ES4: configures the number of SMP tiers. 0=1-hop {Default}. 1=2-hop.

Dial enums:
ONE_HOP=>0b0
TWO_HOP=>0b1
5 RWX PB_CFG_PUMP_MODE_ES4: configures the physical broadcast. 0=Chip_is_node. 1=Chip_is_group {Default}.

Dial enums:
CHIP_IS_NODE=>0b0
CHIP_IS_GROUP=>0b1
6 RWX PB_CFG_REPRO_MODE_ES4: Configures the internal buses to r=un in lab only repro mode. Default=OFF.
7 RWX PB_CFG_SL_DOMAIN_SIZE_ES4: Configures size of SL domain. 0=Hemisphere. 1=chip.

Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
8 RWX pb_cfg_hng_chk_disable
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
9 RWX pb_cfg_dbg_clr_max_hang_stage
Dial enums:
SL_DOMAIN_IS_HEMISPHERE=>0b0
SL_DOMAIN_IS_CHIP=>0b1
10 RWX PB_CFG_REQ_GATHER_ENABLE_ES4: Enable Data OW gathering on all chiplet/link requests. {default=on}
11 RW PB_CFG_NHTM_EVENT_COMP_EN_ES4: Enable nHTM PMU event collection. {default=off}
12 RWX PB_CFG_SWITCH_OPTION_AB_ES4: ESCOM access to determine what signal drives pb_cfg_switch_cd. on=tc_pb_switch_ab, off=tc_pb_switch_cd.
13:15 RWX PB_CFG_SW_AB_WAIT_ES4: Adds delay to tc_pb_switch_ab input from TPC during hot plug sequence

Dial enums:
CNT_0=>0b000
CNT_8=>0b001
CNT_16=>0b010
CNT_24=>0b011
CNT_32=>0b100
CNT_40=>0b101
CNT_48=>0b110
CNT_56=>0b111
16:22 RWX PB_CFG_SP_HW_MARK_ES4: configures the maximum system pumps a station/chip may issue
23:29 RWX PB_CFG_GP_HW_MARK_ES4: configures the maximum group pumps a station/chip may issue
30:35 RWX PB_CFG_NP_HW_MARK_ES4: configures the maximum local nodal pumps a station/chip may issue
36:38 RWX PB_CFG_MCA_RATIO_OVERRIDE_ES4: overrides the mca ratio from the pbiasy. Default=000=no override. Fastest Nest=000. Slowest Nest=111
39:41 WOX pb_cfg_mca_ratio_internal
42:43 RWX PB_CFG_MCA_RATIO_SEL_ES4: Select MCA ratio source. 00=MC0. 01=MC1. 10=MC2. 11=MC3.
44 RWX PB_CFG_PAU_STEP_OVERRIDE_ES4: Overrides the PAU step from PBIASY.
45:46 RWX PB_CFG_PAU_STEP_SEL_ES4: Select PAU step source. 00=PA0. 01=PA3. 10=PA5. 11=PA7.
47 RW PB_CFG_SWITCH_CD_GATE_ENABLE_ES4: Enable switch_cd to gate PBIASY selcd and disable and synchronize to switch_cd pulse.
48:51 WOX pb_cfg_pau_ratio_internal
52 RWX PB_CFG_TMGR_OP2_OVERLAP_DISABLE_ES4: 0=issue tmgr_set command when op1 command completes. 1=issue tmgr_set when op completes.
53 RWX PB_CFG_TMGR_SERIES_ID_DISABLE_ES4: 0=tlbi commands use series_id. 1=tlbi commands use series_id as sequence_id.
54 RWX PB_CFG_TMGR_TOKEN_ID_RANGE_ES4: 0=tlbi range 0:7. slbi range 8:11. 1=tlbi and slbi range 0:11.
55:58 RWX PB_CFG_TMGR_MAX_TLBI_TOKENS_ES4: Max number of tlbi tokens. Default=8.
59:62 RWX PB_CFG_TMGR_MAX_SLBI_TOKENS_ES4: Max number of slbi tokens. Default=4.
63 RWX PB_CFG_RESET_ERROR_CAPTURE_ES4: Reset error capture registers.

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 00000000030113CB (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE1_NEXT
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 pb_cfg_spare0 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 pb_cfg_spare1 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 pb_cfg_spare3
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG1A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_NEXT_ES4: PowerBus master.
1 RWX PB_CFG_TM_MASTER_NEXT_ES4: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_NEXT_ES4: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_NEXT_ES4: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_NEXT_ES4: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_NEXT_ES4: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_NEXT_ES4: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_NEXT_ES4: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_NEXT_ES4: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_NEXT_ES4: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_NEXT_ES4: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_NEXT_ES4: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_NEXT_ES4: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode1 Config reg
Addr: 00000000030113CC (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE1_CURR
Constant(s):
Comments:00 pb_cfg_master_chip 01 pb_cfg_tm_master 02 pb_cfg_chg_rate_gp_master 03 pb_cfg_chg_rate_sp_master 04:07 spare 08:15 pb_cfg_np_cmd_rate 16 pb_cfg_g_aggregate 17 pb_cfg_g_indirect_en 18 pb_cfg_g_gather_enable 19:23 spare 24:31 pb_cfg_min_gp_cmd_rate 32 pb_cfg_r_aggregate 33 pb_cfg_r_indirect_en 34 pb_cfg_r_gather_enable 35:39 pb_cfg_spare2 40:47 pb_cfg_min_sp_cmd_rate 48:63 spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG1B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_MASTER_CHIP_CURR_ES4: PowerBus master.
1 RWX PB_CFG_TM_MASTER_CURR_ES4: configure Chip as PB TM Master.
2 RWX PB_CFG_CHG_RATE_GP_MASTER_CURR_ES4: Sets the Group pump change rate master. This master gathers all GP chg_rate.reqs and issues a chg_rate.gnt.
3 RWX PB_CFG_CHG_RATE_SP_MASTER_CURR_ES4: Sets the System pump change rate master. This master gathers all SP chg_rate.reqs and issues a chg_rate.gnt.
4:7 ROX pb_cfg_spare0
8:15 RWX PB_CFG_NP_CMD_RATE_CURR_ES4: configures the commnd NP token rate
16 RWX PB_CFG_G_AGGREGATE_CURR_ES4: Indicates one or more G links are aggregated as data only links.
17 RWX PB_CFG_G_INDIRECT_EN_CURR_ES4: PowerBus G links are configured for indirect data routing.
18 RWX PB_CFG_G_GATHER_ENABLE_CURR_ES4: OctWord gathering enabled on G links.
19:23 ROX pb_cfg_spare1
24:31 RWX PB_CFG_MIN_GP_CMD_RATE_CURR_ES4: configures the minimim command GP token rate
32 RWX PB_CFG_R_AGGREGATE_CURR_ES4: Indicates one or more R links are aggregated as data only links.
33 RWX PB_CFG_R_INDIRECT_EN_CURR_ES4: PowerBus R links are configured for indirect data routing.
34 RWX PB_CFG_R_GATHER_ENABLE_CURR_ES4: OctWord gathering enabled on R links.
35:39 ROX pb_cfg_spare2
40:47 RWX PB_CFG_MIN_SP_CMD_RATE_CURR_ES4: configures the minimim command SP token rate
48:63 ROX pb_cfg_spare3

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 00000000030113CD (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE2_NEXT
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG2A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_NEXT_ES4: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_NEXT_ES4: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_NEXT_ES4: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_NEXT_ES4: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_NEXT_ES4: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_NEXT_ES4: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_NEXT_ES4: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_NEXT_ES4: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_NEXT_ES4: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_NEXT_ES4: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_NEXT_ES4: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_NEXT_ES4: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_NEXT_ES4: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_NEXT_ES4: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_NEXT_ES4: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_NEXT_ES4: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_NEXT_ES4: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_NEXT_ES4: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_NEXT_ES4: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_NEXT_ES4: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_NEXT_ES4: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_NEXT_ES4: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_NEXT_ES4: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_NEXT_ES4: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_NEXT_ES4: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_NEXT_ES4: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_NEXT_ES4: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_NEXT_ES4: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_NEXT_ES4: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_NEXT_ES4: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_NEXT_ES4: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_NEXT_ES4: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode2 Config reg
Addr: 00000000030113CE (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE2_CURR
Constant(s):
Comments:00 pb_cfg_link_ax0_en 01 pb_cfg_link_ax1_en 02 pb_cfg_link_ax2_en 03 pb_cfg_link_ax3_en 04 pb_cfg_link_ax4_en 05 pb_cfg_link_ax5_en 06 pb_cfg_link_ax6_en 07 pb_cfg_link_ax7_en 08 pb_cfg_ax0_addr_dis 09 pb_cfg_ax1_addr_dis 10 pb_cfg_ax2_addr_dis 11 pb_cfg_ax3_addr_dis 12 pb_cfg_ax4_addr_dis 13 pb_cfg_ax5_addr_dis 14 pb_cfg_ax6_addr_dis 15 pb_cfg_ax7_addr_dis 16 pb_cfg_link_ax0_mode 17:19 pb_cfg_link_ax0_id 20 pb_cfg_link_ax1_mode 21:23 pb_cfg_link_ax1_id 24 pb_cfg_link_ax2_mode 25:27 pb_cfg_link_ax2_id 28 pb_cfg_link_ax3_mode 29:31 pb_cfg_link_ax3_id 32 pb_cfg_link_ax4_mode 33:35 pb_cfg_link_ax4_id 36 pb_cfg_link_ax5_mode 37:39 pb_cfg_link_ax5_id 40 pb_cfg_link_ax6_mode 41:43 pb_cfg_link_ax6_id 44 pb_cfg_link_ax7_mode 45:47 pb_cfg_link_ax7_id 48:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG2B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_LINK_AX0_EN_CURR_ES4: Link AX0 Enabled.
1 RWX PB_CFG_LINK_AX1_EN_CURR_ES4: Link AX1 Enabled.
2 RWX PB_CFG_LINK_AX2_EN_CURR_ES4: Link AX2 Enabled.
3 RWX PB_CFG_LINK_AX3_EN_CURR_ES4: Link AX3 Enabled.
4 RWX PB_CFG_LINK_AX4_EN_CURR_ES4: Link AX4 Enabled.
5 RWX PB_CFG_LINK_AX5_EN_CURR_ES4: Link AX5 Enabled.
6 RWX PB_CFG_LINK_AX6_EN_CURR_ES4: Link AX6 Enabled.
7 RWX PB_CFG_LINK_AX7_EN_CURR_ES4: Link AX7 Enabled.
8 RWX PB_CFG_LINK_AX0_ADDR_DIS_CURR_ES4: Link AX0 address broadcast disabled.
9 RWX PB_CFG_LINK_AX1_ADDR_DIS_CURR_ES4: Link AX1 address broadcast disabled.
10 RWX PB_CFG_LINK_AX2_ADDR_DIS_CURR_ES4: Link AX2 address broadcast disabled.
11 RWX PB_CFG_LINK_AX3_ADDR_DIS_CURR_ES4: Link AX3 address broadcast disabled.
12 RWX PB_CFG_LINK_AX4_ADDR_DIS_CURR_ES4: Link AX4 address broadcast disabled.
13 RWX PB_CFG_LINK_AX5_ADDR_DIS_CURR_ES4: Link AX5 address broadcast disabled.
14 RWX PB_CFG_LINK_AX6_ADDR_DIS_CURR_ES4: Link AX6 address broadcast disabled.
15 RWX PB_CFG_LINK_AX7_ADDR_DIS_CURR_ES4: Link AX7 address broadcast disabled.
16 RWX PB_CFG_LINK_AX0_MODE_CURR_ES4: Link AX0 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
17:19 RWX PB_CFG_LINK_AX0_ID_CURR_ES4: ID of chip connected to AX0 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
20 RWX PB_CFG_LINK_AX1_MODE_CURR_ES4: Link AX1 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
21:23 RWX PB_CFG_LINK_AX1_ID_CURR_ES4: ID of chip connected to AX1 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
24 RWX PB_CFG_LINK_AX2_MODE_CURR_ES4: Link AX2 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
25:27 RWX PB_CFG_LINK_AX2_ID_CURR_ES4: ID of chip connected to AX2 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28 RWX PB_CFG_LINK_AX3_MODE_CURR_ES4: Link AX3 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
29:31 RWX PB_CFG_LINK_AX3_ID_CURR_ES4: ID of chip connected to AX3 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
32 RWX PB_CFG_LINK_AX4_MODE_CURR_ES4: Link AX4 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
33:35 RWX PB_CFG_LINK_AX4_ID_CURR_ES4: ID of chip connected to AX4 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
36 RWX PB_CFG_LINK_AX5_MODE_CURR_ES4: Link AX5 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
37:39 RWX PB_CFG_LINK_AX5_ID_CURR_ES4: ID of chip connected to AX5 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40 RWX PB_CFG_LINK_AX6_MODE_CURR_ES4: Link AX6 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
41:43 RWX PB_CFG_LINK_AX6_ID_CURR_ES4: ID of chip connected to AX6 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
44 RWX PB_CFG_LINK_AX7_MODE_CURR_ES4: Link AX7 SMP Tier. 0=G-bus (Intra-Group). 1=R-bus (Inter-Group).

Dial enums:
GBUS=>0b0
RBUS=>0b1
45:47 RWX PB_CFG_LINK_AX7_ID_CURR_ES4: ID of chip connected to AX7 link.

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
48:63 RWX pb_cfg_spare
Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 00000000030113CF (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE3_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG3A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_NEXT_ES4: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_NEXT_ES4: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_NEXT_ES4: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_NEXT_ES4: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_NEXT_ES4: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_NEXT_ES4: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_NEXT_ES4: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_NEXT_ES4: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_NEXT_ES4: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_NEXT_ES4: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_NEXT_ES4: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_NEXT_ES4: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_NEXT_ES4: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_NEXT_ES4: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_NEXT_ES4: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_NEXT_ES4: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_NEXT_ES4: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_NEXT_ES4: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_NEXT_ES4: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_NEXT_ES4: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_NEXT_ES4: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_NEXT_ES4: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_NEXT_ES4: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_NEXT_ES4: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_NEXT_ES4: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_NEXT_ES4: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_NEXT_ES4: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_NEXT_ES4: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_NEXT_ES4: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_NEXT_ES4: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_NEXT_ES4: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_NEXT_ES4: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP Mode3 Config reg
Addr: 00000000030113D0 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE3_CURR
Constant(s):
Comments:00 pb_cfg_td_entry0_valid 01 pb_cfg_td_entry1_valid 02 pb_cfg_td_entry2_valid 03 pb_cfg_td_entry3_valid 04 pb_cfg_td_entry4_valid 05 pb_cfg_td_entry5_valid 06 pb_cfg_td_entry6_valid 07 pb_cfg_td_entry7_valid 08 pb_cfg_td_entry8_valid 09 pb_cfg_td_entry9_valid 10 pb_cfg_td_entry10_valid 11 pb_cfg_td_entry11_valid 12 pb_cfg_td_entry12_valid 13 pb_cfg_td_entry13_valid 14 pb_cfg_td_entry14_valid 15 pb_cfg_td_entry15_valid 16:18 pb_cfg_td_entry0_ax_num 19:21 pb_cfg_td_entry1_ax_num 22:24 pb_cfg_td_entry2_ax_num 25:27 pb_cfg_td_entry3_ax_num 28:30 pb_cfg_td_entry4_ax_num 31:33 pb_cfg_td_entry5_ax_num 34:36 pb_cfg_td_entry6_ax_num 37:39 pb_cfg_td_entry7_ax_num 40:42 pb_cfg_td_entry8_ax_num 43:45 pb_cfg_td_entry9_ax_num 46:48 pb_cfg_td_entry10_ax_num 49:51 pb_cfg_td_entry11_ax_num 52:54 pb_cfg_td_entry12_ax_num 55:57 pb_cfg_td_entry13_ax_num 58:60 pb_cfg_td_entry14_ax_num 61:63 pb_cfg_td_entry15_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG3B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY0_VALID_CURR_ES4: Topology ID entry0 valid.
1 RWX PB_CFG_TID_ENTRY1_VALID_CURR_ES4: Topology ID entry1 valid.
2 RWX PB_CFG_TID_ENTRY2_VALID_CURR_ES4: Topology ID entry2 valid.
3 RWX PB_CFG_TID_ENTRY3_VALID_CURR_ES4: Topology ID entry3 valid.
4 RWX PB_CFG_TID_ENTRY4_VALID_CURR_ES4: Topology ID entry4 valid.
5 RWX PB_CFG_TID_ENTRY5_VALID_CURR_ES4: Topology ID entry5 valid.
6 RWX PB_CFG_TID_ENTRY6_VALID_CURR_ES4: Topology ID entry6 valid.
7 RWX PB_CFG_TID_ENTRY7_VALID_CURR_ES4: Topology ID entry7 valid.
8 RWX PB_CFG_TID_ENTRY8_VALID_CURR_ES4: Topology ID entry8 valid.
9 RWX PB_CFG_TID_ENTRY9_VALID_CURR_ES4: Topology ID entry9 valid.
10 RWX PB_CFG_TID_ENTRY10_VALID_CURR_ES4: Topology ID entry10 valid.
11 RWX PB_CFG_TID_ENTRY11_VALID_CURR_ES4: Topology ID entry11 valid.
12 RWX PB_CFG_TID_ENTRY12_VALID_CURR_ES4: Topology ID entry12 valid.
13 RWX PB_CFG_TID_ENTRY13_VALID_CURR_ES4: Topology ID entry13 valid.
14 RWX PB_CFG_TID_ENTRY14_VALID_CURR_ES4: Topology ID entry14 valid.
15 RWX PB_CFG_TID_ENTRY15_VALID_CURR_ES4: Topology ID entry15 valid.
16:18 RWX PB_CFG_TID_ENTRY0_AX_NUM_CURR_ES4: Topology ID entry0 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY1_AX_NUM_CURR_ES4: Topology ID entry1 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY2_AX_NUM_CURR_ES4: Topology ID entry2 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY3_AX_NUM_CURR_ES4: Topology ID entry3 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY4_AX_NUM_CURR_ES4: Topology ID entry4 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY5_AX_NUM_CURR_ES4: Topology ID entry5 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY6_AX_NUM_CURR_ES4: Topology ID entry6 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY7_AX_NUM_CURR_ES4: Topology ID entry7 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY8_AX_NUM_CURR_ES4: Topology ID entry8 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY9_AX_NUM_CURR_ES4: Topology ID entry9 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY10_AX_NUM_CURR_ES4: Topology ID entry10 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY11_AX_NUM_CURR_ES4: Topology ID entry11 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY12_AX_NUM_CURR_ES4: Topology ID entry12 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY13_AX_NUM_CURR_ES4: Topology ID entry13 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY14_AX_NUM_CURR_ES4: Topology ID entry14 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY15_AX_NUM_CURR_ES4: Topology ID entry15 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 00000000030113D1 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE4_NEXT
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG4A_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_NEXT_ES4: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_NEXT_ES4: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_NEXT_ES4: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_NEXT_ES4: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_NEXT_ES4: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_NEXT_ES4: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_NEXT_ES4: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_NEXT_ES4: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_NEXT_ES4: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_NEXT_ES4: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_NEXT_ES4: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_NEXT_ES4: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_NEXT_ES4: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_NEXT_ES4: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_NEXT_ES4: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_NEXT_ES4: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_NEXT_ES4: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_NEXT_ES4: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_NEXT_ES4: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_NEXT_ES4: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_NEXT_ES4: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_NEXT_ES4: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_NEXT_ES4: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_NEXT_ES4: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_NEXT_ES4: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_NEXT_ES4: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_NEXT_ES4: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_NEXT_ES4: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_NEXT_ES4: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_NEXT_ES4: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_NEXT_ES4: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_NEXT_ES4: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station HP MODE4 Config reg
Addr: 00000000030113D2 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE4_CURR
Constant(s):
Comments:00 pb_cfg_td_entry16_valid 01 pb_cfg_td_entry17_valid 02 pb_cfg_td_entry18_valid 03 pb_cfg_td_entry19_valid 04 pb_cfg_td_entry20_valid 05 pb_cfg_td_entry21_valid 06 pb_cfg_td_entry22_valid 07 pb_cfg_td_entry23_valid 08 pb_cfg_td_entry24_valid 09 pb_cfg_td_entry25_valid 10 pb_cfg_td_entry26_valid 11 pb_cfg_td_entry27_valid 12 pb_cfg_td_entry28_valid 13 pb_cfg_td_entry29_valid 14 pb_cfg_td_entry30_valid 15 pb_cfg_td_entry31_valid 16:18 pb_cfg_td_entry16_ax_num 19:21 pb_cfg_td_entry17_ax_num 22:24 pb_cfg_td_entry18_ax_num 25:27 pb_cfg_td_entry19_ax_num 28:30 pb_cfg_td_entry20_ax_num 31:33 pb_cfg_td_entry21_ax_num 34:36 pb_cfg_td_entry22_ax_num 37:39 pb_cfg_td_entry23_ax_num 40:42 pb_cfg_td_entry24_ax_num 43:45 pb_cfg_td_entry25_ax_num 46:48 pb_cfg_td_entry26_ax_num 49:51 pb_cfg_td_entry27_ax_num 52:54 pb_cfg_td_entry28_ax_num 55:57 pb_cfg_td_entry29_ax_num 58:60 pb_cfg_td_entry30_ax_num 61:63 pb_cfg_td_entry31_ax_num
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG4B_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_TID_ENTRY16_VALID_CURR_ES4: Topology ID entry16 valid.
1 RWX PB_CFG_TID_ENTRY17_VALID_CURR_ES4: Topology ID entry17 valid.
2 RWX PB_CFG_TID_ENTRY18_VALID_CURR_ES4: Topology ID entry18 valid.
3 RWX PB_CFG_TID_ENTRY19_VALID_CURR_ES4: Topology ID entry19 valid.
4 RWX PB_CFG_TID_ENTRY20_VALID_CURR_ES4: Topology ID entry20 valid.
5 RWX PB_CFG_TID_ENTRY21_VALID_CURR_ES4: Topology ID entry21 valid.
6 RWX PB_CFG_TID_ENTRY22_VALID_CURR_ES4: Topology ID entry22 valid.
7 RWX PB_CFG_TID_ENTRY23_VALID_CURR_ES4: Topology ID entry23 valid.
8 RWX PB_CFG_TID_ENTRY24_VALID_CURR_ES4: Topology ID entry24 valid.
9 RWX PB_CFG_TID_ENTRY25_VALID_CURR_ES4: Topology ID entry25 valid.
10 RWX PB_CFG_TID_ENTRY26_VALID_CURR_ES4: Topology ID entry26 valid.
11 RWX PB_CFG_TID_ENTRY27_VALID_CURR_ES4: Topology ID entry27 valid.
12 RWX PB_CFG_TID_ENTRY28_VALID_CURR_ES4: Topology ID entry28 valid.
13 RWX PB_CFG_TID_ENTRY29_VALID_CURR_ES4: Topology ID entry29 valid.
14 RWX PB_CFG_TID_ENTRY30_VALID_CURR_ES4: Topology ID entry30 valid.
15 RWX PB_CFG_TID_ENTRY31_VALID_CURR_ES4: Topology ID entry31 valid.
16:18 RWX PB_CFG_TID_ENTRY16_AX_NUM_CURR_ES4: Topology ID entry16 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
19:21 RWX PB_CFG_TID_ENTRY17_AX_NUM_CURR_ES4: Topology ID entry17 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
22:24 RWX PB_CFG_TID_ENTRY18_AX_NUM_CURR_ES4: Topology ID entry18 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
25:27 RWX PB_CFG_TID_ENTRY19_AX_NUM_CURR_ES4: Topology ID entry19 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
28:30 RWX PB_CFG_TID_ENTRY20_AX_NUM_CURR_ES4: Topology ID entry20 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
31:33 RWX PB_CFG_TID_ENTRY21_AX_NUM_CURR_ES4: Topology ID entry21 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
34:36 RWX PB_CFG_TID_ENTRY22_AX_NUM_CURR_ES4: Topology ID entry22 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
37:39 RWX PB_CFG_TID_ENTRY23_AX_NUM_CURR_ES4: Topology ID entry23 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
40:42 RWX PB_CFG_TID_ENTRY24_AX_NUM_CURR_ES4: Topology ID entry24 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
43:45 RWX PB_CFG_TID_ENTRY25_AX_NUM_CURR_ES4: Topology ID entry25 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
46:48 RWX PB_CFG_TID_ENTRY26_AX_NUM_CURR_ES4: Topology ID entry26 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
49:51 RWX PB_CFG_TID_ENTRY27_AX_NUM_CURR_ES4: Topology ID entry27 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
52:54 RWX PB_CFG_TID_ENTRY28_AX_NUM_CURR_ES4: Topology ID entry28 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
55:57 RWX PB_CFG_TID_ENTRY29_AX_NUM_CURR_ES4: Topology ID entry29 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
58:60 RWX PB_CFG_TID_ENTRY30_AX_NUM_CURR_ES4: Topology ID entry30 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111
61:63 RWX PB_CFG_TID_ENTRY31_AX_NUM_CURR_ES4: Topology ID entry31 physical link number

Dial enums:
ID_0=>0b000
ID_1=>0b001
ID_2=>0b010
ID_3=>0b011
ID_4=>0b100
ID_5=>0b101
ID_6=>0b110
ID_7=>0b111

PowerBus PB RaceTrack Station Configuration Register 1
Addr: 00000000030113D3 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_CFG1
Constant(s):
Comments:00 pb_cfg_oc_exp_disable 01:05 pb_cfg_oc_early_expiration_time 06:11 pb_cfg_oc_expiration_time 12:16 pb_cfg_link0_outbound_queue_limit 17:21 pb_cfg_link1_outbound_queue_limit 22:23 pb_cfg_spare1 24:27 pb_cfg_link0_outbound_queue_min 28:31 pb_cfg_link0_outbound_queue_max 32:33 pb_cfg_dat_link0_don_ptl_vcinit 34:35 pb_cfg_dat_link1_don_ptl_vcinit 36 pb_cfg_dat_link_don_ptl_arb_mode_vc0 37 pb_cfg_dat_link_don_ptl_arb_mode_vc1 38:39 pb_cfg_dat_link_doff_pau_arb_vcinit 40:41 pb_cfg_dat_link_doff_pau_arb_mode 42:43 pb_cfg_dat_link_doff_pau_crd_mode 44:45 pb_cfg_dat_link_doff_pe_vcinit 46:47 pb_cfg_dat_link_doff_pe_arb_mode 48:49 pb_cfg_dat_link_doff_pe_crd_mode 50:55 pb_cfg_spare2 56:59 pb_cfg_link1_outbound_queue_min 60:63 pb_cfg_link1_outbound_queue_max
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG5_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX PB_CFG_OC_EXP_DISABLE_ES4: Disables OC expiration timers. Default=OFF.
1:5 RWX PB_CFG_OC_EARLY_EXP_TIME_ES4: configures the OC early expiration time
6:11 RWX PB_CFG_OC_EXPIRATION_TIME_ES4: configures the OC expiration time
12:16 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_LIMIT_AX0: OC outbound when the credit reaches this value. Set to 0 to disable. Default = 8.
17:21 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_LIMIT_AX1: OC outbound when the credit reaches this value. Set to 0 to disable. Default = 8.
22:23 RWX pb_cfg_spare1
24:27 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_MIN_AX0: CPB=0 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
28:31 RWX PB_CFG_DAT_LINK0_OUTBOUND_QUEUE_MAX_AX0: CPB=1 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
32:33 RWX PB_CFG_DAT_LINK0_DON_PTL_VCINIT_AX0: Configures number of entries per VC. 00=32VC0. 01=24VC0,8VC1. 10=8VC0,24VC1. 11=16VC0,16VC1.

Dial enums:
DON_32_0=>0b00
DON_24_8=>0b01
DON_8_24=>0b10
DON_16_16=>0b11
34:35 RWX PB_CFG_DAT_LINK1_DON_PTL_VCINIT_AX1: Configures number of entries per VC. 00=32VC0. 01=24VC0,8VC1. 10=8VC0,24VC1. 11=16VC0,16VC1.

Dial enums:
DON_32_0=>0b00
DON_24_8=>0b01
DON_8_24=>0b10
DON_16_16=>0b11
36 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC0_ES4: VC0 Dreq threshold. 0=Eight. 1=Seven.

Dial enums:
EIGHT=>0b0
SEVEN=>0b1
37 RWX PB_CFG_DAT_LINK_DON_PTL_ARB_MODE_VC1_ES4: VC1 Dreq threshold. 0=Four . 1=Seven.

Dial enums:
FOUR=>0b0
SEVEN=>0b1
38:39 RWX PB_CFG_DAT_LINK_DOFF_PAU_VCINIT_ES4: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
40:41 RWX PB_CFG_DAT_LINK_DOFF_PAU_ARB_MODE_ES4: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
42:43 RWX PB_CFG_DAT_LINK_DOFF_PAU_CRD_MODE_ES4: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
44:45 RWX PB_CFG_DAT_LINK_DOFF_PE_VCINIT_ES4: Configures number of entries per VC. 00=64. 01=48. 10=32. 11=16.

Dial enums:
DOFF_64=>0b00
DOFF_48=>0b01
DOFF_32=>0b10
DOFF_16=>0b11
46:47 RWX PB_CFG_DAT_LINK_DOFF_PE_ARB_MODE_ES4: Configures gathering mode. 0x=Gathering disabled. 10=Gather 4_OW. 11=Gather8_OW.

Dial enums:
GATHER_0=>0b00
GATHER_00=>0b01
GATHER_4=>0b10
GATHER_8=>0b11
48:49 RWX PB_CFG_DAT_LINK_DOFF_PE_CRD_MODE_ES4: Configures credit mode. 00=15 credits. 01=19 credits. 10=23 credits. 11=31 credits.

Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
50:55 RWX pb_cfg_spare2
Dial enums:
CREDIT_15=>0b00
CREDIT_19=>0b01
CREDIT_23=>0b10
CREDIT_31=>0b11
56:59 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_MIN_AX1: CPB=0 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.
60:63 RWX PB_CFG_DAT_LINK1_OUTBOUND_QUEUE_MAX_AX1: CPB=1 when outbound queue credit reaches this value. Set to 0 to disable. Default = 0.

PowerBus PB RaceTrack Station Configuration Register 2
Addr: 00000000030113D4 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_CFG2
Constant(s):
Comments:00:03 pb_cfg_dat_g_agg_thresh 04:07 pb_cfg_dat_r_agg_thresh 08:11 pb_cfg_dat_g_ind_thresh 12:15 pb_cfg_dat_r_ind_thresh 16 pb_cfg_dat_use_burst 17:19 pb_cfg_dat_rate_thresh 20:23 pb_cfg_dat_req_hold_cnt_threshold 24:30 pb_cfg_dat_link0_dob_vc0_limit 31:37 pb_cfg_dat_link0_dob_vc1_limit 38:44 pb_cfg_dat_link1_dob_vc0_limit 45:51 pb_cfg_dat_link1_dob_vc1_limit 52 pb_cfg_dat_tok_init 53 pb_cfg_dat_horizontal_disable 54:63 pb_cfg_spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:51PB.PB_COM.PB_SCOM_ES4.REG6_DATA_Q_0_INST.LATC.L2(0:51) [0000000000000000000000000000000000000000000000000000]
52PB.PB_COM.PB_SCOM_ES4.REG6_DATA_Q_52_INST.LATC.L2(52) [0]
53:63PB.PB_COM.PB_SCOM_ES4.REG6_DATA_Q_53_INST.LATC.L2(53:63) [00000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_DAT_G_AGG_THRESH_ES4: G link aggregate threshold. Default=4.
4:7 RWX PB_CFG_DAT_R_AGG_THRESH_ES4: R link aggregate threshold. Default=4.
8:11 RWX PB_CFG_DAT_G_IND_THRESH_ES4: G link indirect threshold. Default=4.
12:15 RWX PB_CFG_DAT_R_IND_THRESH_ES4: R link indirect threshold. Default=4.
16 RWX PB_CFG_DAT_USE_BURST_ES4: Use the burst signal from the unit for local gathering. Default=on.
17:19 RWX PB_CFG_DAT_RATE_THRESH_ES4: Measures contention, gathering normally blocks requesters, doesnt if this rate is set. Default=2
20:23 RWX PB_CFG_DAT_REQ_HOLD_CNT_THRESHOLD_ES4: Determines how long to try for the short path before trying long path. Default=1.
24:30 RWX PB_CFG_DAT_LINK_DOB_VC0_LIMIT_AX0: Configures DOB doff VC0 link credits. Default=64.
31:37 RWX PB_CFG_DAT_LINK_DOB_VC1_LIMIT_AX0: Configures DOB doff VC1 link credits. Default=64.
38:44 RWX PB_CFG_DAT_LINK_DOB_VC0_LIMIT_AX1: Configures DOB doff VC0 link credits. Default=64.
45:51 RWX PB_CFG_DAT_LINK_DOB_VC1_LIMIT_AX1: Configures DOB doff VC1 link credits. Default=64.
52 NCX PB_CFG_DAT_TOK_INIT_ES4: Reloads the token count (will also return tokens from the ring and reset itself).
53 RWX PB_CFG_DAT_HORIZONTAL_DISABLE_ES4: Disable Horizontal buses.
54:58 RWX PB_CFG_COM_CR_XLINK_MAX_ES4: how many cresp can send accros X-link. Default=28.
59:63 RWX PB_CFG_COM_CR_ALINK_MAX_ES4: how many cresp can send accros A-link. Default=14.

PowerBus PB RaceTrack Station Configuration Register 3
Addr: 00000000030113D5 (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_CFG3
Constant(s):
Comments:00:03 pb_cfg_chip_tsnoop_delay 04:15 pb_cfg_spare1 16 pb_cfg_pbiasy_unit0_disable 17 pb_cfg_pbiasy_unit1_disable 18 pb_cfg_pbiasy_link0_disable 19 pb_cfg_pbiasy_link1_disable 20 pb_cfg_pbiasy_unit0_selcd 21 pb_cfg_pbiasy_unit1_selcd 22 pb_cfg_pbiasy_link0_selcd 23 pb_cfg_pbiasy_link1_selcd 24:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG7_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RWX PB_CFG_CHIP_TSNOOP_DELAY_ES4: Racetrack Tsnoop delay adder. Default=0b1100 (Tsnoop=25).
4:15 RWX pb_cfg_spare1
16 RWX PB_CFG_PBIASY_PA0_DISABLE: Disable PA0 PBIASY. Default=0
17 RWX pb_cfg_pbiasy_unit1_disable
18 RWX PB_CFG_PBIASY_PTL0_DISABLE: Disable PTL0 PBIASY. Default=0
19 RWX PB_CFG_PBIASY_PTL1_DISABLE: Disable PTL1 PBIASY. Default=0
20 RWX PB_CFG_PBIASY_PA0_SELCD: Select PA0 PBIASY mode C or mode D. C=0, D=1. Default=0
21 RWX pb_cfg_pbiasy_unit1_selcd
22 RWX PB_CFG_PBIASY_PTL0_SELCD: Select PTL0 PBIASY mode C or mode D. C=0, D=1. Default=0
23 RWX PB_CFG_PBIASY_PTL1_SELCD: Select PTL1 PBIASY mode C or mode D. C=0, D=1. Default=0
24:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station EVENT SEL reg
Addr: 00000000030113DA (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_EVENT_SEL
Constant(s):
Comments:00:02 pb_cfg_event_sel0 03:05 pb_cfg_event_sel1 06:08 pb_cfg_event_sel2 09:11 pb_cfg_event_sel3 12:14 pb_cfg_event_sel4 15:17 pb_cfg_event_sel5 18:20 pb_cfg_event_sel6 21:23 pb_cfg_event_sel7 24:39 pb_cfg_cnpme_enable 40:55 pb_cfg_cnpmw_enable 56 pb_cfg_pmu_port_sel 57 pb_cfg_pmu_port_sel2 58:63 pb_cfg_cnpm_mask
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG12_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX pb_cfg_event_sel0
3:5 RWX pb_cfg_event_sel1
6:8 RWX pb_cfg_event_sel2
9:11 RWX pb_cfg_event_sel3
12:14 RWX pb_cfg_event_sel4
15:17 RWX pb_cfg_event_sel5
18:20 RWX pb_cfg_event_sel6
21:23 RWX pb_cfg_event_sel7
24:39 RWX PB_CFG_EVENT_EAST_BITWISE_ENABLE_ES4: bit-pair enable of PB events asserted on event bus
40:55 RWX PB_CFG_EVENT_WEST_BITWISE_ENABLE_ES4: bit-pair enable of PB events asserted on event bus
56 RWX pb_cfg_pmu_port_sel
57 RWX pb_cfg_pmu_port_sel2
58:63 RWX pb_cfg_cnpm_mask

PowerBus PB RaceTrack Station EVENT COMPA reg
Addr: 00000000030113DB (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_EVENT_COMPA
Constant(s):
Comments:00:06 = pb_cfg_event_compa_ttype 07:13 = pb_cfg_event_compa_ttype_mask 14:21 = pb_cfg_event_compa_tsize 22:29 = pb_cfg_event_compa_tsize_mask 30:39 = pb_cfg_event_compa_ttag 40:49 = pb_cfg_event_compa_ttag_mask 50:54 = pb_cfg_event_compa_cresp 55:59 = pb_cfg_event_compa_cresp_mask 60 = pb_cfg_event_compa_cresp_polarity 61:63 = pb_cfg_event_compa_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG13_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPA_TTYPE_ES4: PMU event compare A - Ttype
7:13 RWX PB_CFG_EVENT_COMPA_TTYPE_MASK_ES4: PMU event compare A - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPA_TSIZE_ES4: PMU event compare A - tsize
22:29 RWX PB_CFG_EVENT_COMPA_TSIZE_MASK_ES4: PMU event compare A - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPA_TTAG_ES4: PMU event compare A - ttag
40:49 RWX PB_CFG_EVENT_COMPA_TTAG_MASK_ES4: PMU event compare A - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPA_CRESP_ES4: PMU event compare A - cresp
55:59 RWX PB_CFG_EVENT_COMPA_CRESP_MASK_ES4: PMU event compare A - cresp_mask
60 RWX PB_CFG_EVENT_COMPA_CRESP_POLARITY_ES4: PMU event compare A - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPA_SCOPE_ES4: PMU event compare A - scope

PowerBus PB RaceTrack Station EVENT COMPB reg
Addr: 00000000030113DC (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_EVENT_COMPB
Constant(s):
Comments:00:06 = pb_cfg_event_compb_ttype 07:13 = pb_cfg_event_compb_ttype_mask 14:21 = pb_cfg_event_compb_tsize 22:29 = pb_cfg_event_compb_tsize_mask 30:39 = pb_cfg_event_compb_ttag 40:49 = pb_cfg_event_compb_ttag_mask 50:54 = pb_cfg_event_compb_cresp 55:59 = pb_cfg_event_compb_cresp_mask 60 = pb_cfg_event_compb_cresp_polarity 61:63 = pb_cfg_event_compb_scope
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG14_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:6 RWX PB_CFG_EVENT_COMPB_TTYPE_ES4: PMU event compare B - Ttype
7:13 RWX PB_CFG_EVENT_COMPB_TTYPE_MASK_ES4: PMU event compare B - ttype_mask
14:21 RWX PB_CFG_EVENT_COMPB_TSIZE_ES4: PMU event compare B - tsize
22:29 RWX PB_CFG_EVENT_COMPB_TSIZE_MASK_ES4: PMU event compare B - tsize_mask
30:39 RWX PB_CFG_EVENT_COMPB_TTAG_ES4: PMU event compare B - ttag
40:49 RWX PB_CFG_EVENT_COMPB_TTAG_MASK_ES4: PMU event compare B - ttag_mask
50:54 RWX PB_CFG_EVENT_COMPB_CRESP_ES4: PMU event compare B - cresp
55:59 RWX PB_CFG_EVENT_COMPB_CRESP_MASK_ES4: PMU event compare B - cresp_mask
60 RWX PB_CFG_EVENT_COMPB_CRESP_POLARITY_ES4: PMU event compare B - cresp_polarity
61:63 RWX PB_CFG_EVENT_COMPB_SCOPE_ES4: PMU event compare B - scope

PowerBus PB RaceTrack Station EVENT COMPX reg
Addr: 00000000030113DD (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_EVENT_COMPX
Constant(s):
Comments:00:02 = pb_cfg_event_compa_scope_mask 03:16 = pb_cfg_event_compa_presp 17:30 = pb_cfg_event_compa_presp_mask 32:34 = pb_cfg_event_compb_scope_mask 35:48 = pb_cfg_event_compb_presp 49:62 = pb_cfg_event_compb_presp_mask 63 = spare
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG15_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:2 RWX PB_CFG_EVENT_COMPA_SCOPE_MASK_ES4: PMU event compare A - scope_mask
3:16 RWX PB_CFG_EVENT_COMPA_PRESP_ES4: PMU event compare A - presp
17:30 RWX PB_CFG_EVENT_COMPA_PRESP_MASK_ES4: PMU event compare A - presp_mask
31 RW
32:34 RWX PB_CFG_EVENT_COMPB_SCOPE_MASK_ES4: PMU event compare B - scope_mask
35:48 RWX PB_CFG_EVENT_COMPB_PRESP_ES4: PMU event compare B - presp
49:62 RWX PB_CFG_EVENT_COMPB_PRESP_MASK_ES4: PMU event compare B - presp_mask
63 RW PB_CFG_EVENT_COMPAB_LPC_D_MODE_ES4: PMU event compare B - cresp_polarity

PowerBus PB RaceTrack Station PM Control Register
Addr: 00000000030113DE (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_PM_CONTROL
Constant(s):
Comments:00:07 pb_cfg_spare1 08 pb_cfg_ex0_hbus_disable 09 pb_cfg_ex1_hbus_disable 10 pb_cfg_ex2_hbus_disable 11 pb_cfg_ex3_hbus_disable 20:63 pb_cfg_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PB.PB_COM.PB_SCOM_ES4.REG16_DATA_Q_0_INST.LATC.L2(0:11) [000000000000]
20:63PB.PB_COM.PB_SCOM_ES4.REG16_DATA_Q_0_INST.LATC.L2(20:63) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX pb_cfg_spare1
8 RWX pb_cfg_ex0_hbus_disable
9 RWX pb_cfg_ex1_hbus_disable
10 RWX pb_cfg_ex2_hbus_disable
11 RWX pb_cfg_ex3_hbus_disable
12:19 RO constant=0b00000000
20:63 RWX pb_cfg_spare2

PowerBus PB RaceTrack Station Trace Config reg
Addr: 00000000030113DF (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_TRACE
Constant(s):
Comments:00:01 pb_cfg_trace_selsn0(0:1) 02:03 pb_cfg_trace_selsn1(0:1) 04:05 pb_cfg_trace_selsn2(0:1) 06:07 pb_cfg_trace_selsn3(0:1) 08:09 pb_cfg_trace_selcr0(0:1) 10:11 pb_cfg_trace_selcr1(0:1) 12:13 pb_cfg_trace_selcr2(0:1) 14:15 pb_cfg_trace_selcr3(0:1) 16:23 pb_cfg_trace_spare1 24:26 pb_cfg_dat_pmu_event_sel0 27:29 pb_cfg_dat_pmu_event_sel1 30 pb_cfg_dat_pmu_event_endcap_sel 31 pb_cfg_compab_fir_select 32:63 pb_cfg_trace_spare2
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REG17_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RWX pb_cfg_trace_selsn0
2:3 RWX pb_cfg_trace_selsn1
4:5 RWX pb_cfg_trace_selsn2
6:7 RWX pb_cfg_trace_selsn3
8:9 RWX pb_cfg_trace_selcr0
10:11 RWX pb_cfg_trace_selcr1
12:13 RWX pb_cfg_trace_selcr2
14:15 RWX pb_cfg_trace_selcr3
16:23 RWX pb_cfg_trace_spare1
24:26 RWX PB_CFG_DAT_PMU_EVENT_SEL0_ES4: Data Event Select0
27:29 RWX PB_CFG_DAT_PMU_EVENT_SEL1_ES4: Data Event Select1
30 RWX PB_CFG_DAT_PMU_EVENT_ENDCAP_SEL_ES4: Data Event Endcap. 0=EN, 1=ES.
31 RWX PB_CFG_COMPAB_FIR_SELECT_ES4: Select cresp event compare AB result as FIR input.
32:63 RWX pb_cfg_trace_spare2

PowerBus PB RaceTrack Station GP CMD RATE reg
Addr: 00000000030113EA (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_GP_CMD_RATE
Constant(s):
Comments:00:07 = pb_gp_cmd_rate_lvl0 08:15 = pb_gp_cmd_rate_lvl1 16:23 = pb_gp_cmd_rate_lvl2 24:31 = pb_gp_cmd_rate_lvl3 32:39 = pb_gp_cmd_rate_lvl4 40:47 = pb_gp_cmd_rate_lvl5 48:55 = pb_gp_cmd_rate_lvl6 56:63 = pb_gp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REGK_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_GP_CMD_RATE_LVL0_ES4: configures the command rate for group pump level 0
8:15 RWX PB_CFG_GP_CMD_RATE_LVL1_ES4: configures the command rate for group pump level 1
16:23 RWX PB_CFG_GP_CMD_RATE_LVL2_ES4: configures the command rate for group pump level 2
24:31 RWX PB_CFG_GP_CMD_RATE_LVL3_ES4: configures the command rate for group pump level 3
32:39 RWX PB_CFG_GP_CMD_RATE_LVL4_ES4: configures the command rate for group pump level 4
40:47 RWX PB_CFG_GP_CMD_RATE_LVL5_ES4: configures the command rate for group pump level 5
48:55 RWX PB_CFG_GP_CMD_RATE_LVL6_ES4: configures the command rate for group pump level 6
56:63 RWX PB_CFG_GP_CMD_RATE_LVL7_ES4: configures the command rate for group pump level 7

PowerBus PB RaceTrack Station SP CMD RATE reg
Addr: 00000000030113EB (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_SP_CMD_RATE
Constant(s):
Comments:00:07 = pb_sp_cmd_rate_lvl0 08:15 = pb_sp_cmd_rate_lvl1 16:23 = pb_sp_cmd_rate_lvl2 24:31 = pb_sp_cmd_rate_lvl3 32:39 = pb_sp_cmd_rate_lvl4 40:47 = pb_sp_cmd_rate_lvl5 48:55 = pb_sp_cmd_rate_lvl6 56:63 = pb_sp_cmd_rate_lvl7
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB.PB_COM.PB_SCOM_ES4.REGL_DATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX PB_CFG_SP_CMD_RATE_LVL0_ES4: configures the command rate for system pump level 0
8:15 RWX PB_CFG_SP_CMD_RATE_LVL1_ES4: configures the command rate for system pump level 1
16:23 RWX PB_CFG_SP_CMD_RATE_LVL2_ES4: configures the command rate for system pump level 2
24:31 RWX PB_CFG_SP_CMD_RATE_LVL3_ES4: configures the command rate for system pump level 3
32:39 RWX PB_CFG_SP_CMD_RATE_LVL4_ES4: configures the command rate for system pump level 4
40:47 RWX PB_CFG_SP_CMD_RATE_LVL5_ES4: configures the command rate for system pump level 5
48:55 RWX PB_CFG_SP_CMD_RATE_LVL6_ES4: configures the command rate for system pump level 6
56:63 RWX PB_CFG_SP_CMD_RATE_LVL7_ES4: configures the command rate for system pump level 7

PowerBus PB RaceTrack Station CR ERROR reg
Addr: 00000000030113EC (SCOM)
Name:PB.PB_COM.PB_SCOM_ES4.PB_STATION_CR_ERROR
Constant(s):
Comments:00 = pb_cresp_error 01 = pb_cresp_addr_error 02 = pb_cfg_cresp_error_other 03:09 = pb_cfg_cresp_ttype 10:17 = pb_cfg_cresp_tsize 18:37 = pb_cfg_cresp_ttag 38:40 = pb_cfg_cresp_scope 41:45 = pb_cfg_cresp 46:59 = pb_cfg_presp
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:59PB.PB_COM.PB_SCOM_ES4.PB_EVENT.ERROR_CAPTURE_Q_0_INST.LATC.L2(0:59) [000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX pb_cresp_error
1 ROX pb_cresp_addr_error
2 ROX pb_cfg_cresp_error_other
3:9 ROX pb_cfg_cresp_ttype
10:17 ROX pb_cfg_cresp_tsize
18:37 ROX pb_cfg_cresp_ttag
38:40 ROX pb_cfg_cresp_scope
41:45 ROX pb_cfg_cresp
46:59 ROX pb_cfg_presp
60:63 RO constant=0b0000

PCI PBCQ Hardware Configuration Register
Addr: 0000000003011800 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PBCQHWCFG_REG
Constant(s):
Comments:PCI PBCQ Hardware Configuration Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PE0.PB.PBCQ.PEPBREGS.PBCQHWCFG_LAT.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RW HANG_POLL_SCALE: How many hang polls that need to be detected to indicate a hang poll to the logic
4:7 RW HANG_DATA_SCALE: How many data polls that need to be detected to indicate a data poll to the logic
8:11 RW HANG_PE_SCALE: How many data polls that need to be detected to indicate a pe poll to the logic - a pe poll is created by the pci unit to detect hangs of SMs while waiting on exchanges with the pci logic
12 RW PE_DISABLE_SEQ_MODE: Disable mmio seq mode
13 RW DISABLE_RCMD_CLKGATE: Chicken switch to turn off the clockgating which occurs on rcmd when command isn't for pe
14 RW PE_HANG_SM_ON_ARE: Controls PowerBus master state machines when an ARE is received
15 RW PE_DISABLE_PCI_CLK_CHECK: Disables the logic that checks valid PCI clocks (FIR bit 15)
16 RW LFSR_ARB_MODE: 1=use lfsr in outbound arbitration
17 RW PE_ENABLE_DMAR_IOPACING: Allow IO Pacing scheme for DMA read operations
18 RW PE_ENABLE_DMAW_IOPACING: Allow IO Pacing scheme for DMA write operations
19 RW PE_ADR_BAR_MODE: Address Mode Register for PE unit
20 RW PE_STQ_ALLOCATION: queue allocation between stores and p2p: 0 - stq_1_reserved for each type, the rest floating 1 - stq_1_only. only 1 queue used for all traffic. remaing 7 unused
21 RW DISABLE_LPC_CMDS: disable lpc ack for commands that the pe doesn't service
22 RW PE_DISABLE_OOO_MODE: pe order ooo type ci stores like a normal ci store command
23:26 RW PE_OSMB_EARLY_START: Determines how much overlap of reading/writing the osmb allows:
0b0000 = Most conservative, full packet written in before signaling PCI side
0b0001 = Most conservative, full packet written in before signaling PCI side
0b0010 = Start 2 writes from the end of the packet
0b0011 = Start 3 writes from the end of the packet
0b0100 = Start 4 writes from the end of the packet
0b0101 = Start 5 writes from the end of the packet
0b0110 = Start 6 writes from the end of the packet
0b0111 = Start 7 writes from the end of the packet
0b1000 = Most Aggressive, Start 8 writes from the end of the packet, before any data written
0b1111 = Extra Aggressive, Start before any data written(ie when command is written

Dial enums:
STARTWHENFULL0=>0b0000
STARTWHENFULL1=>0b0001
STARTWHENTWOLEFT=>0b0010
STARTWHENTHREELEFT=>0b0011
STARTWHENFOURLEFT=>0b0100
STARTWHENFIVELEFT=>0b0101
STARTWHENSIXLEFT=>0b0110
STARTWHENSEVENLEFT=>0b0111
STARTWHENEIGHTLEFT=>0b1000
STARTIMMEDIATELY=>0b1111
27:28 RW PE_QFIFO_HOLD_MODE: Determines how much overlap of reading/writing the osmb allows:
0b00 = Stop sending outbound commands when QFIFO is full(default)
0b01 = Stop sending outbound commands when QFIFO has 1 entry empty
0b10 = Stop sending outbound commands when QFIFO has 3 entry empty
0b11 = Ignore QFIFO count when sending outbound packets

Dial enums:
HOLDWHENFULL=>0b00
HOLDWHEN1OPEN=>0b01
HOLDWHEN3OPEN=>0b10
DISABLE=>0b11
29 RW reserved1
Dial enums:
HOLDWHENFULL=>0b00
HOLDWHEN1OPEN=>0b01
HOLDWHEN3OPEN=>0b10
DISABLE=>0b11
30 RW PE_DISABLE_P2P_RD: Disable the conversion of inbound dma read commands with address(13:14)="11" to mmio commands for p2p reads
31 RW reserved4
32 RW PE_WR_STRICT_ORDER_MODE: Strictly order inbound write commands, Independent of Node ID
33 RW PE_CHANNEL_STREAMING_EN: Enable PowerBus Channel streaming operations
34:35 RW PE_WR_CACHE_INJECT_MODE: Mode Bits for controlling PowerBus Cache Inject:
DisableCacheInj(00) : Disable all cache Injections(debug only)
LegacyCacheInj(01) : Cache inject after a addr_hpc_ack combined response
TLPHintCacheInj(10) : Start with cache inject if TLP hints indicate Cache Inject(TLP Hints non-zero)
P9ModetCacheInj(11) : Start with cache inject unconditionally

Dial enums:
DISABLECACHEINJ=>0b00
RESERVED_01=>0b01
RESERVED_10=>0b10
ENABLECACHEINJ=>0b11
36 RW PE_DISABLE_P2P_FORCE_DMA: Disable the forcing of of p2p writes starting as dma writes
37 RW PE_DISABLE_INJ_ON_RESEND: Controls cache inject on resends when other cache inject modes are disabled
38 RW PE_FORCE_DISABLED_CTAG_TO_FOLLOW_FLOW: When CTAGs are disable, forces DMA writes to still use flows for non-ordering reasons
39 RW PE_ENABLE_ENH_FLOW: Controls cache inject on resends when other cache inject modes are disabled
40 RW reserved2
41 RW PE_DISABLE_WR_VG: Force all dma write requests to system scope when they progress to Vg scope
42 RW PE_DISABLE_WR_SCOPE_GROUP: Disable Group scope on dma writw requests
43 RW PE_DISABLE_INTWR_VG: Force all int write requests to system scope when they progress to Vg scope
44 RW PE_DISABLE_INTWR_SCOPE_GROUP: Disable Group scope on int write requests
45 RW PE_DISABLE_INTWR_SCOPE_NODE: Disable node scope on int write requests
46:48 RW PE_INJECT_THRESHOLD_DEC_RATE: Decrement rate for injection threshold:
111 = 64 cycles
011 = 32 cycles
001 = 16 cycles
000 = off

Dial enums:
64_CYCLES=>0b111
32_CYCLES=>0b011
16_CYCLES=>0b001
DISABLE=>0b000
49 RW rd_wr_ordering
Dial enums:
64_CYCLES=>0b111
32_CYCLES=>0b011
16_CYCLES=>0b001
DISABLE=>0b000
50 RW PE_DISABLE_RD_SCOPE_NODAL: Disable nodal scope on non-TCE dma read requests
51 RW PE_DISABLE_RD_SCOPE_GROUP: Disable Group scope on non-TCE dma read requests
52 RW PE_DISABLE_RD_SCOPE_RNNN: Disable RN and Nn scopes on non-TCE dma read requests
53 RW PE_ENABLE_RD_SKIP_GROUP: Skip Grouop scope on non-TCE dma read requests
54 RW PE_DISABLE_RD_VG: Use Vg(sys) when at Vg scope
55 RW PE_DISABLE_TCE_SCOPE_NODAL: Disable nodal scope on non-TCE dma read requests
56 RW PE_DISABLE_TCE_SCOPE_GROUP: Disable Group scope on non-TCE dma read requests
57 RW PE_DISABLE_TCE_SCOPE_RNNN: Disable RnNn scopes on non-TCE dma read requests
58 RW PE_ENABLE_TCE_SKIP_GROUP: Skip Grouop scope on TCE dma read requests
59 RW PE_DISABLE_TCE_VG: Use Vg(sys) when at Vg scope
60 RW PE_DISABLE_TCE_ARBITRATION: Disable preferential TCE read request arbitration
61 RW PE_DISABLE_CQ_TCE_ARBITRATION: Disable preferential TCE read response arbitration
62 RW PE_DISABLE_MC_PREFETCH: Disable setting PADE bits in cl_rd_nc requests
63 RW PE_IGNORE_SFSTAT: Controls DMA read state machine behavior when receiving SFSTAT

Drop Priority Control Register
Addr: 0000000003011801 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.DRPPRICTL_REG
Constant(s):
Comments:Drop Priority Control Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:25PE0.PB.PBCQ.PEPBREGS.DRPPRICTL_LAT.LATC.L2(0:25) [00000000000000000000000000]
Bit(s)SCOM Dial: Description
0:5 RW PE_DROPPRIORITYMASK: Mask Value to determine when a rty_drp will cause :
The priority to increment on the next request (enable_IO_cmd_pacing = 0) OR
DropPaceCounter will be incremented based dep(enable_IO_cmd_pacing = 1)
When LSFR bits match mask Drop Priority 1 of these 2 actions will be taken(DMA write commands only)
6 RW PE_ENABLE_CTAG_DROP_PRIORITY: Allow commands in a ctag stream to take the priority of previous rty_drp commands in the stream.
If not set each commands priority is sent independently.
7 RW PE_ENABLE_IO_CMD_PACING: When a rty_drop cresp is received, keep drop priority constant,
and lower command rate, until Pacing count reached. Pacing counter is incremented instead
When not set, drop priority is raised when DropPriorityMask = LSFR value
8:16 RW PE_DROPPACECOUNT: Value to use when determining if Drop Priority should be increase when IO command pacing is enabled.
When the drop priority counter reaches this value, the drop priority is increased(enable_IO_cmd_pacing = 1)
Not used when enable_IO_cmd_pacing = 0
17:22 RW PE_DROPPACEINC: Value to use when determining how much Drop Pace Count should increase when a retry drop cresp occurs.
Not used when enable_IO_cmd_pacing = 0
23:25 RW PE_RTYDROPDIVIDER: Value used to divide down rty_drp combined responses before invoking Drop Priority.
000/001: 1st Retry Drop Combined response will invoke drop priority mechanism
010: 2nd Retry Drop Combined response will invoke drop priority mechanism
011: 3rd Retry Drop Combined response will invoke drop priority mechanism
100: 4th Retry Drop Combined response will invoke drop priority mechanism
101: 5th Retry Drop Combined response will invoke drop priority mechanism
110: 6th Retry Drop Combined response will invoke drop priority mechanism
111: 7th Retry Drop Combined response will invoke drop priority mechanism

Dial enums:
ONE_00=>0b000
ONE=>0b001
TWO=>0b010
THREE=>0b011
FOUR=>0b100
FIVE=>0b101
SIX=>0b110
SEVEN=>0b111
26:63 RO constant=0b00000000000000000000000000000000000000
Dial enums:
ONE_00=>0b000
ONE=>0b001
TWO=>0b010
THREE=>0b011
FOUR=>0b100
FIVE=>0b101
SIX=>0b110
SEVEN=>0b111

PBCQ Error Inject Control Register
Addr: 0000000003011802 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PBCQEINJ_REG
Constant(s):
Comments:PBCQ Error Inject Control Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11PE0.PB.PBCQ.PEPBREGS.PBCQEINJ_LAT.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0:1 RW PE_INJECT_TYPE: Determines the type of ecc error injected:
01 : Correctable Error / Parity Error
10: Uncorrectable Error
11: Special Uncorrectable Error

Dial enums:
CORRECTABLE_ERROR_PARITY_ERROR=>0b01
UNCORRECTABLE_ERROR=>0b10
SPECIAL_UNCORRECTABLE_ERROR=>0b11
2 RW PE_CQ_ECC_INJECT_ENABLE: Enable ecc inject on cq arrays
3:6 RW PE_CQ_SRAM_ARRAY: Determines which cq sram array to force the ECC Error into:
0000: CI Store 00:63
0001: CI Store 64:127
0010: DMA Read 00:63
0011: DMA Read 64:127
1000: DMA Write 00:63
1001: DMA Write 64:127
1010: CI Load 00:63
1011: CI Load 64:127

Dial enums:
CI_STORE_00_63=>0b0000
CI_STORE_64_127=>0b0001
DMA_READ_00_63=>0b0010
DMA_READ_64_127=>0b0011
DMA_WRITE_00_63=>0b1000
DMA_WRITE_64_127=>0b1001
CI_LOAD_00_63=>0b1010
CI_LOAD_64_127=>0b1011
OSMB_DATA=>0b1111
7 RW PE_CQ_PAR_INJECT_ENABLE: Enable parity inject on cq arrays
8:10 RW PE_CQ_REGISTER_ARRAY: Determines which cq sram array to force the ECC Error into:
000: PBCQ Array
001: TTAG
010: RTAG
011: Outbound SMB
100: CQPB DMAR
101: CQPB DMAW
110 - 111: Reserved

Dial enums:
PBCQ_ARRAY=>0b000
TTAG=>0b001
RTAG=>0b010
OUTBOUND_SMB=>0b011
CQPB_DMAR=>0b100
CQPB_DMAW=>0b101
11 RW PE_CONSTANT_EINJ: 1=constant error inject, 0=one hot error inject
12:63 RO constant=0b0000000000000000000000000000000000000000000000000000

PCI Nest Clock Trace Control Register
Addr: 0000000003011803 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.NESTTRC_REG
Constant(s):
Comments:PCI Nest Clock Trace Control Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:16PE0.PB.PBCQ.PEPBREGS.NESTTRC_LAT.LATC.L2(0:16) [00000000000000000]
Bit(s)SCOM Dial: Description
0:3 RW trace_mux_sel_a
4:7 RW trace_mux_sel_b
8:11 RW trace_mux_sel_c
12:15 RW trace_mux_sel_d
16 RW PE_TRACE_ENABLE: Enable trace of pec
17:63 RO constant=0b00000000000000000000000000000000000000000000000

PBCQ Performance Monitor Control Register
Addr: 0000000003011804 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PMONCTL_REG
Constant(s):
Comments:PBCQ Performance Monitor Control Registerr
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:37PE0.PB.PBCQ.PEPBREGS.PMONCTL_LAT.LATC.L2(0:37) [00000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:15 RW PE_PMON_EN: Enable pmon outputs per bit
16 RW reserved
17 RW PE_PMON_ALL_ENGINES: 1- Monitor conditions across all engines of stack selected, 0- Monitor conditions on dedicated engine of each stack
18:19 RW PE_PMON_STK: 00: Monitor stack 0
01: Montior stack 1
10: Monitor stack 2
11: Montiro all stacks

Dial enums:
STACK0=>0b00
STACK1=>0b01
STACK2=>0b10
ALL_STACKS=>0b11
20:21 RW PE_PMON_RD_TYPE: 11: DMA Read Events count TCE or DMA Read Requests
01: DMA Read Events count only TCE requests
10: DMA Read Events count only DMA Read requests
00: Reserved –

Dial enums:
TCE_OR_DMAREAD=>0b11
ONLY_TCE=>0b01
ONLY_DMAREAD=>0b10
22:25 RW PE_PMON_MUX_BYTE0: Choose group of pmon mux 0
26:29 RW PE_PMON_MUX_BYTE1: Choose group of pmon mux 1
30:33 RW PE_PMON_MUX_BYTE2: Choose group of pmon mux 1
34:37 RW PE_PMON_MUX_BYTE3: Choose group of pmon mux 1
38:58 RO constant=0b000000000000000000000

PBCQ PowerBus Address Extension Mask Register
Addr: 0000000003011805 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.ADDREXTMASK_REG
Constant(s):
Comments:PBCQ PowerBus Address Extension Mask Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:6PE0.PB.PBCQ.PEPBREGS.ADDREXTMASK_LAT.LATC.L2(0:6) [0000000]
Bit(s)SCOM Dial: Description
0:6 RW PE_ADDREXTMASK: PowerBus Address Extensiont Mask
7:63 RO constant=0b000000000000000000000000000000000000000000000000000000000

PBCQ Predictive vector timeout mask register
Addr: 0000000003011806 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PREDV_REG
Constant(s):
Comments:Predictive vector timeout mask register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PE0.PB.PBCQ.PEPBREGS.PREDV_LAT.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0:7 RW PE_RD_PREDV_TIMEOUT_MASK: predictive target timeout for reads
8:15 RW PE_WR_PREDV_TIMEOUT_MASK: predictive target timeout for writes
16:63 RO constant=0b000000000000000000000000000000000000000000000000

PE NMMU Control Regsister
Addr: 0000000003011807 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.NMMU_RTAG_OVERRIDE_REG
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.CAPP_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW PE_NMMU_EN: Enable NMMU operation
1 RW PE_NMMU_INBOUND_OVERRIDE_EN: Override default inbound RTAG field with bits 03:19
2 RW PE_NMMU_OUTBOUND_OVERRIDE_EN: Override default outbound RTAG field with bits 23:39
3:19 RW PE_NMMU_CHECKOUT_BASE_RTAG: Base RTAG (bits 0:16) of RTAG of checkout request to NMMU
20:22 RW reserved_nmmu1
23:39 RW PE_NMMU_RESPONSE_BASE_RTAG: Base RTAG (bits 0:16) of RTAG of response from NMMU

PE Nest Read Stack Override Register
Addr: 0000000003011808 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.NRDSTKOVR_REG
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:48PE0.PB.PBCQ.PEPBREGS.RDSTKOVR_LAT.LATC.L2(0:48) [0000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RW NRDSTKOVR_STK0:
32:47 RW NRDSTKOVR_STK1:
48 RW NRDSTKOVR_ENABLE:
49:63 RO constant=0b000000000000000

PE Nest Write Stack Override Register
Addr: 0000000003011809 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.NWRSTKOVR_REG
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:24PE0.PB.PBCQ.PEPBREGS.WRSTKOVR_LAT.LATC.L2(0:24) [0000000000000000000000000]
Bit(s)SCOM Dial: Description
0:15 RW NWRSTKOVR_STK0:
16:23 RW NWRSTKOVR_STK1:
24 RW NWRSTKOVR_ENABLE:
25:63 RO constant=0b000000000000000000000000000000000000000

PE Nest Store Stack Override Register
Addr: 000000000301180A (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.NSTQSTKOVR_REG
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:24PE0.PB.PBCQ.PEPBREGS.STQSTKOVR_LAT.LATC.L2(0:24) [0000000000000000000000000]
Bit(s)SCOM Dial: Description
0:15 RW NSTQSTKOVR_STK0:
16:23 RW NSTQSTKOVR_STK1:
24 RW NSTQSTKOVR_ENABLE:
25:63 RO constant=0b000000000000000000000000000000000000000

Configuration register for the master retry backoff mechanism
Addr: 000000000301180B (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PERTYBOCTL_REG
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:41PE0.PB.PBCQ.PEPBREGS.RTYBOCTL_LAT.LATC.L2(0:41) [000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW GRP_NOTJUSTOWN_DIS: Disable counting of all retries at group scope on the PB
1 RW GRP_DYN_ADJ_DIS: Disable dynamic adjustment of thresholds
2 RW GRP_DYN_LVL_ADJ_DIS: Disable dynamic adjustment of backoff level
3 RW GRP_RTY_CNTR_DIV2_EN: Enable division of 2 of the retry counter at the end of the sample window, as opposed to resetting the counter
4:7 RW GRP_MAX_LVL_CNT_QUAL: Sets the highest backoff level allowed; if set to 0x0, master retry backoff is disabled (default 0111)
8:13 RW GRP_CNT_THRESHHLD1_QUAL: Retry count threshold 1; below this threshold, the backoff level will decrement (default 000011)
14:19 RW GRP_CNT_THRESHHLD2_QUAL: Retry count threshold 2; above this threshold, the backoff level will increment (default 001111)
20 RW GRP_MSTR_RTY_BACKOFF_EN: Enable master retry backoff for group scope retries
21 RW SYS_NOTJUSTOWN_DIS: Disable counting of all retries at group scope on the PB
22 RW SYS_DYN_ADJ_DIS: Disable dynamic adjustment of thresholds
23 RW SYS_DYN_LVL_ADJ_DIS: Disable dynamic adjustment of backoff level
24 RW SYS_RTY_CNTR_DIV2_EN: Enable division of 2 of the retry counter at the end of the sample window, as opposed to resetting the counter
25:28 RW SYS_MAX_LVL_CNT_QUAL: Sets the highest backoff level allowed; if set to 0x0, master retry backoff is disabled (default 0111)
29:34 RW SYS_CNT_THRESHHLD1_QUAL: Retry count threshold 1; below this threshold, the backoff level will decrement (default 000011)
35:40 RW SYS_CNT_THRESHHLD2_QUAL: Retry count threshold 2; above this threshold, the backoff level will increment (default 001111)
41 RW SYS_MSTR_RTY_BACKOFF_EN: Enable master retry backoff for group scope retries
42:63 RO constant=0b0000000000000000000000

Topology Table entries 0-7
Addr: 000000000301180C (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PE_TOPOLOGY_REG0
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.GEN_TOPOLOGY_LAT#0.TOPOLOGY_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_TOPOLOGY_ID_REG0: Topology IDs 0-7
40:63 RO constant=0b000000000000000000000000

Topology Table entries 0-7
Addr: 000000000301180D (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PE_TOPOLOGY_REG1
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.GEN_TOPOLOGY_LAT#1.TOPOLOGY_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_TOPOLOGY_ID_REG1: Topology IDs 8-15
40:63 RO constant=0b000000000000000000000000

Topology Table entries 0-7
Addr: 000000000301180E (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PE_TOPOLOGY_REG2
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.GEN_TOPOLOGY_LAT#2.TOPOLOGY_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_TOPOLOGY_ID_REG2: Topology IDs 16-23
40:63 RO constant=0b000000000000000000000000

Topology Table entries 0-7
Addr: 000000000301180F (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PE_TOPOLOGY_REG3
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.GEN_TOPOLOGY_LAT#3.TOPOLOGY_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_TOPOLOGY_ID_REG3: Topology IDs 24-31
40:63 RO constant=0b000000000000000000000000

Cache Injection Threshold Register
Addr: 0000000003011810 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PE_INJECT_THRESHOLD_REG
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:63PE0.PB.PBCQ.PEPBREGS.INJTHRESH_LAT.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW PE_INJECT_THRESHOLD_ENABLE: Injection Threshold Enable
1 RW PE_INJECT_THRESHOLD_TYPE: Injection Threshold Type: 0=downgrade or stall, 1=hysteresis based
2 RW PE_INJECT_THRESHOLD_DISABLE_SCOPE: Injection Threshold Disable Scope (use 1 set of thresholds for all scopes)
3:5 RW reserved_03_05
6:7 RW PE_INJECT_THRESHOLD_VALUE: Injection Threshold Value
8:9 RW PE_INJECT_THRESHOLD_MAX_OUTSTANDING_COUNT: Injection Threshold max_outstanding_count
10:11 RW PE_INJECT_THRESHOLD_MAX_CRESP_ATAG_VALUE: Injection Threshold max_cresp_atag_value
12:13 RW PE_INJECT_THRESHOLD_CRESP_ATAG_DELTA_VALUE: Injection Threshold cresp_atag_delta_value
14:23 RW PE_INJECT_THRESHOLD_SAMPLE_RANGE_COUNT: Injection Threshold sample_range_count
24:27 RW PE_INJECT_THRESHOLD_GROUP_RATE_CHANGE_DELTA: Injection Threshold group_rate_change_delta
28:31 RW PE_INJECT_THRESHOLD_SYSTEM_RATE_CHANGE_DELTA: Injection Threshold system_rate_change_delta
32:39 RW PE_INJECT_THRESHOLD_GROUP_DECREMENT_RATE: Injection Threshold group_decrement_rate
40:47 RW PE_INJECT_THRESHOLD_GROUP_MINIMUM_DECREMENT_RATE: Injection Threshold group_minimum_decrement_rate
48:55 RW PE_INJECT_THRESHOLD_SYSTEM_DECREMENT_RATE: Injection Threshold system_decrement_rate
56:63 RW PE_INJECT_THRESHOLD_SYSTEM_MINIMUM_DECREMENT_RATE: Injection Threshold system_minimum_decrement_rate

Write Pacing Control Register
Addr: 0000000003011811 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.PE_WRITE_PACING_REG
Constant(s):
Comments:
SelectedAttributes:Secure=true
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.WPACING_LAT.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 RW PE_WRITE_PACING_MODE: 0b00 = disable Write Pacing
0b01 = enable static Write Pacing
0b11 = enable dynamic Write Pacing

Dial enums:
DISABLE_WPACING=>0b00
INJECT_ONLY_WPACING=>0b01
DMA_ONLY_WPACING=>0b10
INJECT_AND_DMA_WPACING=>0b11
2 RW PE_WRITE_PACING_DISABLE_SCOPE: Write Pacing Disable Scope (use 1 set of thresholds for all scopes)
3 RW reserved_03
4:7 RW PE_WRITE_PACING_GROUP_MIN_CYCLES: Write Pacing minimum cycles between group scope commands
8:11 RW PE_WRITE_PACING_GROUP_MAX_CYCLES: Write Pacing maximum cycles between group scope commands
12:15 RW PE_WRITE_PACING_SYSTEM_MIN_CYCLES: Write Pacing minimum cycles between system scope commands
16:19 RW PE_WRITE_PACING_SYSTEM_MAX_CYCLES: Write Pacing maximum cycles between system scope commands
20:23 RW PE_WRITE_PACING_NUM_OF_CLEAN_RANGES: Write Pacing number of clean ranges such that pacing can be sped up
24:27 RW PE_WRITE_PACING_NUM_OF_HPCACK: Write Pacing number of hpcack seen in a range to slow the pacing

PCI Nest FIR Register
Addr: 0000000003011840 (SCOM)
0000000003011841 (SCOM1)
0000000003011842 (SCOM2)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIR_REG
Constant(s):
Comments:PCI Nest FIR Register
0 = bar_pe : One of the BARS or BAR Masks register parity error
1 = nonbar_pe : Any Non Bar register parity error
2 = PB_to_PEC_ce : ECC Correctable error off of outbound PowerBus
3 = PB_to_PEC_ue : ECC Uncorrectable error off of outbound PowerBus
4 = PB_to_PEC_sue : ECC Special Uncorrectable error off of outbound PowerBus
5 = ary_ecc_ce : ECC Correctable error on an internal array
6 = ary_ecc_ue : ECC Uncorrectable error on an internal array
7 = ary_ecc_sue : ECC Special Uncorrectable error on an internal array
8 = register_array_pe : Parity error on an internal register file
9 = pb_interface_pe : Parity Error on PB interface(Address/ATag/TTag/RTAG)
10 = pb_data_hang_errors : Any PowerBus data hang poll error(Only checked for CI Stores)
11 = pb_hang_errors : Any PowerBus command hang error
12 = rd_are_errors : PowerBus ARE detected by DMA read or Atomic engines
13 = nonrd_are_errors : PowerBus ARE detected by DMA write or Interrupt engines
14 = pci_hang_error : PBCQ detected that PHB transaction didnt make forward progress
15 = pci_clock_error : PBCQ has detected that the PCI domain clock has stopped
16 = AIB_Fence : The PHB had a severe error and has fenced the AIB
17 = hw_errors : Any misc hardware error
18 = UnsolicitiedPBData : PEC received data with an RTAG matching a Queue that was not expecting data, or too much data was received.
19 = UnExpectedCResp : PEC received an unexpected Combined Response
20 = InvalidCResp : PEC received an Invalid Combined Response
21 = PBUnsupportedSize : PEC Receive a CI Command that matches one of our Bars but is an unsupported size or address alignment
22 = PBUnsupportedCmd : PEC Receive a CI Command that matches one of our Bars but is an unsupported Ttype.
23 = rsvd0 : Reserved and unused
24 = rsvd1 : Reserved and unused
25 = rsvd2 : Reserved and unused
26 = software_defined : Software Defined (tradittionaly used for software forced freeze)
27 = pec_scom_error : Error bit from PEC SCOM registers, Nest domain
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:27 RWX WOX_AND WOX_OR NFIRNFIR: PCI Nest FIR NFIR
28:63 RO n/a n/a constant=0b000000000000000000000000000000000000

PCI Nest FIR Mask Register
Addr: 0000000003011843 (SCOM)
0000000003011844 (SCOM1)
0000000003011845 (SCOM2)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRMASK_REG
Constant(s):
Comments:PCI Nest FIR Mask Register
0 = No Mask
1 = Mask Error
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:27 RW WO_AND WO_OR NFIRMASK: PCI Nest FIR Mask
28:63 RO n/a n/a constant=0b000000000000000000000000000000000000

PCI Nest FIR Action0 Register
Addr: 0000000003011846 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRACTION0_REG
Constant(s):
Comments:PCI Nest FIR Action0 Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW NFIRACTION0: Action0 select for corresponding bit in FIR
(Action0,Mask) = Action Select
(0,0) = Checkstop Error
(0,1) = Recoverable Error
(1,0) = No Action
(1,1) = Freeze
28:63 RO constant=0b000000000000000000000000000000000000

PCI Nest FIR Action1 Register
Addr: 0000000003011847 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRACTION1_REG
Constant(s):
Comments:PCI Nest FIR Action1 Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW NFIRACTION1: Action1 select for corresponding bit in FIR
(Action1,Mask) = Action Select
(0,0) = Checkstop Error
(0,1) = Recoverable Error
(1,0) = No Action
(1,1) = Freeze
28:63 RO constant=0b000000000000000000000000000000000000

pci nest fir wof register
Addr: 0000000003011848 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRWOF_REG
Constant(s):
Comments:pci nest fir wof register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.WOF_LAT_YES.WOF.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RWX_WCLRREG
28:63 RO constant=0b000000000000000000000000000000000000

CERR Report Hold Register 0
Addr: 000000000301184A (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.CERR_RPT0_REG
Constant(s):
Comments:CERR Report Hold Register 0
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.GEN_STACK_ERR_RPT#0.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
16:31PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.GEN_STACK_ERR_RPT#1.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
32:47PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.GEN_STACK_ERR_RPT#2.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
48:63PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.GEN_STACK_ERR_RPT#3.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0:63 RWX_WCLEAR CERR_RPT0: First 64 error bits that feed the NFIR

CERR Report Hold Register 1
Addr: 000000000301184B (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.CERR_RPT1_REG
Constant(s):
Comments:CERR Report Hold Register 1
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.GEN_STACK_ERR_RPT#4.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
16:41PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.GEN_STACK_ERR_RPT_EXTRA#5.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:25) [00000000000000000000000000]
Bit(s)SCOM Dial: Description
0:41 RWX_WCLEAR CERR_RPT1: First 64 error bits that feed the NFIR
42:63 RO constant=0b0000000000000000000000

PBCQ General Status Register
Addr: 000000000301184C (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.CQSTAT_REG
Constant(s):
Comments:PBCQ General Status Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.CQSTAT_FRUN_LAT.LATC.L2(0:1) [00]
Bit(s)SCOM Dial: Description
0 ROX PE_INBOUND_ACTIVE: Inbound (PCIE->PB) state machines are actvie
1 ROX PE_OUTBOUND_ACTIVE: Outbound (PB->PCIE) state machines are active
2:63 RO constant=0b00000000000000000000000000000000000000000000000000000000000000

PBCQ General Status Register
Addr: 000000000301184D (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PBCQMODE_REG
Constant(s):
Comments:PBCQ General Status Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PBCQMODE_LAT.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW PE_PEER2PEER_MODDE: Enable Peer to Peer Operations
1 RW pbcqmode_unused
2 RW PE_PB_CQ_REGS_CS_ENABLE_SMF: Turn on SMF mode
3 RW PE_ATOMIC_LITTLE_ENDIAN: Atomic commands will be Little Endian
4 RW PE_RDP2P_DMA_MODE: send p2p commands as cl_rd_nc
5 RW PE_LDP2P_DMA_MODE: accept receive commands as p2p
6:7 RW
8:63 RO constant=0b00000000000000000000000000000000000000000000000000000000

PE Bus MMIO Base Address Register 0
Addr: 000000000301184E (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR0_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_BAR0: pe bus I/O Base Address Register 0
Bits 8 to 47 of the Base Address range are specified with this IDial.
Bits 8 to 47 of a snoop address are compared with this Base Address
after ANDing bits 8 to 47 of the corresponding Mask Register with each.
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR/Mask pair.
40:63 RO constant=0b000000000000000000000000

PE Bus MMIO Base Address Register 0
Addr: 000000000301184F (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR0_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR0_MASK_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_MASK0: pe bus I/O Base Address Register Mask 0
This LDial specifies the size of the address range which is specified by
this BAR/Mask pair. The range size must be a power of two. Valid range
sizes go from 64KB up to 32PB.

Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111
40:63 RO constant=0b000000000000000000000000
Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111

PE Bus MMIO Base Address Register 1
Addr: 0000000003011850 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR1_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_BAR1: pe bus I/O Base Address Register 1
Bits 8 to 47 of the Base Address range are specified with this IDial.
Bits 8 to 47 of a snoop address are compared with this Base Address
after ANDing bits 8 to 47 of the corresponding Mask Register with each.
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR/Mask pair.
40:63 RO constant=0b000000000000000000000000

PE Bus MMIO Base Address Register 1
Addr: 0000000003011851 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR1_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR1_MASK_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_MASK1: pe bus I/O Base Address Register Mask 1
This LDial specifies the size of the address range which is specified by
this BAR/Mask pair. The range size must be a power of two. Valid range
sizes go from 64KB up to 32PB.

Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111
40:63 RO constant=0b000000000000000000000000
Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111

PE Bus PHB Base Address Register
Addr: 0000000003011852 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PHBBAR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:41PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PHBBAR_LAT.LATC.L2(0:41) [000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:41 RW PE_PHB_BAR: pe bus PHB Base Address Register
Bits 8 to 49 of the Base Address range are specified with this IDial.
Bits 8 to 49 of a snoop address are compared with this Base Address
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR. This BAR is intended for PHB MMIO space which is fixed at 16K, so there is not Mask
42:63 RO constant=0b0000000000000000000000

PE Bus int Base Address Register
Addr: 0000000003011853 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.INTBAR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MSIBAR_LAT.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW PE_INT_BAR: pe bus int Base Address Register
Bits 8 to 35 of the Base Address range are specified with this IDial.
Bits 8 to 35 of a snoop address are compared with this Base Address
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR. This BAR is intended for int space which is fixed at 256M, so there is not Mask
28:63 RO constant=0b000000000000000000000000000000000000

PE BAR Enables
Addr: 0000000003011854 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.BARE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.BARE_LAT.LATC.L2(0:3) [0000]
Bit(s)SCOM Dial: Description
0 RW PE_MMIO_BAR0_EN: pe mmio Base Address Register 0 Enable
Each BAR/Mask set has 1 enable bit
1 RW PE_MMIO_BAR1_EN: pe mmio Base Address Register 1 Enable
Each BAR/Mask set has 1 enable bit
2 RW PE_PHB_BAR_EN: pe phb Base Address Register Enable
Each BAR/Mask set has 1 enable bit
3 RW PE_INT_BAR_EN: pe int Base Address Register Enable
Each BAR/Mask set has 1 enable bit
4:63 RO constant=0b000000000000000000000000000000000000000000000000000000000000

PCI Nest Data Freeze Register
Addr: 0000000003011855 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PE_DFREEZE_REG
Constant(s):
Comments:PCI Nest Data Freeze Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.DFREEZE_LAT.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW PE_DFREEZE: dfreeze select for corresponding bit in FIR
(dfreeze,Mask) = Action Select
(1) = data freeze if action0:1=b11
(0) = data freeze if action0:1=b11 and freeze occurs before data is received
28:63 RO constant=0b000000000000000000000000000000000000

PCI Sparse Page Control Register
Addr: 0000000003011856 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PE_SPARSE_PAGE_CNTL_REG
Constant(s):
Comments:PCI Sparse Page Control Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
3:5PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.SPGCTL_LAT.LATC.L2(0:2) [000]
Bit(s)SCOM Dial: Description
0:2 RO constant=0b000
3 RW PE_SPARSE_PAGE_CNTL_FV: FV - Full Cacheline Enable
4 RW PE_SPARSE_PAGE_CNTL_T3: T3 - Full Cacheline Even iTag
5 RW PE_SPARSE_PAGE_CNTL_T4: T4 - Full Cacheline Odd iTag
6:63 RO constant=0b0000000000000000000000000000000000000000000000000000000000

PCI Cache Inject Control Register
Addr: 0000000003011857 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PE_CACHE_INJECT_CNTL_REG
Constant(s):
Comments:PCI Cache Inject Control Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.INJECT_LAT.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW PE_ENABLE_PARTIAL_CACHE_INJECTION: Enable Partial Line Cache Injection
1 RW PE_ENABLE_PARTIAL_CACHE_INJECTION_ON_HINT: Enable Partial Line Cache Injection on TLP hint
2 RW PE_SET_D_BIT_ON_PARTIAL_CACHE_INJECTION: Set D-Bit on Partial Line Cache Injection
3 RW PE_STALL_PARTIAL_CACHE_INJECTION_ON_THRESHOLD: Stall Partial Line Cache Injection on Threshold
4 RW PE_ENABLE_FULL_CACHE_INJECTION: Enable Full Line Cache Injection
5 RW PE_ENABLE_FULL_CACHE_INJECTION_ON_HINT: Enable Full Line Cache Injection on TLP hint
6 RW PE_SET_D_BIT_ON_FULL_CACHE_INJECTION: Set D-Bit on Full Line Cache Injection
7 RW PE_STALL_FULL_CACHE_INJECTION_ON_THRESHOLD: Stall Full Line Cache Injection on Threshold
8:63 RO constant=0b00000000000000000000000000000000000000000000000000000000

PCI Nest FIR Register
Addr: 0000000003011880 (SCOM)
0000000003011881 (SCOM1)
0000000003011882 (SCOM2)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIR_REG
Constant(s):
Comments:PCI Nest FIR Register
0 = bar_pe : One of the BARS or BAR Masks register parity error
1 = nonbar_pe : Any Non Bar register parity error
2 = PB_to_PEC_ce : ECC Correctable error off of outbound PowerBus
3 = PB_to_PEC_ue : ECC Uncorrectable error off of outbound PowerBus
4 = PB_to_PEC_sue : ECC Special Uncorrectable error off of outbound PowerBus
5 = ary_ecc_ce : ECC Correctable error on an internal array
6 = ary_ecc_ue : ECC Uncorrectable error on an internal array
7 = ary_ecc_sue : ECC Special Uncorrectable error on an internal array
8 = register_array_pe : Parity error on an internal register file
9 = pb_interface_pe : Parity Error on PB interface(Address/ATag/TTag/RTAG)
10 = pb_data_hang_errors : Any PowerBus data hang poll error(Only checked for CI Stores)
11 = pb_hang_errors : Any PowerBus command hang error
12 = rd_are_errors : PowerBus ARE detected by DMA read or Atomic engines
13 = nonrd_are_errors : PowerBus ARE detected by DMA write or Interrupt engines
14 = pci_hang_error : PBCQ detected that PHB transaction didnt make forward progress
15 = pci_clock_error : PBCQ has detected that the PCI domain clock has stopped
16 = AIB_Fence : The PHB had a severe error and has fenced the AIB
17 = hw_errors : Any misc hardware error
18 = UnsolicitiedPBData : PEC received data with an RTAG matching a Queue that was not expecting data, or too much data was received.
19 = UnExpectedCResp : PEC received an unexpected Combined Response
20 = InvalidCResp : PEC received an Invalid Combined Response
21 = PBUnsupportedSize : PEC Receive a CI Command that matches one of our Bars but is an unsupported size or address alignment
22 = PBUnsupportedCmd : PEC Receive a CI Command that matches one of our Bars but is an unsupported Ttype.
23 = rsvd0 : Reserved and unused
24 = rsvd1 : Reserved and unused
25 = rsvd2 : Reserved and unused
26 = software_defined : Software Defined (tradittionaly used for software forced freeze)
27 = pec_scom_error : Error bit from PEC SCOM registers, Nest domain
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:27 RWX WOX_AND WOX_OR NFIRNFIR: PCI Nest FIR NFIR
28:63 RO n/a n/a constant=0b000000000000000000000000000000000000

PCI Nest FIR Mask Register
Addr: 0000000003011883 (SCOM)
0000000003011884 (SCOM1)
0000000003011885 (SCOM2)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRMASK_REG
Constant(s):
Comments:PCI Nest FIR Mask Register
0 = No Mask
1 = Mask Error
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:27 RW WO_AND WO_OR NFIRMASK: PCI Nest FIR Mask
28:63 RO n/a n/a constant=0b000000000000000000000000000000000000

PCI Nest FIR Action0 Register
Addr: 0000000003011886 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRACTION0_REG
Constant(s):
Comments:PCI Nest FIR Action0 Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW NFIRACTION0: Action0 select for corresponding bit in FIR
(Action0,Mask) = Action Select
(0,0) = Checkstop Error
(0,1) = Recoverable Error
(1,0) = No Action
(1,1) = Freeze
28:63 RO constant=0b000000000000000000000000000000000000

PCI Nest FIR Action1 Register
Addr: 0000000003011887 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRACTION1_REG
Constant(s):
Comments:PCI Nest FIR Action1 Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW NFIRACTION1: Action1 select for corresponding bit in FIR
(Action1,Mask) = Action Select
(0,0) = Checkstop Error
(0,1) = Recoverable Error
(1,0) = No Action
(1,1) = Freeze
28:63 RO constant=0b000000000000000000000000000000000000

pci nest fir wof register
Addr: 0000000003011888 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRWOF_REG
Constant(s):
Comments:pci nest fir wof register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.WOF_LAT_YES.WOF.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RWX_WCLRREG
28:63 RO constant=0b000000000000000000000000000000000000

CERR Report Hold Register 0
Addr: 000000000301188A (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.CERR_RPT0_REG
Constant(s):
Comments:CERR Report Hold Register 0
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.GEN_STACK_ERR_RPT#0.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
16:31PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.GEN_STACK_ERR_RPT#1.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
32:47PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.GEN_STACK_ERR_RPT#2.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
48:63PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.GEN_STACK_ERR_RPT#3.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0:63 RWX_WCLEAR CERR_RPT0: First 64 error bits that feed the NFIR

CERR Report Hold Register 1
Addr: 000000000301188B (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.CERR_RPT1_REG
Constant(s):
Comments:CERR Report Hold Register 1
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.GEN_STACK_ERR_RPT#4.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
16:41PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.GEN_STACK_ERR_RPT_EXTRA#5.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:25) [00000000000000000000000000]
Bit(s)SCOM Dial: Description
0:41 RWX_WCLEAR CERR_RPT1: First 64 error bits that feed the NFIR
42:63 RO constant=0b0000000000000000000000

PBCQ General Status Register
Addr: 000000000301188C (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.CQSTAT_REG
Constant(s):
Comments:PBCQ General Status Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.CQSTAT_FRUN_LAT.LATC.L2(0:1) [00]
Bit(s)SCOM Dial: Description
0 ROX PE_INBOUND_ACTIVE: Inbound (PCIE->PB) state machines are actvie
1 ROX PE_OUTBOUND_ACTIVE: Outbound (PB->PCIE) state machines are active
2:63 RO constant=0b00000000000000000000000000000000000000000000000000000000000000

PBCQ General Status Register
Addr: 000000000301188D (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PBCQMODE_REG
Constant(s):
Comments:PBCQ General Status Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PBCQMODE_LAT.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW PE_PEER2PEER_MODDE: Enable Peer to Peer Operations
1 RW pbcqmode_unused
2 RW PE_PB_CQ_REGS_CS_ENABLE_SMF: Turn on SMF mode
3 RW PE_ATOMIC_LITTLE_ENDIAN: Atomic commands will be Little Endian
4 RW PE_RDP2P_DMA_MODE: send p2p commands as cl_rd_nc
5 RW PE_LDP2P_DMA_MODE: accept receive commands as p2p
6:7 RW
8:63 RO constant=0b00000000000000000000000000000000000000000000000000000000

PE Bus MMIO Base Address Register 0
Addr: 000000000301188E (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR0_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_BAR0: pe bus I/O Base Address Register 0
Bits 8 to 47 of the Base Address range are specified with this IDial.
Bits 8 to 47 of a snoop address are compared with this Base Address
after ANDing bits 8 to 47 of the corresponding Mask Register with each.
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR/Mask pair.
40:63 RO constant=0b000000000000000000000000

PE Bus MMIO Base Address Register 0
Addr: 000000000301188F (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR0_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR0_MASK_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_MASK0: pe bus I/O Base Address Register Mask 0
This LDial specifies the size of the address range which is specified by
this BAR/Mask pair. The range size must be a power of two. Valid range
sizes go from 64KB up to 32PB.

Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111
40:63 RO constant=0b000000000000000000000000
Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111

PE Bus MMIO Base Address Register 1
Addr: 0000000003011890 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR1_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_BAR1: pe bus I/O Base Address Register 1
Bits 8 to 47 of the Base Address range are specified with this IDial.
Bits 8 to 47 of a snoop address are compared with this Base Address
after ANDing bits 8 to 47 of the corresponding Mask Register with each.
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR/Mask pair.
40:63 RO constant=0b000000000000000000000000

PE Bus MMIO Base Address Register 1
Addr: 0000000003011891 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR1_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR1_MASK_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_MASK1: pe bus I/O Base Address Register Mask 1
This LDial specifies the size of the address range which is specified by
this BAR/Mask pair. The range size must be a power of two. Valid range
sizes go from 64KB up to 32PB.

Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111
40:63 RO constant=0b000000000000000000000000
Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111

PE Bus PHB Base Address Register
Addr: 0000000003011892 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PHBBAR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:41PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PHBBAR_LAT.LATC.L2(0:41) [000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:41 RW PE_PHB_BAR: pe bus PHB Base Address Register
Bits 8 to 49 of the Base Address range are specified with this IDial.
Bits 8 to 49 of a snoop address are compared with this Base Address
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR. This BAR is intended for PHB MMIO space which is fixed at 16K, so there is not Mask
42:63 RO constant=0b0000000000000000000000

PE Bus int Base Address Register
Addr: 0000000003011893 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.INTBAR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MSIBAR_LAT.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW PE_INT_BAR: pe bus int Base Address Register
Bits 8 to 35 of the Base Address range are specified with this IDial.
Bits 8 to 35 of a snoop address are compared with this Base Address
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR. This BAR is intended for int space which is fixed at 256M, so there is not Mask
28:63 RO constant=0b000000000000000000000000000000000000

PE BAR Enables
Addr: 0000000003011894 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.BARE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.BARE_LAT.LATC.L2(0:3) [0000]
Bit(s)SCOM Dial: Description
0 RW PE_MMIO_BAR0_EN: pe mmio Base Address Register 0 Enable
Each BAR/Mask set has 1 enable bit
1 RW PE_MMIO_BAR1_EN: pe mmio Base Address Register 1 Enable
Each BAR/Mask set has 1 enable bit
2 RW PE_PHB_BAR_EN: pe phb Base Address Register Enable
Each BAR/Mask set has 1 enable bit
3 RW PE_INT_BAR_EN: pe int Base Address Register Enable
Each BAR/Mask set has 1 enable bit
4:63 RO constant=0b000000000000000000000000000000000000000000000000000000000000

PCI Nest Data Freeze Register
Addr: 0000000003011895 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PE_DFREEZE_REG
Constant(s):
Comments:PCI Nest Data Freeze Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.DFREEZE_LAT.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW PE_DFREEZE: dfreeze select for corresponding bit in FIR
(dfreeze,Mask) = Action Select
(1) = data freeze if action0:1=b11
(0) = data freeze if action0:1=b11 and freeze occurs before data is received
28:63 RO constant=0b000000000000000000000000000000000000

PCI Sparse Page Control Register
Addr: 0000000003011896 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PE_SPARSE_PAGE_CNTL_REG
Constant(s):
Comments:PCI Sparse Page Control Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
3:5PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.SPGCTL_LAT.LATC.L2(0:2) [000]
Bit(s)SCOM Dial: Description
0:2 RO constant=0b000
3 RW PE_SPARSE_PAGE_CNTL_FV: FV - Full Cacheline Enable
4 RW PE_SPARSE_PAGE_CNTL_T3: T3 - Full Cacheline Even iTag
5 RW PE_SPARSE_PAGE_CNTL_T4: T4 - Full Cacheline Odd iTag
6:63 RO constant=0b0000000000000000000000000000000000000000000000000000000000

PCI Cache Inject Control Register
Addr: 0000000003011897 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PE_CACHE_INJECT_CNTL_REG
Constant(s):
Comments:PCI Cache Inject Control Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.INJECT_LAT.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW PE_ENABLE_PARTIAL_CACHE_INJECTION: Enable Partial Line Cache Injection
1 RW PE_ENABLE_PARTIAL_CACHE_INJECTION_ON_HINT: Enable Partial Line Cache Injection on TLP hint
2 RW PE_SET_D_BIT_ON_PARTIAL_CACHE_INJECTION: Set D-Bit on Partial Line Cache Injection
3 RW PE_STALL_PARTIAL_CACHE_INJECTION_ON_THRESHOLD: Stall Partial Line Cache Injection on Threshold
4 RW PE_ENABLE_FULL_CACHE_INJECTION: Enable Full Line Cache Injection
5 RW PE_ENABLE_FULL_CACHE_INJECTION_ON_HINT: Enable Full Line Cache Injection on TLP hint
6 RW PE_SET_D_BIT_ON_FULL_CACHE_INJECTION: Set D-Bit on Full Line Cache Injection
7 RW PE_STALL_FULL_CACHE_INJECTION_ON_THRESHOLD: Stall Full Line Cache Injection on Threshold
8:63 RO constant=0b00000000000000000000000000000000000000000000000000000000

PCI Nest FIR Register
Addr: 00000000030118C0 (SCOM)
00000000030118C1 (SCOM1)
00000000030118C2 (SCOM2)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIR_REG
Constant(s):
Comments:PCI Nest FIR Register
0 = bar_pe : One of the BARS or BAR Masks register parity error
1 = nonbar_pe : Any Non Bar register parity error
2 = PB_to_PEC_ce : ECC Correctable error off of outbound PowerBus
3 = PB_to_PEC_ue : ECC Uncorrectable error off of outbound PowerBus
4 = PB_to_PEC_sue : ECC Special Uncorrectable error off of outbound PowerBus
5 = ary_ecc_ce : ECC Correctable error on an internal array
6 = ary_ecc_ue : ECC Uncorrectable error on an internal array
7 = ary_ecc_sue : ECC Special Uncorrectable error on an internal array
8 = register_array_pe : Parity error on an internal register file
9 = pb_interface_pe : Parity Error on PB interface(Address/ATag/TTag/RTAG)
10 = pb_data_hang_errors : Any PowerBus data hang poll error(Only checked for CI Stores)
11 = pb_hang_errors : Any PowerBus command hang error
12 = rd_are_errors : PowerBus ARE detected by DMA read or Atomic engines
13 = nonrd_are_errors : PowerBus ARE detected by DMA write or Interrupt engines
14 = pci_hang_error : PBCQ detected that PHB transaction didnt make forward progress
15 = pci_clock_error : PBCQ has detected that the PCI domain clock has stopped
16 = AIB_Fence : The PHB had a severe error and has fenced the AIB
17 = hw_errors : Any misc hardware error
18 = UnsolicitiedPBData : PEC received data with an RTAG matching a Queue that was not expecting data, or too much data was received.
19 = UnExpectedCResp : PEC received an unexpected Combined Response
20 = InvalidCResp : PEC received an Invalid Combined Response
21 = PBUnsupportedSize : PEC Receive a CI Command that matches one of our Bars but is an unsupported size or address alignment
22 = PBUnsupportedCmd : PEC Receive a CI Command that matches one of our Bars but is an unsupported Ttype.
23 = rsvd0 : Reserved and unused
24 = rsvd1 : Reserved and unused
25 = rsvd2 : Reserved and unused
26 = software_defined : Software Defined (tradittionaly used for software forced freeze)
27 = pec_scom_error : Error bit from PEC SCOM registers, Nest domain
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:27 RWX WOX_AND WOX_OR NFIRNFIR: PCI Nest FIR NFIR
28:63 RO n/a n/a constant=0b000000000000000000000000000000000000

PCI Nest FIR Mask Register
Addr: 00000000030118C3 (SCOM)
00000000030118C4 (SCOM1)
00000000030118C5 (SCOM2)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRMASK_REG
Constant(s):
Comments:PCI Nest FIR Mask Register
0 = No Mask
1 = Mask Error
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:27 RW WO_AND WO_OR NFIRMASK: PCI Nest FIR Mask
28:63 RO n/a n/a constant=0b000000000000000000000000000000000000

PCI Nest FIR Action0 Register
Addr: 00000000030118C6 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRACTION0_REG
Constant(s):
Comments:PCI Nest FIR Action0 Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW NFIRACTION0: Action0 select for corresponding bit in FIR
(Action0,Mask) = Action Select
(0,0) = Checkstop Error
(0,1) = Recoverable Error
(1,0) = No Action
(1,1) = Freeze
28:63 RO constant=0b000000000000000000000000000000000000

PCI Nest FIR Action1 Register
Addr: 00000000030118C7 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRACTION1_REG
Constant(s):
Comments:PCI Nest FIR Action1 Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW NFIRACTION1: Action1 select for corresponding bit in FIR
(Action1,Mask) = Action Select
(0,0) = Checkstop Error
(0,1) = Recoverable Error
(1,0) = No Action
(1,1) = Freeze
28:63 RO constant=0b000000000000000000000000000000000000

pci nest fir wof register
Addr: 00000000030118C8 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRWOF_REG
Constant(s):
Comments:pci nest fir wof register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.STACK_SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.WOF_LAT_YES.WOF.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RWX_WCLRREG
28:63 RO constant=0b000000000000000000000000000000000000

CERR Report Hold Register 0
Addr: 00000000030118CA (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.CERR_RPT0_REG
Constant(s):
Comments:CERR Report Hold Register 0
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.GEN_STACK_ERR_RPT#0.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
16:31PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.GEN_STACK_ERR_RPT#1.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
32:47PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.GEN_STACK_ERR_RPT#2.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
48:63PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.GEN_STACK_ERR_RPT#3.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0:63 RWX_WCLEAR CERR_RPT0: First 64 error bits that feed the NFIR

CERR Report Hold Register 1
Addr: 00000000030118CB (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.CERR_RPT1_REG
Constant(s):
Comments:CERR Report Hold Register 1
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.GEN_STACK_ERR_RPT#4.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:15) [0000000000000000]
16:41PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.GEN_STACK_ERR_RPT_EXTRA#5.STACK_ERR_RPT.HOLD_LATCH_INST.HOLD.LATC.L2(0:25) [00000000000000000000000000]
Bit(s)SCOM Dial: Description
0:41 RWX_WCLEAR CERR_RPT1: First 64 error bits that feed the NFIR
42:63 RO constant=0b0000000000000000000000

PBCQ General Status Register
Addr: 00000000030118CC (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.CQSTAT_REG
Constant(s):
Comments:PBCQ General Status Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.CQSTAT_FRUN_LAT.LATC.L2(0:1) [00]
Bit(s)SCOM Dial: Description
0 ROX PE_INBOUND_ACTIVE: Inbound (PCIE->PB) state machines are actvie
1 ROX PE_OUTBOUND_ACTIVE: Outbound (PB->PCIE) state machines are active
2:63 RO constant=0b00000000000000000000000000000000000000000000000000000000000000

PBCQ General Status Register
Addr: 00000000030118CD (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PBCQMODE_REG
Constant(s):
Comments:PBCQ General Status Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PBCQMODE_LAT.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW PE_PEER2PEER_MODDE: Enable Peer to Peer Operations
1 RW pbcqmode_unused
2 RW PE_PB_CQ_REGS_CS_ENABLE_SMF: Turn on SMF mode
3 RW PE_ATOMIC_LITTLE_ENDIAN: Atomic commands will be Little Endian
4 RW PE_RDP2P_DMA_MODE: send p2p commands as cl_rd_nc
5 RW PE_LDP2P_DMA_MODE: accept receive commands as p2p
6:7 RW
8:63 RO constant=0b00000000000000000000000000000000000000000000000000000000

PE Bus MMIO Base Address Register 0
Addr: 00000000030118CE (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR0_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR0_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_BAR0: pe bus I/O Base Address Register 0
Bits 8 to 47 of the Base Address range are specified with this IDial.
Bits 8 to 47 of a snoop address are compared with this Base Address
after ANDing bits 8 to 47 of the corresponding Mask Register with each.
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR/Mask pair.
40:63 RO constant=0b000000000000000000000000

PE Bus MMIO Base Address Register 0
Addr: 00000000030118CF (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR0_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR0_MASK_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_MASK0: pe bus I/O Base Address Register Mask 0
This LDial specifies the size of the address range which is specified by
this BAR/Mask pair. The range size must be a power of two. Valid range
sizes go from 64KB up to 32PB.

Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111
40:63 RO constant=0b000000000000000000000000
Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111

PE Bus MMIO Base Address Register 1
Addr: 00000000030118D0 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR1_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR1_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_BAR1: pe bus I/O Base Address Register 1
Bits 8 to 47 of the Base Address range are specified with this IDial.
Bits 8 to 47 of a snoop address are compared with this Base Address
after ANDing bits 8 to 47 of the corresponding Mask Register with each.
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR/Mask pair.
40:63 RO constant=0b000000000000000000000000

PE Bus MMIO Base Address Register 1
Addr: 00000000030118D1 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR1_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR1_MASK_LAT.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PE_MMIO_MASK1: pe bus I/O Base Address Register Mask 1
This LDial specifies the size of the address range which is specified by
this BAR/Mask pair. The range size must be a power of two. Valid range
sizes go from 64KB up to 32PB.

Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111
40:63 RO constant=0b000000000000000000000000
Dial enums:
32_PB=>0b1000000000000000000000000000000000000000
16_PB=>0b1100000000000000000000000000000000000000
8_PB=>0b1110000000000000000000000000000000000000
4_PB=>0b1111000000000000000000000000000000000000
2_PB=>0b1111100000000000000000000000000000000000
1_PB=>0b1111110000000000000000000000000000000000
512_TB=>0b1111111000000000000000000000000000000000
256_TB=>0b1111111100000000000000000000000000000000
128_TB=>0b1111111110000000000000000000000000000000
64_TB=>0b1111111111000000000000000000000000000000
32_TB=>0b1111111111100000000000000000000000000000
16_TB=>0b1111111111110000000000000000000000000000
8_TB=>0b1111111111111000000000000000000000000000
4_TB=>0b1111111111111100000000000000000000000000
2_TB=>0b1111111111111110000000000000000000000000
1_TB=>0b1111111111111111000000000000000000000000
512_GB=>0b1111111111111111100000000000000000000000
256_GB=>0b1111111111111111110000000000000000000000
128_GB=>0b1111111111111111111000000000000000000000
64_GB=>0b1111111111111111111100000000000000000000
32_GB=>0b1111111111111111111110000000000000000000
16_GB=>0b1111111111111111111111000000000000000000
8_GB=>0b1111111111111111111111100000000000000000
4_GB=>0b1111111111111111111111110000000000000000
2_GB=>0b1111111111111111111111111000000000000000
1_GB=>0b1111111111111111111111111100000000000000
512_MB=>0b1111111111111111111111111110000000000000
256_MB=>0b1111111111111111111111111111000000000000
128_MB=>0b1111111111111111111111111111100000000000
64_MB=>0b1111111111111111111111111111110000000000
32_MB=>0b1111111111111111111111111111111000000000
16_MB=>0b1111111111111111111111111111111100000000
8_MB=>0b1111111111111111111111111111111110000000
4_MB=>0b1111111111111111111111111111111111000000
2_MB=>0b1111111111111111111111111111111111100000
1_MB=>0b1111111111111111111111111111111111110000
512_KB=>0b1111111111111111111111111111111111111000
256_KB=>0b1111111111111111111111111111111111111100
128_KB=>0b1111111111111111111111111111111111111110
64_KB=>0b1111111111111111111111111111111111111111

PE Bus PHB Base Address Register
Addr: 00000000030118D2 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PHBBAR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:41PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PHBBAR_LAT.LATC.L2(0:41) [000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:41 RW PE_PHB_BAR: pe bus PHB Base Address Register
Bits 8 to 49 of the Base Address range are specified with this IDial.
Bits 8 to 49 of a snoop address are compared with this Base Address
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR. This BAR is intended for PHB MMIO space which is fixed at 16K, so there is not Mask
42:63 RO constant=0b0000000000000000000000

PE Bus int Base Address Register
Addr: 00000000030118D3 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.INTBAR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MSIBAR_LAT.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW PE_INT_BAR: pe bus int Base Address Register
Bits 8 to 35 of the Base Address range are specified with this IDial.
Bits 8 to 35 of a snoop address are compared with this Base Address
If the compare is TRUE, the snoop address falls within the address range
specified by the BAR. This BAR is intended for int space which is fixed at 256M, so there is not Mask
28:63 RO constant=0b000000000000000000000000000000000000

PE BAR Enables
Addr: 00000000030118D4 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.BARE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.BARE_LAT.LATC.L2(0:3) [0000]
Bit(s)SCOM Dial: Description
0 RW PE_MMIO_BAR0_EN: pe mmio Base Address Register 0 Enable
Each BAR/Mask set has 1 enable bit
1 RW PE_MMIO_BAR1_EN: pe mmio Base Address Register 1 Enable
Each BAR/Mask set has 1 enable bit
2 RW PE_PHB_BAR_EN: pe phb Base Address Register Enable
Each BAR/Mask set has 1 enable bit
3 RW PE_INT_BAR_EN: pe int Base Address Register Enable
Each BAR/Mask set has 1 enable bit
4:63 RO constant=0b000000000000000000000000000000000000000000000000000000000000

PCI Nest Data Freeze Register
Addr: 00000000030118D5 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PE_DFREEZE_REG
Constant(s):
Comments:PCI Nest Data Freeze Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.DFREEZE_LAT.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW PE_DFREEZE: dfreeze select for corresponding bit in FIR
(dfreeze,Mask) = Action Select
(1) = data freeze if action0:1=b11
(0) = data freeze if action0:1=b11 and freeze occurs before data is received
28:63 RO constant=0b000000000000000000000000000000000000

PCI Sparse Page Control Register
Addr: 00000000030118D6 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PE_SPARSE_PAGE_CNTL_REG
Constant(s):
Comments:PCI Sparse Page Control Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
3:5PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.SPGCTL_LAT.LATC.L2(0:2) [000]
Bit(s)SCOM Dial: Description
0:2 RO constant=0b000
3 RW PE_SPARSE_PAGE_CNTL_FV: FV - Full Cacheline Enable
4 RW PE_SPARSE_PAGE_CNTL_T3: T3 - Full Cacheline Even iTag
5 RW PE_SPARSE_PAGE_CNTL_T4: T4 - Full Cacheline Odd iTag
6:63 RO constant=0b0000000000000000000000000000000000000000000000000000000000

PCI Cache Inject Control Register
Addr: 00000000030118D7 (SCOM)
Name:PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PE_CACHE_INJECT_CNTL_REG
Constant(s):
Comments:PCI Cache Inject Control Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.INJECT_LAT.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW PE_ENABLE_PARTIAL_CACHE_INJECTION: Enable Partial Line Cache Injection
1 RW PE_ENABLE_PARTIAL_CACHE_INJECTION_ON_HINT: Enable Partial Line Cache Injection on TLP hint
2 RW PE_SET_D_BIT_ON_PARTIAL_CACHE_INJECTION: Set D-Bit on Partial Line Cache Injection
3 RW PE_STALL_PARTIAL_CACHE_INJECTION_ON_THRESHOLD: Stall Partial Line Cache Injection on Threshold
4 RW PE_ENABLE_FULL_CACHE_INJECTION: Enable Full Line Cache Injection
5 RW PE_ENABLE_FULL_CACHE_INJECTION_ON_HINT: Enable Full Line Cache Injection on TLP hint
6 RW PE_SET_D_BIT_ON_FULL_CACHE_INJECTION: Set D-Bit on Full Line Cache Injection
7 RW PE_STALL_FULL_CACHE_INJECTION_ON_THRESHOLD: Stall Full Line Cache Injection on Threshold
8:63 RO constant=0b00000000000000000000000000000000000000000000000000000000

TX and Common Control Status Register
Addr: 0000000003011C00 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.TX_CTRL_STAT_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:11TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.TXSC_Q_0_INST.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0 RW ENABLE_SCWR_TO_TXRF: OFF: Disable SCOM write to TX RF
ON: Enable SCOM write to TX RF
1 RW DISABLE_ECC_COR_GXC_PSI: OFF: Enable ECC Correction GXC PSI
ON: Disable ECC Correction GXC PSI
2 RW DISABLE_ECC_COR_TXRF_PSI: OFF: Enable ECC Correction TXRF PSI
ON: Disable ECC Correction TXRF PSI
3 RW TX_CRC_MODE: OFF: TX_CRC-16 Mode
ON: TX_CRC-32 Mode
4 RW TX_CHIP_PERSONALISATION: OFF: TX Processor Chip
ON: TX FSP-1 Chip
5 RW TX_ENABLE_STREAMING_MODE: OFF: TX Disable Streaming Mode
ON: TX Enable Streaming Mode
6 RW TX_CHIP_INTERFACEMODE: ON: Processor Chip
ON: FSP-1 Chip
7 RW DISABLE_TIMEOUT_AND_RETRY: OFF: Enable Timeout and Retry Function
ON: Disable Timeout and Retry Function
8 RW FENCE_IO_INTERFACE: OFF: no fence io interface
ON: fence io interface
9 RW FENCE_GX_INTERFACE: OFF: no fence gx interface
ON: fence gx interface
10 RW GX_ENABLE_OVERWRITE: OFF: no gx_enable_overwrite
ON: gx_enable_overwrite
11 RW txsc
12:31 RO constant=0b00000000000000000000

TX Timeout Retry Register
Addr: 0000000003011C01 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.TX_TO_RT_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.TDL_TOVAL_Q_0_INST.LATC.L2(0:3) [0000]
4:7TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.TDL_TRVAL_Q_0_INST.LATC.L2(0:3) [0000]
Bit(s)SCOM Dial: Description
0:3 RW TX_TIMEOUT_VALUE: Defines timout value, eg. 2exp17*(nclk*2) = 104,8576us (@ 5GHz core frequency)

Dial enums:
EXP17_NCLK_2=>0b0000
EXP18_NCLK_2=>0b0001
EXP19_NCLK_2=>0b0010
EXP20_NCLK_2=>0b0011
EXP21_NCLK_2=>0b0100
EXP22_NCLK_2=>0b0101
EXP23_NCLK_2=>0b0110
EXP24_NCLK_2=>0b0111
EXP25_NCLK_2=>0b1000
EXP26_NCLK_2=>0b1001
EXP27_NCLK_2=>0b1010
EXP28_NCLK_2=>0b1011
EXP29_NCLK_2=>0b1100
EXP30_NCLK_2=>0b1101
EXP31_NCLK_2=>0b1110
EXP32_NCLK_2=>0b1111
4:7 RW TX_RETRY_VALUE: Defines retry value

Dial enums:
00_RETRY=>0b0000
01_RETRY=>0b0001
02_RETRY=>0b0010
03_RETRY=>0b0011
04_RETRY=>0b0100
05_RETRY=>0b0101
06_RETRY=>0b0110
07_RETRY=>0b0111
08_RETRY=>0b1000
09_RETRY=>0b1001
10_RETRY=>0b1010
11_RETRY=>0b1011
12_RETRY=>0b1100
13_RETRY=>0b1101
14_RETRY=>0b1110
15_RETRY=>0b1111
8:31 RO constant=0b000000000000000000000000
Dial enums:
00_RETRY=>0b0000
01_RETRY=>0b0001
02_RETRY=>0b0010
03_RETRY=>0b0011
04_RETRY=>0b0100
05_RETRY=>0b0101
06_RETRY=>0b0110
07_RETRY=>0b0111
08_RETRY=>0b1000
09_RETRY=>0b1001
10_RETRY=>0b1010
11_RETRY=>0b1011
12_RETRY=>0b1100
13_RETRY=>0b1101
14_RETRY=>0b1110
15_RETRY=>0b1111

TX Error Register
Addr: 0000000003011C02 (SCOM)
0000000003011C04 (SCOM1)
Name:TP.TPBR.PSI.PSI_WRAP.TX_ERROR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.TERR_HOLD_Q_0_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1 Dial: Description
0 RWX_WCLEAR WOX_OR c1_psitxins_data_pck
1 RWX_WCLEAR WOX_OR c1_psitxins_tzrtmp_pck
2 RWX_WCLEAR WOX_OR c1_psitxei_shift_pck
3 RWX_WCLEAR WOX_OR c1_psitxei_transmit_pck
4 RWX_WCLEAR WOX_OR c1_psitxins_parity
5 RWX_WCLEAR WOX_OR c1_psitxins_underrun
6 RWX_WCLEAR WOX_OR c2_psitxbff_data_pck
7 RWX_WCLEAR WOX_OR c1_psitxbff_tdo_pck
8 RWX_WCLEAR WOX_OR c2_psitxbff_tfc_pck
9 RWX_WCLEAR WOX_OR c2_psitxlc_fsm_pck
10 RWX_WCLEAR WOX_OR c3_psitxlc_data_buff_pck
11 RWX_WCLEAR WOX_OR c2_psitxlc_tdo_pck
12 RWX_WCLEAR WOX_OR c2_psitxlc_taddr_pck
13 RWX_WCLEAR WOX_OR c2_psitxlc_tctrl_pck
14 RWX_WCLEAR WOX_OR c2_psitxlc_ue_rf
15 RWX_WCLEAR WOX_OR c0_psitxlc_ce_rf
16 RWX_WCLEAR WOX_OR c3_psitxlc_ue_gx_2n
17 RWX_WCLEAR WOX_OR c0_psitxlc_ce_gx_2n
18 RWX_WCLEAR WOX_OR c3_psitxlc_data_gxst2_pck_2n
19 RWX_WCLEAR WOX_OR c3_psitxlc_data_gxst3_pck_2n
20 RWX_WCLEAR WOX_OR c3_psirfacc_taddr_pck
21 RWX_WCLEAR WOX_OR c3_psirfacc_tctrl_pck
22 RWX_WCLEAR WOX_OR c3_psirfacc_tdl_cmd_ctrl_pck
23 RWX_WCLEAR WOX_OR c3_psirfacc_tdl_rsp_ctrl_pck
24 RWX_WCLEAR WOX_OR c3_psirfacc_tfsm_pck
25 RWX_WCLEAR WOX_OR c3_psirfacc_tdl_fsm_pck
26 RWX_WCLEAR WOX_OR c4_psirfacc_txsc_pck
27 RWX_WCLEAR WOX_OR c3_psirfacc_tdl_retry_err
28:31 RO n/a constant=0b0000

TX Channel FSM
Addr: 0000000003011C05 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.TX_CH_FSM_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:2TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.TCH_FSM.D_Q_0_INST.LATC.L2(0:2) [000]
Bit(s)SCOM Dial: Description
0:2 RWX tx_ch_fsm
3:31 RO constant=0b00000000000000000000000000000

TX Data Flow FSM
Addr: 0000000003011C06 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.TX_DF_FSM_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.TDF_FSM.D_Q_0_INST.LATC.L2(0:3) [0000]
Bit(s)SCOM Dial: Description
0:3 RWX tx_df_fsm
4:31 RO constant=0b0000000000000000000000000000

TX Error Inject Mode
Addr: 0000000003011C07 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.TX_ERR_MODE
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.TERRINJ_MODE_Q_0_INST.LATC.L2(0:1) [00]
Bit(s)SCOM Dial: Description
0 RW tx_err_mode_0
1 RW tx_err_mode_1
2:31 RO constant=0b000000000000000000000000000000

RX Control Status Register
Addr: 0000000003011C08 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.RX_CTRL_STAT_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.RXSC_Q_0_INST.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW ENABLE_SCWR_TO_RXRF: OFF: Disable SCOM write to RX RF
ON: Enable SCOM write to RX RF
1 RW rxsc
2 RW DISABLE_ECC_COR_RXRF_PSI: OFF: Enable ECC Correction RXRF PSI
ON: Disable ECC Correction RXRF PSI
3 RW RX_CRC_MODE: OFF: RX_CRC-16 Mode
ON: RX_CRC-32 Mode
4 RW ENABLE_SCRD_FR_RXRF: OFF: Disable SCOM read from RX RF
ON: Enable SCOM read from RX RF
5 RW RX_ENABLE_STREAMING_MODE: OFF: RX Disable Streaming Mode
ON: RX Enable Streaming Mode
6 RW RX_CHIP_INTERFACEMODE: ON: RX Processor Chip
ON: RX FSP-1 Chip
7 RW RX_CHIP_PERSONALISATION: OFF: RX Processor Chip
ON: RX FSP-1 Chip
8:31 RO constant=0b000000000000000000000000

Error Event Counter
Addr: 0000000003011C09 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.EECNT_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:5TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.EECNT_Q_0_INST.LATC.L2(0:5) [000000]
Bit(s)SCOM Dial: Description
0:5 RWX eecnt
6:31 RO constant=0b00000000000000000000000000

RX Error Register
Addr: 0000000003011C0A (SCOM)
0000000003011C0C (SCOM1)
Name:TP.TPBR.PSI.PSI_WRAP.RX_ERROR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:24TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.RERR_HOLD_Q_0_INST.LATC.L2(0:24) [0000000000000000000000000]
Bit(s)SCOMSCOM1 Dial: Description
0 RWX_WCLEAR WOX_OR c1_psirxins_rfgshift_pck
1 RWX_WCLEAR WOX_OR c1_psirxins_rzrtmp_pck
2 RWX_WCLEAR WOX_OR c1_psirxins_data_pck
3 RWX_WCLEAR WOX_OR c1_psirxei_shift_pck
4 RWX_WCLEAR WOX_OR c1_psirxei_transmit_pck
5 RWX_WCLEAR WOX_OR c1_psirxins_overrun
6 RWX_WCLEAR WOX_OR c1_psirxbff_data_pck
7 RWX_WCLEAR WOX_OR c2_psirxbff_datao_pck
8 RWX_WCLEAR WOX_OR c2_psirxbff_rfc_pck
9 RWX_WCLEAR WOX_OR c2_psirxlc_fsm_pck
10 RWX_WCLEAR WOX_OR c3_psirxlc_data_buff_pck
11 RWX_WCLEAR WOX_OR c2_psirxlc_data_pck
12 RWX_WCLEAR WOX_OR c2_psirxlc_raddr_pck
13 RWX_WCLEAR WOX_OR c2_psirxlc_rctrl_pck
14 RWX_WCLEAR WOX_OR c3_psirxlc_ue_rf
15 RWX_WCLEAR WOX_OR c0_psirxlc_ce_rf
16 RWX_WCLEAR WOX_OR c2_psirxlc_data_gxst1_pck_2n
17 RWX_WCLEAR WOX_OR c2_psirfacc_raddr_pck
18 RWX_WCLEAR WOX_OR c2_psirfacc_rctrl_pck
19 RWX_WCLEAR WOX_OR c3_psirfacc_rfsm_pck
20 RWX_WCLEAR WOX_OR c3_psirfacc_rdl_fsm_pck
21 RWX_WCLEAR WOX_OR c4_psirfacc_rxsc_pck
22 RWX_WCLEAR WOX_OR c0_psirfacc_rlink_state_lt_02
23 RWX_WCLEAR WOX_OR c0_psirfacc_c_rxdata_rdy_err
24 RWX_WCLEAR WOX_OR c0_errack_rise
25:31 RO n/a constant=0b0000000

RX Channel FSM
Addr: 0000000003011C0D (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.RX_CH_FSM_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.RCH_FSM.D_Q_0_INST.LATC.L2(0:1) [00]
Bit(s)SCOM Dial: Description
0:1 RWX rx_ch_fsm
2:31 RO constant=0b000000000000000000000000000000

RX Data Flow FSM
Addr: 0000000003011C0E (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.RX_DF_FSM_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.RDF_FSM.D_Q_0_INST.LATC.L2(0:3) [0000]
Bit(s)SCOM Dial: Description
0:3 RWX rx_df_fsm
4:31 RO constant=0b0000000000000000000000000000

RX Error Inject Mode
Addr: 0000000003011C0F (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.RX_ERR_MODE
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1TP.TPBR.PSI.PSI_WRAP.PSIRFACC.COMP.RERRINJ_MODE_Q_0_INST.LATC.L2(0:1) [00]
Bit(s)SCOM Dial: Description
0 RW rx_err_mode_0
1 RW rx_err_mode_1
2:31 RO constant=0b000000000000000000000000000000

TX Channel Internal Address Register
Addr: 0000000003011C10 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.TX_CH_INTADDR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7TP.TPBR.PSI.PSI_WRAP.PSITXLC.COMP.P_SPECIFIC.SCOM_MODE_Q_0_INST.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW scom_mode_0
1 RW scom_mode_1
2 RW scom_mode_2
3 RW scom_mode_3
4 RW scom_mode_4
5 RW scom_mode_5
6 RW scom_mode_6
7 RW scom_mode_7
8:31 RO constant=0b000000000000000000000000

TX Channel Data Buffer Register0
Addr: 0000000003011C11 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.TX_DBFF_REG0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TPBR.PSI.PSI_WRAP.PSITXLC.COMP.P_SPECIFIC.DATA_BUFF_Q_0_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RWX data_buff0

TX Channel Data Buffer Register1
Addr: 0000000003011C12 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.TX_DBFF_REG1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TPBR.PSI.PSI_WRAP.PSITXLC.COMP.P_SPECIFIC.DATA_BUFF_Q_0_INST.LATC.L2(32:63) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RWX data_buff1

TX Channel Misc Register
Addr: 0000000003011C13 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.TX_CH_MISC_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TPBR.PSI.PSI_WRAP.PSITXLC.COMP.P_SPECIFIC.FSM.P_SPECIFIC.D_Q_0_INST.LATC.L2(0:3) [0000]
7:11TP.TPBR.PSI.PSI_WRAP.PSITXLC.COMP.P_SPECIFIC.TFRAMESIZE_Q_0_INST.LATC.L2(0:4) [00000]
12:14TP.TPBR.PSI.PSI_WRAP.PSITXLC.COMP.P_SPECIFIC.WEN_Q_0_INST.LATC.L2(0:2) [000]
15TP.TPBR.PSI.PSI_WRAP.PSITXLC.COMP.P_SPECIFIC.DATA_REQT2_Q_INST.LATC.L2(0) [0]
16TP.TPBR.PSI.PSI_WRAP.PSITXLC.COMP.P_SPECIFIC.STTRANS_Q_INST.LATC.L2(0) [0]
17TP.TPBR.PSI.PSI_WRAP.PSITXLC.COMP.P_SPECIFIC.GXDATAAVAIL_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:3 RWX fsm
4:6 RO constant=0b000
7:11 RWX tframesize
12 RWX wen0
13 RWX wen1
14 RWX wen2
15 RWX data_req
16 RWX start_trans
17 RWX gxdataavail_q
18:31 RO constant=0b00000000000000

RX Channel Internal Address Register
Addr: 0000000003011C18 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.RX_CH_INTADDR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7TP.TPBR.PSI.PSI_WRAP.PSIRXLC.COMP.SCOM_MODE_Q_0_INST.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW scom_mode_0
1 RW scom_mode_1
2 RW scom_mode_2
3 RW scom_mode_3
4 RW scom_mode_4
5 RW scom_mode_5
6 RW scom_mode_6
7 RW scom_mode_7
8:31 RO constant=0b000000000000000000000000

RX Channel Data Buffer Register0
Addr: 0000000003011C19 (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.RX_DBFF_REG0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TPBR.PSI.PSI_WRAP.PSIRXLC.COMP.DATA_BUFF_Q_0_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RWX data_buff0

RX Channel Data Buffer Register1
Addr: 0000000003011C1A (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.RX_DBFF_REG1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TPBR.PSI.PSI_WRAP.PSIRXLC.COMP.DATA_BUFF_Q_0_INST.LATC.L2(32:63) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RWX data_buff1

RX Channel Misc Register
Addr: 0000000003011C1B (SCOM)
Name:TP.TPBR.PSI.PSI_WRAP.RX_CH_MISC_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:2TP.TPBR.PSI.PSI_WRAP.PSIRXLC.COMP.FSM0.D_Q_0_INST.LATC.L2(0:2) [000]
3:6TP.TPBR.PSI.PSI_WRAP.PSIRXLC.COMP.FSM1.P_SPECIFIC.D_Q_0_INST.LATC.L2(0:3) [0000]
7:11TP.TPBR.PSI.PSI_WRAP.PSIRXLC.COMP.RFRAMESIZE_Q_0_INST.LATC.L2(0:4) [00000]
12:14TP.TPBR.PSI.PSI_WRAP.PSIRXLC.COMP.WEN_Q_0_INST.LATC.L2(0:2) [000]
15TP.TPBR.PSI.PSI_WRAP.PSIRXLC.COMP.EN_SCRD_Q_INST.LATC.L2(0) [0]
16TP.TPBR.PSI.PSI_WRAP.PSIRXLC.COMP.STTRTOGX_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:2 RWX fsm0
3:6 RWX fsm1
7:11 RWX tframesize
12 RWX wen0
13 RWX wen1
14 RWX wen2
15 RWX en_scrd
16 RWX sttrtogx
17:31 RO constant=0b000000000000000

HTM Collection Mode Register
Addr: 0000000003011C80 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_MODE
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:43PB_BRIDGE.NHTM.SC.HTM_MODE_Q_0_INST.LATC.L2(0:43) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW HTMSC_MODE_HTM_ENABLE: HTM enable, must be set by software to start HTM trace
1:2 RW HTMSC_MODE_CONTENT_SEL: These bits define the NHTM Trace Mode

Dial enums:
FABRIC=>0b00
OCC=>0b10
3 RW HW511975_CHICKENSW: chicken switch. If set, nhtm_co will not mux a record from stack01 to stack23 if there is a valid stamp on stack23
4:12 RW HTMSC_MODE_CAPTURE: HTM capture mode bit definition according to Trace Mode
When htm_mode_q(1 TO 2) == 00, i.e. FABRIC
456789012
0htmx0000 : Ignore HTM generated data writes
1htmx0000 : Capture htm generated data writes
x0htm0000 : Filtering ignored on PMISC (always trace PMISC and Report Hang)
x1htm0000 : Filtering applied on ttype = PMISC and ttype = report hang
xx00x0000 : CRESP Mode: Flush CRESP Queue to avoid overrun (default)
xx01x0000 : CRESP Mode: Reserved
xx10x0000 : CRESP Mode: Enable Precise CRESP Mode
xx11x0000 : CRESP Mode: Ignore CRESP
htmx00000 : Pre-Allocate maximum memory buffers (8)
htmx10000 : Pre-Allocate fewer memory buffers (4)
When htm_mode_q(1 TO 2) == 01, i.e. OTHER
00000htmx : Pre-Allocate maximum memory buffers (8)
00001htmx : Pre-Allocate fewer memory buffers (4)
0000xmmmx : mmm for optional external mux control
0000htmx0 : Both -other- trace buses to NHTM0
0000htmx1 : Other trace bus0 to nhtm0, trace bus1 to nhtm1. High BW
When htm_mode_q(1 TO 2) == 10, i.e. OCC
00000htm0 : Pre-Allocate maximum memory buffers (8)
00001htm0 : Pre-Allocate fewer memory buffers (4)
0000xmmm0 : mmm for optional external mux control
13 RW HTMSC_MODE_WRAP: Enable Trace Wrap Mode
0 = Stop trace when top of Trace Memory is reached
1 = Wrap trace to beginning of Trace Memory
14 RW HTMSC_MODE_DIS_TSTAMP: Disable TimeStamp Writes
0 = Write of timestamps enabled to indicate elapsed time between records
1 = Timestamps written only to indicate record loss
15 RW HTMSC_MODE_SINGLE_TSTAMP: Disable Overflow Timestamps
0 = Timestamp written to indicate elapsed time overflow
1 = Only one timestamp is written between entries, overflow indication is lost
16 RW HTMSC_MODE_SPARE16: Not used in NHTM
17 RW HTMSC_MODE_MARKERS_ONLY: Enable Stamp/Marker Only Mode
0 = Normal trace
1 = Ignore incoming trace data and save only markers caused by HTM_TRIG writes, Global HTM markers enabled to be inserted into the trace record and enabled stamps
18 RW HTMSC_MODE_DIS_FORCE_GROUP_SCOPE: Disable Group Scope
This is a powerbus debug bit
0 = htm write ops sent with group scope
1 = htm write ops sent with Vg scope using programmed target bits.
19:21 RW HTMSC_MODE_SYNC_STAMP_FORCE: Control the number of cycles to wait to force a synchronization stamp or reset the timer.

Dial enums:
NONE=>0b000
4K=>0b001
32K=>0b010
1M=>0b011
16M=>0b100
RESET=>0b111
22 RW HTMSC_MODE_WRITETOIO: HTM Trace memory in IO space, use ci_pr_st op
0 = Use HTM_CL_Write op to target system memory. Do pre-allocation sequence. (default)
1 = Use ci_pr_st op to target anywhere else. Dont do pre-allocate sequence.
23 RW HTMSC_MODE_SPARE23: Not used in NHTM
24:31 RW HTMSC_MODE_VGTARGET: Vg Target bits should be configured if HTM_MEM[scope] is Vg
or if Disable Group Scope=1
32:43 RW HTMSC_MODE_SPARE4043: NOt used in NHTM
44:63 RO constant=0b00000000000000000000

HTM Memory Configuration Register
Addr: 0000000003011C81 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_MEM
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:48PB_BRIDGE.NHTM.SC.HTM_MEM_Q_0_INST.LATC.L2(0:48) [0000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW HTMSC_MEM_ALLOC: 0 = memory based address not configured, 1 = memory address configured
This bit must be written to zero before setting since the HTM looks for
the 0 -> 1 transition on this bit to indicate the memory address has
been updated.
1:3 RW HTMSC_MEM_SCOPE: PowerBus Scope to use when writing the HTM Trace memory
If the scope is not large enough, the HTM will get an address error
If the scope is too large, HTM will experience excessive delay

Dial enums:
LOCAL=>0b000
NEARNODE=>0b010
GROUP=>0b011
REMOTE=>0b100
VECTORED=>0b101
4 RW HTMSC_MEM_PRIORITY: Starting PowerBus Priority
Configure the Starting priority used when writing the HTM Trace memory
Leave at default 000 unless there is a very good reason to change

Dial enums:
LOW=>0b0
MEDIUM=>0b1
5 RW HTMSC_MEM_SIZE_SMALL: Trace Memory Size Range
0 = Trace Mem Size from 512M to 256G
1 = Trace Mem Size from 16M to 8G
6:7 RW HTMSC_MEM_SPARE67: Not Used
8:39 RW HTMSC_MEM_BASE: Trace memory base address (8:39).
The Trace Memory Base Address must be aligned on a Trace Memory Size boundary
40:48 RW HTMSC_MEM_SIZE: Trace Memory Size
When htmsc_mem_size_small=0, these bits define the mask to bits (26:35) of the Trace Memory Base Address and define the size of the trace memory between 512MB and 256GB
When htmsc_mem_size_small=1, these bits define the mask to bits (31:39) of the Trace Memory Base address and define the size of the trace memory between 16MB and 8GB

Dial enums:
512M_OR_16M=>0b000000000
1G_OR_32M=>0b000000001
2G_OR_64M=>0b000000011
4G_OR_128M=>0b000000111
8G_OR_256M=>0b000001111
16G_OR_512M=>0b000011111
32G_OR_1G=>0b000111111
64G_OR_2G=>0b001111111
128G_OR_4G=>0b011111111
256G_OR_8G=>0b111111111
49:63 RO constant=0b000000000000000
Dial enums:
512M_OR_16M=>0b000000000
1G_OR_32M=>0b000000001
2G_OR_64M=>0b000000011
4G_OR_128M=>0b000000111
8G_OR_256M=>0b000001111
16G_OR_512M=>0b000011111
32G_OR_1G=>0b000111111
64G_OR_2G=>0b001111111
128G_OR_4G=>0b011111111
256G_OR_8G=>0b111111111

HTM Status Register
Addr: 0000000003011C82 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_STAT
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PB_BRIDGE.NHTM.SC.HTM_STAT_Q_0_INST.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:1 ROX HTM0_HTMCO_STATUS_SPARE: Spare bits
2 ROX HTM0_HTMCO_STATUS_CRESP_OV: HTM0: Asserted on detection of a CRESP queue overwrite condition. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
3 ROX HTM0_HTMCO_STATUS_REPAIR: HTM0: Asserted on occurence of address error to indicate the need of software to clear and update HTM_MEM. Will stay high until HTM_MEM updated
4 ROX HTM0_HTMCO_STATUS_BUF_WAIT: HTM0: Asserted on condition of data buffers full in tracing state. Any markers, stamps, and trace data recieved when this bit is set will be lost
5 ROX HTM0_STATUS_TRIG_DROPPED_Q: HTM0: Asserted on buffer overrun due to trigger lost at least once in the last trace. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
6 ROX HTM0_HTMCO_STATUS_ADDR_ERROR: HTM0: Asserted on address error when write buffer was allocated. Need to set new address range after htmco_status_repair is asserted.
7 ROX HTM0_STATUS_REC_DROPPED_Q: HTM0: Asserted on buffer overrun due to trace data lost at least once in the last trace. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
8 ROX HTM0_HTMCO_STATUS_INIT: HTM0: Asserted when htm_cofsm is in Init state
9 ROX HTM0_HTMCO_STATUS_PREREQ: HTM0: Asserted when htm_cofsm is in Pre-req state
10 ROX HTM0_HTMCO_STATUS_READY: HTM0: Asserted when htm_cofsm is in Ready state
11 ROX HTM0_HTMCO_STATUS_TRACING: HTM0: Asserted when htm_cofsm is in Tracing state
12 ROX HTM0_HTMCO_STATUS_PAUSED: HTM0: Asserted when htm_cofsm is in Paused state
13 ROX HTM0_HTMCO_STATUS_FLUSH: HTM0: Asserted when htm_cofsm is in Flush state
14 ROX HTM0_HTMCO_STATUS_COMPLETE: HTM0: Asserted when htm_cofsm is in Complete state
15 ROX HTM0_HTMCO_STATUS_ENABLE: HTM0: Asserted when htm_cofsm is in Enable state
16 ROX HTM0_HTMCO_STATUS_STAMP: HTM0: Asserted when htm_cofsm is in Stamp state
17 ROX HTM0_STATUS_SCOM_ERROR: HTM0: Asserted to indicate that a scom error indication was received from the scom satellite. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
18 ROX HTM0_STATUS_PARITY_ERROR: HTM0: Asserted to indicate a parity error was detected on the PowerBus. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
19 ROX HTM0_STATUS_INVALID_CRESP: HTM0: Asserted to indicate an invalid CRESP was received from the PowerBus. NHTM is hung. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
20:21 ROX HTM1_HTMCO_STATUS_SPARE: Spare bits
22 ROX HTM1_HTMCO_STATUS_CRESP_OV: HTM1: Asserted on detection of a CRESP queue overwrite condition. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
23 ROX HTM1_HTMCO_STATUS_REPAIR: HTM1: Asserted on occurence of address error to indicate the need of software to clear and update HTM_MEM. Will stay high until HTM_MEM updated
24 ROX HTM1_HTMCO_STATUS_BUF_WAIT: HTM1: Asserted on condition of data buffers full in tracing state. Any markers, stamps, and trace data recieved when this bit is set will be lost
25 ROX HTM1_STATUS_TRIG_DROPPED_Q: HTM1: Asserted on buffer overrun due to trigger lost at least once in the last trace. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
26 ROX HTM1_HTMCO_STATUS_ADDR_ERROR: HTM1: Asserted on address error when write buffer was allocated. Need to set new address range after htmco_status_repair is asserted.
27 ROX HTM1_STATUS_REC_DROPPED_Q: HTM1: Asserted on buffer overrun due to trace data lost at least once in the last trace. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
28 ROX HTM1_HTMCO_STATUS_INIT: HTM1: Asserted when htm_cofsm is in Init state
29 ROX HTM1_HTMCO_STATUS_PREREQ: HTM1: Asserted when htm_cofsm is in Pre-req state
30 ROX HTM1_HTMCO_STATUS_READY: HTM1: Asserted when htm_cofsm is in Ready state
31 ROX HTM1_HTMCO_STATUS_TRACING: HTM1: Asserted when htm_cofsm is in Tracing state
32 ROX HTM1_HTMCO_STATUS_PAUSED: HTM1: Asserted when htm_cofsm is in Paused state
33 ROX HTM1_HTMCO_STATUS_FLUSH: HTM1: Asserted when htm_cofsm is in Flush state
34 ROX HTM1_HTMCO_STATUS_COMPLETE: HTM1: Asserted when htm_cofsm is in Complete state
35 ROX HTM1_HTMCO_STATUS_ENABLE: HTM1: Asserted when htm_cofsm is in Enable state
36 ROX HTM1_HTMCO_STATUS_STAMP: HTM1: Asserted when htm_cofsm is in Stamp state
37 ROX HTM1_STATUS_SCOM_ERROR: HTM1: Asserted to indicate that a scom error indication was received from the scom satellite. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
38 ROX HTM1_STATUS_PARITY_ERROR: HTM1: Asserted to indicate a parity error was detected on the PowerBus. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
39 ROX HTM1_STATUS_INVALID_CRESP: HTM1: Asserted to indicate an invalid CRESP was received from the PowerBus. NHTM is hung. Cleared on the writing of 1 to the Reset Trigger bit, htmsc_trig_reset
40:63 RO constant=0b000000000000000000000000

HTM0 Last Address Register
Addr: 0000000003011C83 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM0_LAST
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
8:56PB_BRIDGE.NHTM.SC.HTM0_LAST_Q_8_INST.LATC.L2(8:56) [0000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RO constant=0b00000000
8:56 ROX HTM0_LAST_ADDRESS: HTM0: The last cache line address of the memory trace. Guaranteed valid only when HTM is in the Complete state
57:63 RO constant=0b0000000

HTM1 Last Address Register
Addr: 0000000003011C84 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM1_LAST
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
8:56PB_BRIDGE.NHTM.SC.HTM1_LAST_Q_8_INST.LATC.L2(8:56) [0000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RO constant=0b00000000
8:56 ROX HTM1_LAST_ADDRESS: HTM1: The last cache line address of the memory trace. Guaranteed valid only when HTM is in the Complete state
57:63 RO constant=0b0000000

HTM SCOM Trigger Register
Addr: 0000000003011C85 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_TRIG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PB_BRIDGE.NHTM.SC.HTM_TRIG_Q_0_INST.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0 RW HTMSC_TRIG_START: Start trigger
1 RW HTMSC_TRIG_STOP: Stop trigger
2 RW HTMSC_TRIG_PAUSE: Pause trigger
3 RW HTMSC_TRIG_STOP_ALT: Stop trigger 2. Legacy bit that used to be the Freeze Trigger in P6 implementation
4 RW HTMSC_TRIG_RESET: Reset trigger
5 RW HTMSC_TRIG_MARK_VALID: Mark type valid
6:15 RW HTMSC_TRIG_MARK_TYPE: Mark type is put into Mark Record when bit 5 is set
16:63 RO constant=0b000000000000000000000000000000000000000000000000

HTM Trigger Control Register
Addr: 0000000003011C86 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_CTRL
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PB_BRIDGE.NHTM.SC.HTM_CTRL_Q_0_INST.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0:1 RW HTMSC_CTRL_TRIG: Trigger Control
00 local triggers are not forwarded to the PowerBus, it is inserted into the trace when tracing. Both local and global triggers control the HTM
01 local triggers are not forwarded to the PowerBus, it is inserted into the trace when tracing. Only local triggers control the HTM
1x local triggers are forwarded to the PowerBus, it is not inserted into the trace when tracing. Only global triggers control the HTM
2:3 RW
4:5 RW HTMSC_CTRL_MARK: Marker Control
00 local markers are not forwarded to the PowerBus. Both local and global markers are inserted into the trace
01 local markers are not forwarded to the PowerBus. Only local markers are inserted into the trace
10 local markers are forwarded to the PowerBus. Only global markers are inserted into the trace
11 local markers are forwarded to the PowerBus. Markers are not inserted into the trace (Fabric Trace Mode)
6 RW HTMSC_CTRL_DBG0_STOP: Enable Stop on PB Chiplet Debug Trigger 0
7 RW HTMSC_CTRL_DBG1_STOP: Enable Stop on PB Chiplet Debug Trigger 1
8 RW HTMSC_CTRL_RUN_STOP: Enable Stop on falling edge of PB Chiplet trace_run
9 RW HTMSC_CTRL_OTHER_DBG0_STOP: Enable Stop using OCC Control
10:12 RW HTMSC_CTRL_SPARE1012: Spare bits
13 RW HTMSC_CTRL_XSTOP_STOP: Enable Stop on chiplet XSTOP
14:15 RW HTMSC_CTRL_SPARE1415: Spare bits
16:63 RO constant=0b000000000000000000000000000000000000000000000000

HTM Filter Control Register
Addr: 0000000003011C87 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_FILT
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB_BRIDGE.NHTM.SC.HTM_FILT_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:14 RW HTMSC_FILT_TTAG_PAT: TTAG Filter Pattern
Fabric Mode: 0:3 rcmd_ttag(0:3) Topology ID Pattern for rcmd and cresp filtering
4:14 rcmd_ttag(4:14) Unit ID Pattern for rcmd and cresp filtering
OCC Mode: 0:14 occ_trace(0:14) Pattern for filtering
15:16 RW HTMSC_FILT_OCC15TO16_PAT: OCC Mode: occ_trace(15:16) Pattern for filtering
17:19 RW HTMSC_FILT_SCOPE_PAT: Fabric Mode: Scope Pattern for rcmd and cresp filtering
OCC Mode: occ_trace(17:19) Pattern for filtering
20:21 RW HTMSC_FILT_SOURCE_PAT: Fabric Mode: Source Pattern for rcmd filtering
OCC Mode: occ_trace(20:21) Pattern for filtering
22 RW HTMSC_FILT_PORT_PAT_0: Fabric Mode: Powerbus PORT pattern for rcmd and cresp filtering on NTHM0
OCC Mode: occ_trace(22) Pattern for filtering
23 RW HTMSC_FILT_PORT_PAT_1: Fabric Mode: Powerbus PORT pattern for rcmd and cresp filtering on NTHM1
OCC Mode: occ_trace(23) Pattern for filtering
24 RW HTMSC_FILT_OCC24_PAT: OCC Mode: occ_trace(24) Pattern for filtering
25 RW HTMSC_FILT_MCD_TTAG: Fabric Mode: Filter out rcmnd and cresp mcd sources commands (cl_probe)
OCC Mode: occ_trace(25) Pattern for filtering
26 RW HTMSC_TTAGFILT_INVERT: Fabric Mode: Invert ttag filter meaning
OCC Mode: occ_trace(26) Pattern for filtering
27:31 RW HTMSC_FILT_CRESP_PAT: CRESP Filter Pattern
Fabric Mode: Defines the CRESP pattern to match
OCC Mode: occ_trace(27:31) Pattern for filtering
32:46 RW HTMSC_FILT_TTAG_MASK: Fabric Mode: Ttag Pattern Mask
OCC Mode: occ_trace(0:14) Mask for filtering
Bits set to 1 in this mask do not need to match w/ the Filter Pattern.
If all mask bits are set, No pattern matching is done
47:48 RW HTMSC_FILT_OCC15TO16_MASK: OCC Mode: occ_trace(15:16) Mask for filtering
Bits set to 1 in this mask do not need to match w/ the Filter Pattern.
If all mask bits are set, No pattern matching is done
49:51 RW HTMSC_FILT_SCOPE_MASK: Fabric Mode: Scope Pattern Mask
OCC Mode: occ_trace(17:19) Mask for filtering
Bits set to 1 in this mask do not need to match w/ the Filter Pattern.
If all mask bits are set, No pattern matching is done
52:53 RW HTMSC_FILT_SOURCE_MASK: Fabric Mode: Source Pattern Mask
OCC Mode: occ_trace(20:21) Mask for filtering
Bits set to 1 in this mask do not need to match w/ the Filter Pattern.
If all mask bits are set, No pattern matching is done
54 RW HTMSC_FILT_PORT_MASK_0: Fabric Mode: Port Pattern Mask for NHTM0
OCC Mode: occ_trace(22) Mask for filtering
Bits set to 1 in this mask do not need to match w/ the Filter Pattern.
If all mask bits are set, No pattern matching is done
55 RW HTMSC_FILT_PORT_MASK_1: Fabric Mode: Port Pattern Mask for NHTM1
OCC Mode: occ_trace(23) Mask for filtering
Bits set to 1 in this mask do not need to match w/ the Filter Pattern.
If all mask bits are set, No pattern matching is done
56:58 RW HTMSC_FILT_OCC24TO26_MASK: OCC Mode: occ_trace(24:26) Mask for filtering
Bits set to 1 in this mask do not need to match w/ the Filter Pattern.
If all mask bits are set, No pattern matching is done
59:63 RW HTMSC_FILT_CRESP_MASK: Fabric Mode: Cresp Pattern Mask
OCC Mode: occ_trace(27:31) Mask for filtering
Bits set to 1 in this mask do not need to match w/ the Filter Pattern.
If all mask bits are set, No pattern matching is done

HTM Ttype Filter Control Register
Addr: 0000000003011C88 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_TTYPEFILT
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:33PB_BRIDGE.NHTM.SC.HTM_TTYPEFILT_Q_0_INST.LATC.L2(0:33) [0000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW
1:7 RW HTMSC_TTYPEFILT_PAT: TTYPE Pattern
In Fabric Trace Mode, Defines the TTYPE pattern to Match
8:15 RW HTMSC_TSIZEFILT_PAT: TSIZE Pattern
In Fabric Trace Mode, Defines the TSIZE pattern to Match
16 RW
17:23 RW HTMSC_TTYPEFILT_MASK: TTYPE Pattern mask.
TTYPE Bits set to 1 in this mask do not need to match w/ the Pattern.
If all mask bits are set, No TTYPE pattern/masking is done
24:31 RW HTMSC_TSIZEFILT_MASK: TSIZE Pattern mask.
TSIZE Bits set to 1 in this mask do not need to match w/ the Pattern.
If all mask bits are set, No TSIZE pattern/masking is done
32 RW HTMSC_TTYPEFILT_INVERT: TTYPE/TSIZE Capture Invert.
0 : Capture record based on ttype/tsize pattern matching
1 : Capture record based on ttype/tsize pattern NOT matching
33 RW HTMSC_CRESPFILT_INVERT: CRESP Filter Capture Invert.
0 : Capture record based on cresp filter pattern matching
1 : Capture record based on cresp filter pattern NOT matching
34:63 RO constant=0b000000000000000000000000000000

HTM Configuration Register
Addr: 0000000003011C89 (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_CFG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:19PB_BRIDGE.NHTM.SC.HTM_CFG_Q_0_INST.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOM Dial: Description
0:4 RW HTMSC_CFG_OPER_HANG_DIV_RATIO: PowerBus Operational Hang Divider
This register is used to set the hang count divider for operational
hangs. If this register is NOT initialized, the default hang_div_ratio
is b01000 setup on the first functional clock
5:8 RW HTMSC_CFG_RTY_DRP_COUNT: PowerBus Retry Drop Counter Max
This is the maximum value to count RTY_DRP cresp before increasing the drop priority
used when sending the next command. If this register is NOT initialized, the default
max count is b0111 setup on the first functional clock
9 RW HTMSC_CFG_DIS_DRP_PRIORITY_INCR: Disable Increase of Drop Priority
10 RW spare
11 RW HTMSC_CFG_DIS_OPER_HANG: Disable PowerBus Operational Hang Detect
0 = Powerbus Operation Hang Detect works according to PB Arch Ver 3xx
1 = Powerbus Operation Hang Detect disabled, PRSP Rty_Other never asserted
12:19 RW
20:63 RO constant=0b00000000000000000000000000000000000000000000

HTM Flex Mux Register
Addr: 0000000003011C8A (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_FLEX
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39PB_BRIDGE.NHTM.SC.HTM_FLEX_Q_0_INST.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RW HTMSC_FMUX_RGRPSEL0: RCMD Group 0 Select for rcmd record bits(17:20)
Default is 1100 for rcmdx_adr(60:63)
4:7 RW HTMSC_FMUX_RGRPSEL1: RCMD Group 1 Select for rcmd record bits(21:24)
Default is 1011 for rcmdx_ttag(15:18)
8:11 RW HTMSC_FMUX_RGRPSEL2: RCMD Group 2 Select for rcmd record bits(25:28)
Default is 0011 for rcmdx_adr(16:19)
12:15 RW HTMSC_FMUX_RGRPSEL3: RCMD Group 3 Select for rcmd record bits(29:32)
Default is 0100 for rcmdx_adr(20:23)
16:19 RW HTMSC_FMUX_RGRPSEL4: RCMD Group 4 Select for rcmd record bits(33:36)
Default is 0101 for rcmdx_adr(24:27)
20:23 RW HTMSC_FMUX_RGRPSEL5: RCMD Group 5 Select for rcmd record bits(37:40)
Default is 0110 for rcmdx_adr(28:31)
24:27 RW HTMSC_FMUX_CGRPSEL0: CRESP Flex Group 0 Select for cresp record bits(23:24)
Default is 0001 for crx_target(0:1)
28:31 RW HTMSC_FMUX_CGRPSEL1: CRESP Flex Group 1 Select for cresp record bits(25:26)
Default is 0010 for crx_target(2:3)
32:35 RW HTMSC_FMUX_CGRPSEL2: CRESP Flex Group 2 Select for cresp record bits(27:28)
Default is 0011 for crx_target(4:5)
36:39 RW HTMSC_FMUX_CGRPSEL3: CRESP Flex Group 3 Select for cresp record bits(29:30)
Default is 0100 for crx_target(6:7)
40:63 RO constant=0b000000000000000000000000

HTM Filter Address Pattern Register
Addr: 0000000003011C8B (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_ADDR_PAT
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:55PB_BRIDGE.NHTM.SC.HTM_ADDR_PAT_Q_0_INST.LATC.L2(0:55) [00000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:55 RW HTMSC_FILT_ADDR_PAT: Address Filter Pattern
56 bits correspond to bits (8 to 63) of the address of snooped rcmd
56:63 RO constant=0b00000000

HTM Filter Address Mask Register
Addr: 0000000003011C8C (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_ADDR_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:55PB_BRIDGE.NHTM.SC.HTM_ADDR_MASK_Q_0_INST.LATC.L2(0:55) [00000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:55 RW HTMSC_FILT_ADDR_MASK: Address Filter Mask
The 56 bits correspond to bits (8 to 63) of the address of snooped rcmd
Bits set to 1 do not need to match with the Filter Pattern.
If all bits are set to 1, no stop triggers will be generated on the matching pattern.
56:63 RO constant=0b00000000

HTM Stop Filter Control Register
Addr: 0000000003011C8D (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_STOP_FILTER
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:60PB_BRIDGE.NHTM.SC.HTM_STOP_FILTER_Q_0_INST.LATC.L2(0:60) [0000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:14 RW HTMSC_STOP_TTAG_PAT: Ttag Stop Filter Pattern
Used for both rcmd and cresp filtering. Specifies the filter pattern.
15:29 RW HTMSC_STOP_TTAG_MASK: Ttag Stop Filter Mask
Used for both rcmd and cresp filtering. Specifies the filter mask
Bits set to 1 do not need to match with the Filter Pattern.
If all bits are set to 1, no stop triggers will be generated on the matching pattern.
30:36 RW HTMSC_STOP_TTYPE_PAT: Ttype Stop Filter Pattern
Used for rcmd filtering. Specifies the filter pattern.
37:43 RW HTMSC_STOP_TTYPE_MASK: Ttype Stop Filter Mask
Used for rcmd filtering. Specifies the filter mask.
Bits set to 1 do not need to match with the Filter Pattern.
If all bits are set to 1, no stop triggers will be generated on the matching pattern.
44:48 RW HTMSC_STOP_CRESP_PAT: Cresp Stop Filter Pattern
Used for cresp filtering. Specifies the filter pattern.
49:53 RW HTMSC_STOP_CRESP_MASK: Cresp Stop Filter Mask
Used for cresp filtering. Specifies the filter mask.
Bits set to 1 do not need to match with the Filter Pattern.
If all bits are set to 1, no stop triggers will be generated on the matching pattern.
54:60 RW HTMSC_STOP_CYCLES: Stop Cycles
After a stop pattern match has been found, a local stop trigger will be generated either immediately or after a specified delay.
The Stop Cycles field specifies, in 64 cycle increments, how many cycles past the filter match to wait before generating the local stop trigger.
The maximum delay is 8128 cycles.
61:63 RO constant=0b000

HTM Stop Filter Address Stop Register
Addr: 0000000003011C8E (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_STOP_ADDR_PAT
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:55PB_BRIDGE.NHTM.SC.HTM_STOP_ADDR_PAT_Q_0_INST.LATC.L2(0:55) [00000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:55 RW HTMSC_STOP_ADDR_PAT: Address Stop Filter Pattern
The 56 bits correspond to bits (8 to 63) of the address.
56:63 RO constant=0b00000000

HTM Stop Filter Address Mask Register
Addr: 0000000003011C8F (SCOM)
Name:PB_BRIDGE.NHTM.SC.HTM_STOP_ADDR_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:55PB_BRIDGE.NHTM.SC.HTM_STOP_ADDR_MASK_Q_0_INST.LATC.L2(0:55) [00000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:55 RW HTMSC_STOP_ADDR_MASK: Address Stop Filter Mask
The 56 bits correspond to bits (8 to 63) of the address.
Bits set to 1 do not need to match with the Filter Pattern.
If all bits are set to 1, no stop triggers will be generated on the matching pattern.
56:63 RO constant=0b00000000

PSI Host Bridge FIR Register
Addr: 0000000003011D00 (SCOM)
0000000003011D01 (SCOM1)
0000000003011D02 (SCOM2)
Name:TP.TPBR.PSIHB.PSIHB_FIR_REG
Constant(s):
Comments:PSI Host Bridge FIR Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TPBR.PSIHB.CTRL.SCOMFIR.PAR_ON.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PB_ECC_ERR_CE: CE from PowerBus data
1 RWX WOX_AND WOX_OR PB_ECC_ERR_UE: UE from PowerBus data
2 RWX WOX_AND WOX_OR PB_ECC_ERR_SUE: SUE from PowerBus data
3 RWX WOX_AND WOX_OR INTERRUPT_FROM_ERROR: Interrupt Condition present in PSIHB
4 RWX WOX_AND WOX_OR INTERRUPT_FROM_FSP: Interrupt from FSP is being processed
5 RWX WOX_AND WOX_OR FSP_ECC_ERR_CE: CE from PSILL data
6 RWX WOX_AND WOX_OR FSP_ECC_ERR_UE: UE from PSILL data
7 RWX WOX_AND WOX_OR ERROR_STATE: Error bit set, ignores the interrupt mask
8 RWX WOX_AND WOX_OR INVALID_TTYPE: Invalid TType Hit on PHB or FSP bar
9 RWX WOX_AND WOX_OR INVALID_CRESP: Invalid CResp returned to command issued by PSIHB
10 RWX WOX_AND WOX_OR PB_DATA_TIME_OUT: PowerBus time out waiting for data grant
11 RWX WOX_AND WOX_OR PB_PARITY_ERROR: PB parity error
12 RWX WOX_AND WOX_OR FSP_ACCESS_TRUSTED_SPACE: FSP tried access to trusted space
13 RWX WOX_AND WOX_OR UNEXPECTED_PB: Unexpected PB CRESP or DATA
14:20 RWX WOX_AND WOX_OR SPARE_FIR_ERR: Spare firs tied to zero
21 RWX WOX_AND WOX_OR TCBR_TP_PSI_GLB_ERR_0: PSI global error bit 0
22 RWX WOX_AND WOX_OR TCBR_TP_PSI_GLB_ERR_1: PSI global error bit 1
23 RWX WOX_AND WOX_OR UPSTREAM_FIR: Upstream error
24:26 RWX WOX_AND WOX_OR SPARE_FIR: Spare fir
27 RWX WOX_AND WOX_OR FIR_PARITY_ERROR: fir parity Error
28:45 RO n/a n/a constant=0b000000000000000000

PSI Host Bridge FIR Mask Register
Addr: 0000000003011D03 (SCOM)
0000000003011D04 (SCOM1)
0000000003011D05 (SCOM2)
Name:TP.TPBR.PSIHB.PSIHB_FIR_MASK_REG
Constant(s):
Comments:PSI Host Bridge FIR Mask Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TPBR.PSIHB.CTRL.SCOMFIR.PAR_ON.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_AND WO_OR PB_ECC_ERR_CE_MASK: Mask for CE from PowerBus data
1 RW WO_AND WO_OR PB_ECC_ERR_UE_MASK: Mask for UE from PowerBus data
2 RW WO_AND WO_OR PB_ECC_ERR_SUE_MASK: Mask for SUE from PowerBus data
3 RW WO_AND WO_OR INTERRUPT_FROM_ERROR_MASK: Mask for Interrupt Condition present in PSIHB
4 RW WO_AND WO_OR INTERRUPT_FROM_FSP_MASK: Mask for Interrupt from FSP is being processed
5 RW WO_AND WO_OR FSP_ECC_ERR_CE_MASK: Mask for CE from PSILL data
6 RW WO_AND WO_OR FSP_ECC_ERR_UE_MASK: Mask for UE from PSILL data
7 RW WO_AND WO_OR ERROR_STATE_MASK: Mask for Error bit set, ignores the interrupt mask
8 RW WO_AND WO_OR INVALID_TTYPE_MASK: Mask for Invalid TType Hit on PHB or FSP bar
9 RW WO_AND WO_OR INVALID_CRESP_MASK: Mask for Invalid CResp returned to command issued by PSIHB
10 RW WO_AND WO_OR PB_DATA_TIME_OUT_MASK: Mask for PowerBus time out waiting for data grant
11 RW WO_AND WO_OR PB_PARITY_ERROR_MASK: PB parity error
12 RW WO_AND WO_OR FSP_ACCESS_TRUSTED_SPACE_MASK: FSP tried access to trusted space
13 RW WO_AND WO_OR UNEXPECTED_PB_MASK: Unexpected PB CRESP or DATA
14 RW WO_AND WO_OR INTERRUPT_REG_CHANGE_WHILE_ACTIVE_MASK: Interrupt register change while interrupt still pending
15 RW WO_AND WO_OR INTERRUPT0_ADDRESS_ERROR_MASK: PSI Interrupt address error_mask
16 RW WO_AND WO_OR INTERRUPT1_ADDRESS_ERROR_MASK: OCC Interrupt address error_mask
17 RW WO_AND WO_OR INTERRUPT2_ADDRESS_ERROR_MASK: FSI Interrupt address error_mask
18 RW WO_AND WO_OR INTERRUPT3_ADDRESS_ERROR_MASK: LPC Interrupt address error_mask
19 RW WO_AND WO_OR INTERRUPT4_ADDRESS_ERROR_MASK: LOCAL error_mask Interrupt address error_mask
20 RW WO_AND WO_OR INTERRUPT5_ADDRESS_ERROR_MASK: HOST error_mask Interrupt address error_mask
21 RW WO_AND WO_OR TCBR_TP_PSI_GLB_ERR_0_MASK: PSI global_mask error bit 0
22 RW WO_AND WO_OR TCBR_TP_PSI_GLB_ERR_1_MASK: PSI global_mask error bit 1
23 RW WO_AND WO_OR UPSTREAM_FIR_MASK: Upstream error
24:26 RW WO_AND WO_OR SPARE_FIR_MASK: Spare fir
27 RW WO_AND WO_OR FIR_PARITY_ERROR_MASK: fir parity Error
28:45 RO n/a n/a constant=0b000000000000000000

PSI Host Bridge FIR Action0 Register
Addr: 0000000003011D06 (SCOM)
Name:TP.TPBR.PSIHB.PSIHB_FIR_ACTION0_REG
Constant(s):
Comments:PSI Host Bridge FIR Action0 Register
Action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = No Error
(0,1) = recoverable error
(1,0) = Checkstop Error
(1,1) = unused
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TPBR.PSIHB.CTRL.SCOMFIR.PAR_ON.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RO PB_ECC_ERR_CE_ACTION0: Action0 for CE from PowerBus data
1 RO PB_ECC_ERR_UE_ACTION0: Action0 for UE from PowerBus data
2 RO PB_ECC_ERR_SUE_ACTION0: Action0 for SUE from PowerBus data
3 RO INTERRUPT_FROM_ERROR_ACTION0: Action0 for Interrupt Condition present in PSIHB
4 RO INTERRUPT_FROM_FSP_ACTION0: Action0 for Interrupt from FSP is being processed
5 RO FSP_ECC_ERR_CE_ACTION0: Action0 for CE from PSILL data
6 RO FSP_ECC_ERR_UE_ACTION0: Action0 for UE from PSILL data
7 RO ERROR_STATE_ACTION0: Action0 for Error bit set, ignores the interrupt mask
8 RO INVALID_TTYPE_ACTION0: Action0 for Invalid TType Hit on PHB or FSP bar
9 RO INVALID_CRESP_ACTION0: Action0 for Invalid CResp returned to command issued by PSIHB
10 RO PB_DATA_TIME_OUT_ACTION0: Action0 for PowerBus time out waiting for data grant
11 RO PB_PARITY_ERROR_ACTION0: PB parity error
12 RO FSP_ACCESS_TRUSTED_SPACE_ACTION0: FSP tried access to trusted space
13 RO UNEXPECTED_PB_ACTION0: Unexpected PB CRESP or DATA
14 RO INTERRUPT_REG_CHANGE_WHILE_ACTIVE_ACTION0: Interrupt register change while interrupt still pending
15 RO INTERRUPT0_ADDRESS_ERROR_ACTION0: PSI Interrupt address error_action0
16 RO INTERRUPT1_ADDRESS_ERROR_ACTION0: OCC Interrupt address error_action0
17 RO INTERRUPT2_ADDRESS_ERROR_ACTION0: FSI Interrupt address error_action0
18 RO INTERRUPT3_ADDRESS_ERROR_ACTION0: LPC Interrupt address error_action0
19 RO INTERRUPT4_ADDRESS_ERROR_ACTION0: LOCAL error_action0 Interrupt address error_action0
20 RO INTERRUPT5_ADDRESS_ERROR_ACTION0: HOST error_action0 Interrupt address error_action0
21 RO TCBR_TP_PSI_GLB_ERR_0_ACTION0: PSI global_action0 error bit 0
22 RO TCBR_TP_PSI_GLB_ERR_1_ACTION0: PSI global_action0 error bit 1
23 RO UPSTREAM_FIR_ACTION0: Upstream error
24:26 RO SPARE_FIR_ACTION0: Spare fir
27 RO FIR_PARITY_ERROR_ACTION0: fir parity Error
28:48 RO constant=0b000000000000000000000

PSI Host Bridge FIR action1 Register
Addr: 0000000003011D07 (SCOM)
Name:TP.TPBR.PSIHB.PSIHB_FIR_ACTION1_REG
Constant(s):
Comments:PSI Host Bridge FIR action1 Register
Action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = No Error
(0,1) = recoverable error
(1,0) = Checkstop Error
(1,1) = unused
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TPBR.PSIHB.CTRL.SCOMFIR.PAR_ON.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RO PB_ECC_ERR_CE_ACTION1: Action1 for CE from PowerBus data
1 RO PB_ECC_ERR_UE_ACTION1: Action1 for UE from PowerBus data
2 RO PB_ECC_ERR_SUE_ACTION1: Action1 for SUE from PowerBus data
3 RO INTERRUPT_FROM_ERROR_ACTION1: Action1 for Interrupt Condition present in PSIHB
4 RO INTERRUPT_FROM_FSP_ACTION1: Action1 for Interrupt from FSP is being processed
5 RO FSP_ECC_ERR_CE_ACTION1: Action1 for CE from PSILL data
6 RO FSP_ECC_ERR_UE_ACTION1: Action1 for UE from PSILL data
7 RO ERROR_STATE_ACTION1: Action1 for Error bit set, ignores the interrupt mask
8 RO INVALID_TTYPE_ACTION1: Action1 for Invalid TType Hit on PHB or FSP bar
9 RO INVALID_CRESP_ACTION1: Action1 for Invalid CResp returned to command issued by PSIHB
10 RO PB_DATA_TIME_OUT_ACTION1: Action1 for PowerBus time out waiting for data grant
11 RO PB_PARITY_ERROR_ACTION1: PB parity error
12 RO FSP_ACCESS_TRUSTED_SPACE_ACTION1: FSP tried access to trusted space
13 RO UNEXPECTED_PB_ACTION1: Unexpected PB CRESP or DATA
14 RO INTERRUPT_REG_CHANGE_WHILE_ACTIVE_ACTION1: Interrupt register change while interrupt still pending
15 RO INTERRUPT0_ADDRESS_ERROR_ACTION1: PSI Interrupt address error_action1
16 RO INTERRUPT1_ADDRESS_ERROR_ACTION1: OCC Interrupt address error_action1
17 RO INTERRUPT2_ADDRESS_ERROR_ACTION1: FSI Interrupt address error_action1
18 RO INTERRUPT3_ADDRESS_ERROR_ACTION1: LPC Interrupt address error_action1
19 RO INTERRUPT4_ADDRESS_ERROR_ACTION1: LOCAL error_action1 Interrupt address error_action1
20 RO INTERRUPT5_ADDRESS_ERROR_ACTION1: HOST error_action1 Interrupt address error_action1
21 RO TCBR_TP_PSI_GLB_ERR_0_ACTION1: PSI global_action1 error bit 0
22 RO TCBR_TP_PSI_GLB_ERR_1_ACTION1: PSI global_action1 error bit 1
23 RO UPSTREAM_FIR_ACTION1: Upstream error
24:26 RO SPARE_FIR_ACTION1: Spare fir
27 RO FIR_PARITY_ERROR_ACTION1: fir parity Error
28:48 RO constant=0b000000000000000000000

PHBBAR - PSI Host Bridge Base Address Register
Addr: 0000000003011D0A (SCOM)
Name:TP.TPBR.PSIHB.PSI_BRIDGE_BAR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
8:43TP.TPBR.PSIHB.CTRL.HB_BASE_ADDR_Q_8_INST.LATC.L2(8:43) [000000000000000000000000000000000000]
63TP.TPBR.PSIHB.CTRL.HB_BASE_ADDR_VALID_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:7 RO constant=0b00000000
8:43 RWX PSI_BRIDGE_BAR: The Bridge Base Address Register contains the address range which contains the MMIO accessible PSIHB unit registers. Address bits 8 to 43 of the PSI unit base address are specified with this IDial.
44:62 RO constant=0b0000000000000000000
63 RWX PSI_BRIDGE_BAR_EN: this Switch is set to ON to indicate the base address contained in the PSIHB Base Address Register is valid and enabled.

FSPBAR - FSP Base Address Register
Addr: 0000000003011D0B (SCOM)
Name:TP.TPBR.PSIHB.PSI_BRIDGE_FSP_BAR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
8:43TP.TPBR.PSIHB.CTRL.FSP_BASE_ADDR_Q_8_INST.LATC.L2(8:43) [000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RO constant=0b00000000
8:43 RWX FSP_BAR: The FSP Base Address Register contains the address range which contains the MMIO accessible FSP unit registers. Address bits 8 to 43 of the FSP base address are specified with this IDial.

FSPMMR - FSP Memory Mask Register
Addr: 0000000003011D0C (SCOM)
Name:TP.TPBR.PSIHB.PSI_FSP_MMR_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
32:43TP.TPBR.PSIHB.CTRL.FSP_MMR_Q_32_INST.LATC.L2(32:43) [000000000000]
Bit(s)SCOM Dial: Description
0:31 RO constant=0b00000000000000000000000000000000
32:43 RWX FSP_MMR: The FSP Mem ory Mask Register contains the mask which modifies which bits of the FSP Base Address are used in the detection of matching addresses. Bits 32 to 43 of the memory mask are specified with this IDial.

PHBCSR - PSI Host Bridge Control/Status Register
Addr: 0000000003011D0E (SCOM)
0000000003011D12 (SCOM1)
0000000003011D13 (SCOM2)
Name:TP.TPBR.PSIHB.PSIHB_STATUS_CTL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:12TP.TPBR.PSIHB.CTRL.PSIHBC_REG_Q_0_INST.LATC.L2(0:12) [0000000000000]
16:23TP.TPBR.PSIHB.CTRL.PSIHBS_REG1_Q_16_INST.LATC.L2(16:23) [00000000]
32:43TP.TPBR.PSIHB.CTRL.PSIHBS_REG2_Q_32_INST.LATC.L2(32:43) [000000000000]
48:52TP.TPBR.PSIHB.CTRL.PSIHBS_REG3_Q_48_INST.LATC.L2(48:52) [00000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_OR WOX_CLEAR FSP_CMD_ENABLE: When set to 0 , all DMA and Interrupt commands issued by the FSP are ignored by the GX unit. When set to 1 , all DMA and interrupt commands issued by the FSP are accepted and executed.
1 RWX WOX_OR WOX_CLEAR FSP_MMIO_ENABLE: When set to 0 , the FSPBAR is ignored and no MMIO operations are issued to the FSP. When set to 1 , MMIO operations to the FSP memory region defined by the FSPBAR are accepted and transmitted to the FSP.
2 RWX WOX_OR WOX_CLEAR PHBCSR_SPARE: Spare
3 RWX WOX_OR WOX_CLEAR FSP_INT_ENABLE: Enables incoming PSI interrupt commands to interrupt the CEC when set to 1.
4 RWX WOX_OR WOX_CLEAR FSP_ERR_RSP_ENABLE: Enables launch of error response packet from GXC to FSP when errors are detected on incoming DMA commands.
5 RWX WOX_OR WOX_CLEAR PSI_LINK_ENABLE: This bit indicates the PSI link is enabled when set to 1. A 0 indicates the PSI link is disabled.
6 RWX WOX_OR WOX_CLEAR FSP_RESET: When this bit transitions from 0 to 1 , an encoded reset sequence is sent to the FSP.
7 WOX_6P WOX_6P NCX PSIHBC_RESET: When this bit transitions from 0 to 1 , the internal state machines in the GX FSP attach function are erset to idle.
8:11 RWX WOX_OR WOX_CLEAR FSP_MMIO_MASK: This LDial controls the use of system address bits 32:35 when transmitting an address to the FSP. The mask size selected corresponds to an address mask which is ANDed with address bits 32:35 of addresses passed from the CEC to the PSI/FSP. All upper address bits, 18:31, are stripped and replaced with 0s.
Dial enums:
4_GB=>0b1111
2_GB=>0b0111
1_GB=>0b0011
512_MB=>0b0001
256_MB=>0b0000
12 RWX WOX_OR WOX_CLEAR ST_EOI_ENABLE: When this bit is set to 1 , a store in ESB space will trigger a EOI.
13:15 RO RO RO constant=0b000
16 ROX NCX NCX CEC_PSI_INTERRUPT: Read Only - Set to 1 by hardware when an interruption is present in the GXC FSP attachment function.
17 RWX WOX_OR WOX_CLEAR FSP_INTERRUPT: Set to 1 when an Interrupt set command is received from the incoming PSI interface. Set to 0 when an Interrupt reset command is received from the incoming PSI interface.
18 ROX NCX NCX FSP_LINK_ACTIVE: Set to 1 when the PSI link is active and working.
19 ROX NCX NCX FSP_OUTBOUND_ACTIVE: Set to 1 when the outbound queue or controls are busy.
20 ROX NCX NCX FSP_INBOUND_ACTIVE: Set to 1 when the inbound queue or controls are busy.
21 ROX NCX NCX PSIFSP_LOAD_OUTSTANDING: Set to 1 when an MMIO is received, reset when data is delivered to fabric.
22 ROX NCX NCX PSIFSP_DMAR_OUTSTANDING: Set to 1 when a dmar is received, reset when data is delivered to PSI.
23 ROX NCX NCX PSIFSP_INT_BUSY: Set to 1 whenever int state machine is not idle.
24:31 RO RO RO constant=0b00000000
32 ROX NCX NCX PSI_XMIT_ERROR: Set to 1 when the PSI macro detects a fatal error.
33 RWX WOX_OR WOX_CLEAR PSI_LINK_INACTIVE_TRANS: Set to 1 when the PSI link transitions from 1 to 0.
34 RWX WOX_OR WOX_CLEAR PSIFSP_ACK_TIMEOUT: Set when a command to the FSP interface has not been acknowledged within TBD cycles.
35 RWX WOX_OR WOX_CLEAR PSIFSP_MMIO_LOAD_TIMEOUT: Set when a reply packet is not received within TBD cycles after an MMIO is sent to the FSP.
36 RWX WOX_OR WOX_CLEAR PSIFSP_MMIO_LENGTH_ERR: Set when an MMIO is targets the region defined by the PSIBAR and has a length of anything other than 8 bytes.
37 RWX WOX_OR WOX_CLEAR PSIFSP_MMIO_ADDR_ERR: Set when an MMIO operation targets the region defined by the PSIBAR but does not target one of the defined registers.
38 RWX WOX_OR WOX_CLEAR PSIFSP_MMIO_TYPE_ERR: Set when an operation targets the region defined by the PSIBAR or FSPBAR but does not have a valid ttype.
39 RWX WOX_OR WOX_CLEAR PSI_UE: Set when an uncorrectable error is detected on the incoming PSI link.
40 RWX WOX_OR WOX_CLEAR PSIFSP_PERR: Set when a parity error is detected in the PSI FSP attach function.
41 RWX WOX_OR WOX_CLEAR PSI_ALERT1: Set the FSP detects an error with an MMIO command, but is able to continue processing MMIO commands.
42 RWX WOX_OR WOX_CLEAR PSI_ALERT2: Set the FSP detects an error with an MMIO command, and is unable to continue processing MMIO commands.
43 RWX WOX_OR WOX_CLEAR PSIFSP_DMA_ERR: Set the PSIC detects any error with an incoming DMA command.
44:47 RO RO RO constant=0b0000
48 RWX WOX_OR WOX_CLEAR PSIFSP_DMA_ADDR_ERR: Set when a DMA access targets a system memory address that does not exist.
49 RWX WOX_OR WOX_CLEAR PSIFSP_TCE_EXTENT_ERR: Set when a DMA access would result in a TCE fetch beyond the end of the TCE table in system memory.
50 RWX WOX_OR WOX_CLEAR PSIFSP_PAGE_FAULT: Set when a DMA access uses a TCE entry that is inconsistent with the access control bits of the TCE.
51 RWX WOX_OR WOX_CLEAR PSIFSP_INV_OP: Set when an incoming PSI command does not contain a valid opcode.
52 RWX WOX_OR WOX_CLEAR FSP_INV_READ: Set when a read DMA operation is received before read response data has been received for a prior DMA read.

PHBEMR - PSI Host Bridge Error Mask Register
Addr: 0000000003011D0F (SCOM)
Name:TP.TPBR.PSIHB.PSIHB_ERROR_MASK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
16:27TP.TPBR.PSIHB.CTRL.PSISEMR0_REG_Q_16_INST.LATC.L2(16:27) [000000000000]
32:43TP.TPBR.PSIHB.CTRL.PSISEMR1_REG_Q_32_INST.LATC.L2(32:43) [000000000000]
48:52TP.TPBR.PSIHB.CTRL.PSISEMR2_REG_Q_48_INST.LATC.L2(48:52) [00000]
Bit(s)SCOM Dial: Description
0:15 RO constant=0b0000000000000000
16:27 RWX ERROR_DISABLE_1: Any bit when set to 1 prevents hardware from setting the corresponding bit in PSIHBC bits 32:43. Entry into the error state is also prevented.
28:31 RO constant=0b0000
32:43 RWX INTERRUPT_DISABLE: Any bit when set to 1 prevents hardware from signaling an interrupt to the INTP when the corresponding bit in the PSIHBC bits 32:43 is set.
44:47 RO constant=0b0000
48:52 RWX ERROR_DISABLE_2: Any bit when set to 1 prevents hardware from setting the corresponding bit in PSIHBC bits 48:52.

Reserved 2F
Addr: 0000000003011D10 (SCOM)
Name:TP.TPBR.PSIHB.EMPTY_10
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
Bit(s)SCOM Dial: Description
0:63 RO constant=0b0000000000000000000000000000000000000000000000000000000000000000

PHBDSR - PSI Host Bridge Debug Service Register
Addr: 0000000003011D11 (SCOM)
Name:TP.TPBR.PSIHB.PSIHB_DEBUG_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TPBR.PSIHB.CTRL.PHBDSR_FSPEIJ_Q_0_INST.LATC.L2(0:3) [0000]
8:11TP.TPBR.PSIHB.CTRL.PHBDSR_PBEIJ_Q_0_INST.LATC.L2(0:3) [0000]
16:19TP.TPBR.PSIHB.CTRL.PHBDSR_TRACE_Q_0_INST.LATC.L2(0:3) [0000]
Bit(s)SCOM Dial: Description
0:1 RWX PSIHB2FSP_INJ_ERR_BITS: Setting a single bit will cause a correctable error when inject once or constant is set. Setting both bits will cause an uncorrectable error when inject once or constant is set.
2 RWX PSIHB2FSP_INJ_ONCE: This bit will cause a single CE or UE depending on how the error bits are set.
3 RWX PSIHB2FSP_INJ_CONST: This bit will cause a constant CE or UE depending on how the error bits are set.
4:7 RO constant=0b0000
8:9 RWX PSIHB2PB_INJ_ERR_BITS: Setting a single bit will cause a correctable error when inject once or constant is set. Setting both bits will cause an uncorrectable error when inject once or constant is set.
10 RWX PSIHB2PB_INJ_ONCE: This bit will cause a single CE or UE depending on how the error bits are set.
11 RWX PSIHB2PB_INJ_CONST: This bit will cause a constant CE or UE depending on how the error bits are set.
12:15 RO constant=0b0000
16:19 RWX TRACE_SEL: Used to select different sets of signals to be traced.

PHBDSR - DMA ADDR Upper bits
Addr: 0000000003011D14 (SCOM)
Name:TP.TPBR.PSIHB.DMA_UP_ADDR
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7TP.TPBR.PSIHB.CTRL.DMA_UP_ADDR_Q_0_INST.LATC.L2(0:7) [00000000]
16:63TP.TPBR.PSIHB.CTRL.DMA_ESC_ADDR_Q_16_INST.LATC.L2(16:63) [000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RWX DMA_BASE_UPPER_BITS: DMA base upper bits 8:15
8:15 RO constant=0b00000000
16:63 RW DMA_ESCAPE_ADDRESS: DMA escape address 16:63, defaults to FFFFFFFFFFF8. It actually inverts the output of the register to create this default

PSI Host Bridge Interrupt Control Register
Addr: 0000000003011D15 (SCOM)
Name:TP.TPBR.PSIHB.PSIHB_INTERRUPT_CONTROL
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TPBR.PSIHB.CTRL.INT_CTRL_Q_INST.LATC.L2(0) [0]
1TP.TPBR.PSIHB.CTRL.ICS_RESET_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 RWX ESB_OR_LSI_INTERRUPTS: Selects ESB or LSI interrupt handling, 0 - ESB
1 WOX_6P INTERRUPT_SM_RESET: When this bit transitions from 0 to 1 , an encoded reset sequence is sent to the Interrupt.

ESB CI Base address
Addr: 0000000003011D16 (SCOM)
Name:TP.TPBR.PSIHB.ESB_CI_BASE
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
1TP.TPBR.PSIHB.CTRL.ESB_BASE_ENABLE_64K_PAGE_Q_INST.LATC.L2(0) [0]
8:47TP.TPBR.PSIHB.CTRL.ESB_BASE_Q_8_INST.LATC.L2(8:47) [0000000000000000000000000000000000000000]
63TP.TPBR.PSIHB.CTRL.ESB_BASE_VAL_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 RO constant=0b0
1 RWX ESB_BASE_ENABLE_64K_PAGE: ESB CI Base Enable 64K Page size for interrupt
2:7 RO constant=0b000000
8:47 RWX ESB_BASE: ESB CI BASE 8:51
48:62 RO constant=0b000000000000000
63 RWX ESB_BASE_VALID: ESB CI Base valid

ESB Notification address
Addr: 0000000003011D17 (SCOM)
Name:TP.TPBR.PSIHB.ESB_NOTIFY
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
8:60TP.TPBR.PSIHB.CTRL.ESB_NOTF_Q_8_INST.LATC.L2(8:60) [00000000000000000000000000000000000000000000000000000]
63TP.TPBR.PSIHB.CTRL.ESB_NOTF_VAL_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:7 RO constant=0b00000000
8:60 RWX ESB_NOTIFY_ADDR: ESB Notify Address 8:60
61:62 RO constant=0b00
63 RWX ESB_NOTIFY_VALID: ESB Notify Address valid

ESB Notification address
Addr: 0000000003011D18 (SCOM)
Name:TP.TPBR.PSIHB.IVT_OFFSET
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27TP.TPBR.PSIHB.CTRL.IVT_OFF_Q_0_INST.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RWX IVT_OFFSET_PAYLOAD: IVT OFFSET
28:63 RO constant=0b000000000000000000000000000000000000

PSI Interrupt Level Register
Addr: 0000000003011D19 (SCOM)
Name:TP.TPBR.PSIHB.PSIHB_INTERRUPT_LEVEL
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TPBR.PSIHB.CTRL.PSIHB_Q_INST.LATC.L2(0) [0]
1:2TP.TPBR.PSIHB.CTRL.SYNC_AND_FENCE_DOUT_INST.LATC.CSDFFQ1.L2(0:1) [00]
3TP.TPBR.PSIHB.CTRL.LPC_Q_INST.LATC.L2(0) [0]
4:6TP.TPBR.PSIHB.CTRL.SYNC_AND_FENCE_DOUT_INST.LATC.CSDFFQ1.L2(2:4) [000]
7TP.TPBR.PSIHB.CTRL.SER0_Q_INST.LATC.L2(0) [0]
8TP.TPBR.PSIHB.CTRL.SER1_Q_INST.LATC.L2(0) [0]
9TP.TPBR.PSIHB.CTRL.SER2_Q_INST.LATC.L2(0) [0]
12:13TP.TPBR.PSIHB.CTRL.SYNC_AND_FENCE_DOUT_INST.LATC.CSDFFQ1.L2(9:10) [00]
14:16TP.TPBR.PSIHB.CTRL.SYNC_AND_FENCE_DOUT_INST.LATC.CSDFFQ1.L2(6:8) [000]
17:18TP.TPBR.PSIHB.CTRL.SYNC_AND_FENCE_DOUT_INST.LATC.CSDFFQ1.L2(11:12) [00]
19TP.TPBR.PSIHB.CTRL.SYNC_AND_FENCE_DOUT_INST.LATC.CSDFFQ1.L2(5) [0]
Bit(s)SCOM Dial: Description
0 ROX PSI_Interrupt_high
1 ROX OCC_Interrupt_high
2 ROX FSI_Interrupt_high
3 ROX LPC_Interrupt_high
4 ROX LOCAL_Interrupt_high
5 ROX System_attention_high
6 ROX TPM_Interrupt_high
7:10 ROX LPC_other_interrupt_high
11 ROX SBE_or_I2C_Interrupt_high
12 ROX DIO_Interrupt_high
13 ROX PSU_Interrupt_high
14 ROX I2C_C_Interrupt_high
15 ROX I2C_D_Interrupt_high
16 ROX I2C_E_Interrupt_high
17:18 ROX reserved
19 RW pure_SBE_Interrupt_high
20:63 RO constant=0b00000000000000000000000000000000000000000000

PSI Interrupt Status Register
Addr: 0000000003011D1A (SCOM)
Name:TP.TPBR.PSIHB.PSIHB_INTERRUPT_STATUS
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TPBR.PSIHB.CTRL.ESB_PSIHB_Q_0_INST.LATC.L2(0) [0]
1TP.TPBR.PSIHB.CTRL.ESB_OCC_Q_0_INST.LATC.L2(0) [0]
2TP.TPBR.PSIHB.CTRL.ESB_FSI_Q_0_INST.LATC.L2(0) [0]
3TP.TPBR.PSIHB.CTRL.ESB_LPC_Q_0_INST.LATC.L2(0) [0]
4TP.TPBR.PSIHB.CTRL.ESB_CHIP_Q_0_INST.LATC.L2(0) [0]
5TP.TPBR.PSIHB.CTRL.ESB_SYS_Q_0_INST.LATC.L2(0) [0]
6TP.TPBR.PSIHB.CTRL.ESB_TPM_Q_0_INST.LATC.L2(0) [0]
7TP.TPBR.PSIHB.CTRL.ESB_SER0_Q_0_INST.LATC.L2(0) [0]
8TP.TPBR.PSIHB.CTRL.ESB_SER1_Q_0_INST.LATC.L2(0) [0]
9TP.TPBR.PSIHB.CTRL.ESB_SER2_Q_0_INST.LATC.L2(0) [0]
10TP.TPBR.PSIHB.CTRL.ESB_SER3_Q_0_INST.LATC.L2(0) [0]
11TP.TPBR.PSIHB.CTRL.ESB_SBE_Q_0_INST.LATC.L2(0) [0]
12TP.TPBR.PSIHB.CTRL.ESB_DIO_Q_0_INST.LATC.L2(0) [0]
13TP.TPBR.PSIHB.CTRL.ESB_PSU_Q_0_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 ROX PSI_Interrupt_pending
1 ROX OCC_Interrupt_pending
2 ROX FSI_Interrupt_pending
3 ROX LPC_Interrupt_pending
4 ROX LOCAL_Interrupt_pending
5 ROX System_attention
6 ROX TPM_Interrupt_pending
7:10 ROX LPC_other_interrupt_pending
11 ROX SBE_Interrupt_pending
12 ROX DIO_Interrupt_pending
13 ROX PSU_Interrupt_pending
14:63 RO constant=0b00000000000000000000000000000000000000000000000000

Reserved 2F
Addr: 0000000003011D1B (SCOM)
Name:TP.TPBR.PSIHB.EMPTY_1B
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
Bit(s)SCOM Dial: Description
0:63 RO constant=0b0000000000000000000000000000000000000000000000000000000000000000

HCA Fault Isolation Register
Addr: 0000000003011D40 (SCOM)
0000000003011D41 (SCOM1)
0000000003011D42 (SCOM2)
Name:PB_BRIDGE.HCA.FIR_DATA
Constant(s):
Comments:HCA Fault Isolation Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PB_BRIDGE.HCA.REGS.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR RCMD_ADDR_PE_FIR: Powerbus rcmd address parity error
1 RWX WOX_AND WOX_OR RCMD_TTAG_PE_FIR: Powerbus rcmd ttag parity error
2 RWX WOX_AND WOX_OR CRESP_TTAG_PE_FIR: Powerbus cresp ttag parity error
3 RWX WOX_AND WOX_OR CRESP_ATAG_PE_FIR: Powerbus cresp atag parity error
4 RWX WOX_AND WOX_OR UPDT_ADDR_ERR_CRESP_FIR: HCA updt received addr_err cresp
5 RWX WOX_AND WOX_OR UPDT_INVALID_CRESP_FIR: HCA updt received invalid cresp
6 RWX WOX_AND WOX_OR UPDT_UNEXPECTED_CRESP_FIR: HCA updt received unexpected cresp
7 RWX WOX_AND WOX_OR UPDT_HANG_DETECTED_FIR: HCA detected powerbus hang
8 RWX WOX_AND WOX_OR RCMD_MULTIHIT_FIR: HCA rcmd hits both BARs
9 RWX WOX_AND WOX_OR CACHE_ECC_CE_FIR: HCA cache array correctable error
10 RWX WOX_AND WOX_OR CACHE_ECC_UE_FIR: HCA cache array uncorrectable error
11 RWX WOX_AND WOX_OR RCMD_DROP_COUNT_OVERFLOW_FIR: HCA rcmd drop counter overflow
12 RWX WOX_AND WOX_OR UPDT_DROP_COUNT_OVERFLOW_FIR: HCA updt command drop counter overflow
13 RWX WOX_AND WOX_OR UPDT_LOST_DECAY_FIR: HCA updt lost decay request. No pbi machine available.
14 RWX WOX_AND WOX_OR ADU_PSI_SMF_ERROR_FIR: ADU or PSI SMF error
15 RWX WOX_AND WOX_OR SPARE_15_FIR: Spare FIR bit
16 RWX WOX_AND WOX_OR ADU_RECOV_ERR_0_FIR: ADU recoverable error 0
17 RWX WOX_AND WOX_OR ADU_RECOV_ERR_1_FIR: ADU recoverable error 1
18 RWX WOX_AND WOX_OR ADU_RECOV_ERR_2_FIR: ADU recoverable error 2
19 RWX WOX_AND WOX_OR ADU_RECOV_ERR_3_FIR: ADU recoverable error 3
20 RWX WOX_AND WOX_OR ADU_RECOV_ERR_4_FIR: ADU recoverable error 4
21 RWX WOX_AND WOX_OR ADU_RECOV_ERR_5_FIR: ADU recoverable error 5
22 RWX WOX_AND WOX_OR ADU_XSTOP_ERR_0_FIR: ADU checkstop error 0
23 RWX WOX_AND WOX_OR ADU_XSTOP_ERR_1_FIR: ADU checkstop error 1
24 RWX WOX_AND WOX_OR ADU_XSTOP_ERR_2_FIR: ADU checkstop error 2
25 RWX WOX_AND WOX_OR ADU_XSTOP_ERR_3_FIR: ADU checkstop error 3
26 RWX WOX_AND WOX_OR ADU_XSTOP_ERR_4_FIR: ADU checkstop error 4
27 RWX WOX_AND WOX_OR ADU_XSTOP_ERR_5_FIR: ADU checkstop error 5
28:63 RO n/a n/a constant=0b000000000000000000000000000000000000

HCA FIR Mask Register
Addr: 0000000003011D43 (SCOM)
0000000003011D44 (SCOM1)
0000000003011D45 (SCOM2)
Name:PB_BRIDGE.HCA.FIR_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PB_BRIDGE.HCA.REGS.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0:27 RW WO_AND WO_OR FIR_MASK_BITS: HCA FIR Mask Register
28:63 RO n/a n/a constant=0b000000000000000000000000000000000000

HCA FIR Action 0 Register
Addr: 0000000003011D46 (SCOM)
Name:PB_BRIDGE.HCA.FIR_ACTION0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PB_BRIDGE.HCA.REGS.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW FIR_ACTION0_BITS: HCA FIR Action 0 Register
28:63 RO constant=0b000000000000000000000000000000000000

HCA FIR Action 1 Register
Addr: 0000000003011D47 (SCOM)
Name:PB_BRIDGE.HCA.FIR_ACTION1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PB_BRIDGE.HCA.REGS.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RW FIR_ACTION1_BITS: HCA FIR Action 1 Register
28:63 RO constant=0b000000000000000000000000000000000000

HCA FIR WOF Register
Addr: 0000000003011D48 (SCOM)
Name:PB_BRIDGE.HCA.FIR_WOF
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:27PB_BRIDGE.HCA.REGS.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.WOF_LAT_YES.WOF.LATC.L2(0:27) [0000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:27 RWX_WCLRREG FIR_WOF_BITS: HCA FIR WOF Register
28:63 RO constant=0b000000000000000000000000000000000000

HCA Configuration Register
Addr: 0000000003011D4A (SCOM)
Name:PB_BRIDGE.HCA.HCA_CONFIG_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63PB_BRIDGE.HCA.REGS.CONFIG_REGQ.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW HCA_ENABLE: HCA enable. Also used for clock gating.
1 RW PAGE_SIZE_64K: 64K page size
2:9 RW UPDATE_COUNT: Count value that triggers PowerBus update command to MC
Dial enums:
4096=>0b00000000
2048=>0b10000000
1024=>0b11000000
512=>0b11100000
256=>0b11110000
128=>0b11111000
64=>0b11111100
32=>0b11111110
16=>0b11111111
10:11 RW SAMPLE_RATE: Sample every N PowerBus reflected commands
Dial enums:
1TO1=>0b00
1OF16=>0b01
1OF32=>0b10
DYNAMIC=>0b11
12:23 RW CONFIG_RESERVED_12_23: Reserved bits
24:31 RW DYNAMIC_SAMPLE_PERIOD: Number of cycles * 256 in which to count HCA update commands sent to fabric. Only used when dynamic sampling is enabled.
32:39 RW DYNAMIC_UPPER_THRESHOLD: When more than this number of commands are sent, sampling rate is reduced. Only used when dynamic sampling is enabled.
40:47 RW DYNAMIC_LOWER_THRESHOLD: When fewer than this number of commands are sent, sampling rate is increased. Only used when dynamic sampling is enabled.
48 RW CONFIG_RESERVED_48: Reserved bit
49 RW DISABLE_G_SCOPE: Commands can't go out with Group scope
50 RW DISABLE_VG_NOT_SYS_SCOPE: Commands with Vg scope don't use predictor. Forced to Vg(sys).
51:55 RW HANG_POLL_SCALE: Number of fabric hang_poll commands to skip
56:63 RW VG_TIMER_MASK: Timer for command scope predictor
Dial enums:
64K=>0b11111111
32K=>0b11111110
16K=>0b11111100
8K=>0b11111000
4K=>0b11110000
2K=>0b11100000
1K=>0b11000000
512=>0b10000000

HCA Control Register
Addr: 0000000003011D4B (SCOM)
Name:PB_BRIDGE.HCA.HCA_CONTROL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1PB_BRIDGE.HCA.REGS.START_INVALIDATEQ.LATC.L2(0:1) [00]
4:15PB_BRIDGE.HCA.REGS.CONTROL_REGQ.LATC.L2(0:11) [000000000000]
63PB_BRIDGE.HCA.REGS.RESET_ERRRPTQ.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:1 WOX START_INVALIDATE: Start cache invalidate sequence for corresponding monitor regions.
Dial enums:
REGION0=>0b10
REGION1=>0b01
BOTH=>0b11
2:3 RO constant=0b00
Dial enums:
REGION0=>0b10
REGION1=>0b01
BOTH=>0b11
4 RW ERRINJ_ENABLE: Array error inject enable
5 RW ERRINJ_ACTION: Array error inject action. 0:single write. 1:all writes
6 RW ERRINJ_MODE: Array error inject mode. 0:single error (CE). 1:double error (UE)
7:9 RW ERRINJ_SELECT: Array error inject select. Cache way 0-7
10:11 RW
12:15 RW TRACE_SELECT: Trace bus select
16:62 RO constant=0b00000000000000000000000000000000000000000000000
63 WOX RESET_ERRRPT: Clear all c_err_rpt hold latches.

HCA Status Register
Addr: 0000000003011D4C (SCOM)
Name:PB_BRIDGE.HCA.HCA_STATUS_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1PB_BRIDGE.HCA.REGS.MNTR_RCMD_BUSYQ.LATC.L2(0:1) [00]
2:3PB_BRIDGE.HCA.REGS.UPDT_DECAY_PENDINGQ.LATC.L2(0:1) [00]
4PB_BRIDGE.HCA.REGS.UPDT_PBI_BUSYQ.LATC.L2(0) [0]
8:9PB_BRIDGE.HCA.REGS.CACH_INVALIDATE_BUSYQ.LATC.L2(0:1) [00]
Bit(s)SCOM Dial: Description
0:1 ROX RCMD_BUSY: Reflected command in monitor pipeline.
2:3 ROX DECAY_PENDING: Decay command awaiting powerbus machine.
4 ROX PBI_BUSY: PowerBus Interface machine is busy.
5:7 RO constant=0b000
8:9 ROX INVALIDATE_BUSY: Cache invalidate sequence in progress.
10:63 RO constant=0b000000000000000000000000000000000000000000000000000000

HCA Monitor 0 Base Address Register
Addr: 0000000003011D4D (SCOM)
Name:PB_BRIDGE.HCA.HCA_MONITOR_0_ADDRESS_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:46PB_BRIDGE.HCA.REGS.ADDRESS0_REGQ.LATC.L2(0:46) [00000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW MONITOR_0_ENABLE: HCA Monitor 0 enable
1:12 RW
13:29 RW MONITOR_0_ADDRESS: HCA Monitor 0 address(13:29) match HCA Monitor 0 size
30:31 RW
32:46 RW MONITOR_0_SIZE:
Dial enums:
16GB=>0b000000000000000
32GB=>0b000000000000001
64GB=>0b000000000000011
128GB=>0b000000000000111
256GB=>0b000000000001111
512GB=>0b000000000011111
1TB=>0b000000000111111
2TB=>0b000000001111111
4TB=>0b000000011111111
8TB=>0b000000111111111
16TB=>0b000001111111111
32TB=>0b000011111111111
64TB=>0b000111111111111
128TB=>0b001111111111111
256TB=>0b011111111111111
512TB=>0b111111111111111
47:63 RO constant=0b00000000000000000
Dial enums:
16GB=>0b000000000000000
32GB=>0b000000000000001
64GB=>0b000000000000011
128GB=>0b000000000000111
256GB=>0b000000000001111
512GB=>0b000000000011111
1TB=>0b000000000111111
2TB=>0b000000001111111
4TB=>0b000000011111111
8TB=>0b000000111111111
16TB=>0b000001111111111
32TB=>0b000011111111111
64TB=>0b000111111111111
128TB=>0b001111111111111
256TB=>0b011111111111111
512TB=>0b111111111111111

HCA Monitor 1 Base Address Register
Addr: 0000000003011D4E (SCOM)
Name:PB_BRIDGE.HCA.HCA_MONITOR_1_ADDRESS_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:46PB_BRIDGE.HCA.REGS.ADDRESS1_REGQ.LATC.L2(0:46) [00000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW MONITOR_1_ENABLE: HCA monitor 1 enable
1:12 RW
13:29 RW MONITOR_1_ADDRESS: HCA monitor 1 address(13:29) match HCA monitor 1 size
30:31 RW
32:46 RW MONITOR_1_SIZE:
Dial enums:
16GB=>0b000000000000000
32GB=>0b000000000000001
64GB=>0b000000000000011
128GB=>0b000000000000111
256GB=>0b000000000001111
512GB=>0b000000000011111
1TB=>0b000000000111111
2TB=>0b000000001111111
4TB=>0b000000011111111
8TB=>0b000000111111111
16TB=>0b000001111111111
32TB=>0b000011111111111
64TB=>0b000111111111111
128TB=>0b001111111111111
256TB=>0b011111111111111
512TB=>0b111111111111111
47:63 RO constant=0b00000000000000000
Dial enums:
16GB=>0b000000000000000
32GB=>0b000000000000001
64GB=>0b000000000000011
128GB=>0b000000000000111
256GB=>0b000000000001111
512GB=>0b000000000011111
1TB=>0b000000000111111
2TB=>0b000000001111111
4TB=>0b000000011111111
8TB=>0b000000111111111
16TB=>0b000001111111111
32TB=>0b000011111111111
64TB=>0b000111111111111
128TB=>0b001111111111111
256TB=>0b011111111111111
512TB=>0b111111111111111

HCA Monitor 0 Counter Address Register
Addr: 0000000003011D4F (SCOM)
Name:PB_BRIDGE.HCA.HCA_MONITOR_0_COUNTER_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
13:42PB_BRIDGE.HCA.REGS.COUNT0_REGQ.LATC.L2(13:42) [000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:12 RO constant=0b0000000000000
13:42 RW MONITOR_0_COUNTER: HCA region 0 Counter address(13:42)
43:63 RO constant=0b000000000000000000000

HCA Monitor 1 Counter Address Register
Addr: 0000000003011D50 (SCOM)
Name:PB_BRIDGE.HCA.HCA_MONITOR_1_COUNTER_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
13:42PB_BRIDGE.HCA.REGS.COUNT1_REGQ.LATC.L2(13:42) [000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:12 RO constant=0b0000000000000
13:42 RW MONITOR_1_COUNTER: HCA region 1 Counter address(13:42)
43:63 RO constant=0b000000000000000000000

HCA Decay 0 Control Register
Addr: 0000000003011D51 (SCOM)
Name:PB_BRIDGE.HCA.HCA_DECAY_0_CONTROL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:6PB_BRIDGE.HCA.REGS.DECAYCTRL0_REGQ.LATC.L2(0:6) [0000000]
Bit(s)SCOM Dial: Description
0 RW DECAY_0_ENABLE: HCA region 0 Decay Enable
1:6 RW DECAY_0_DELAY: HCA region 0 Decay delay. Equal to (2^value) hang pulses (16ns). 6 bit value.
7:63 RO constant=0b000000000000000000000000000000000000000000000000000000000

HCA Decay 0 Address Register
Addr: 0000000003011D52 (SCOM)
Name:PB_BRIDGE.HCA.HCA_DECAY_0_ADDRESS_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
24:56PB_BRIDGE.HCA.REGS.DECAYADDR0_REGQ.LATC.L2(0:32) [000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RO constant=0b000000000000000000000000
24:56 RWX DECAY_0_ADDRESS: HCA region 0 Decay address bits 24:56
57:63 RO constant=0b0000000

HCA Decay 1 Control Register
Addr: 0000000003011D53 (SCOM)
Name:PB_BRIDGE.HCA.HCA_DECAY_1_CONTROL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:6PB_BRIDGE.HCA.REGS.DECAYCTRL1_REGQ.LATC.L2(0:6) [0000000]
Bit(s)SCOM Dial: Description
0 RW DECAY_1_ENABLE: HCA region 1 Decay Enable
1:6 RW DECAY_1_DELAY: HCA region 1 Decay delay. Equal to (2^value) hang pulses (16ns). 6 bit value
7:63 RO constant=0b000000000000000000000000000000000000000000000000000000000

HCA Decay 1 Address Register
Addr: 0000000003011D54 (SCOM)
Name:PB_BRIDGE.HCA.HCA_DECAY_1_ADDRESS_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
24:56PB_BRIDGE.HCA.REGS.DECAYADDR1_REGQ.LATC.L2(0:32) [000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:23 RO constant=0b000000000000000000000000
24:56 RWX DECAY_1_ADDRESS: HCA region 1 Decay address bits 24:56
57:63 RO constant=0b0000000

HCA Drop Count Register
Addr: 0000000003011D55 (SCOM)
Name:PB_BRIDGE.HCA.HCA_DROP_COUNT_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31PB_BRIDGE.HCA.REGS.RCMD_DROP_COUNTERQ.LATC.L2(0:31) [00000000000000000000000000000000]
32:63PB_BRIDGE.HCA.REGS.UPDT_DROP_COUNTERQ.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 ROX RCMD_DROP_COUNT: HCA reflected command drop count
32:63 ROX UPDATE_DROP_COUNT: HCA update command drop count

HCA Error Report Hold Register
Addr: 0000000003011D56 (SCOM)
Name:PB_BRIDGE.HCA.HCA_ERRRPT_HOLD_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:43PB_BRIDGE.HCA.REGS.ERR_RPTQ.HOLD_LATCH_INST.HOLD.LATC.L2(0:43) [00000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:43 ROX ERRRPT_HOLD: HCA errrpt hold register
44:63 RO constant=0b00000000000000000000

HCA Chickenswitch Control Register
Addr: 0000000003011D57 (SCOM)
Name:PB_BRIDGE.HCA.HCA_CHSW_CTRL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15PB_BRIDGE.HCA.REGS.CHSWCTRL_REGQ.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0:11 RW CHSW_TTYPE_MASK: Rcmd ttype mask
12:13 RW CHSW_PBIFSM_LIMIT: Limit number of PBI machines to be used
Dial enums:
MAX8=>0b00
MAX4=>0b01
MAX2=>0b10
MAX1=>0b11
14:15 RW CHSW_SPARE: Spare bits
16:63 RO constant=0b000000000000000000000000000000000000000000000000

PBA Local Fault Isolation Register
Addr: 0000000003011DC0 (SCOM)
0000000003011DC1 (SCOM1)
0000000003011DC2 (SCOM2)
Name:TP.TPBR.PBA.PBAF.PBAFIR
Constant(s):
Comments:PBA Local Fault Isolation Register. Register bits are set for any error condition detected by the PBA. The PBAFIR will freeze upon logging the first error not masked in PBAFIRMASK.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39TP.TPBR.PBA.PBAF.SCOM.LSCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR PBAFIR_PB_RDADRERR_FW: PB CRESP Addr Error Received for Forwarded Read Request.
PowerBus request by PBA for a forwarded OCI Read Request received a CRESP error response.
See PBAERRRPT0 for per-queue information.
The Buffer allocated for this request will continue unless PBACFG[chsw_hang_on_adrerror] = 1.
addr_error combined response
1 RWX WOX_AND WOX_OR PBAFIR_PB_RDDATATO_FW: PB Read Data Timeout for Forwarded Request
PowerBus Read Request for a forwarded OCI Request timed out waiting for data. PBA is reporting a data hang condition to the PowerBus.
The Buffer allocated for this request is hung and may be reset by following the PBA Slave Reset Sequence.
See PBAERRRPT0 for per-queue information.
2 RWX WOX_AND WOX_OR PBAFIR_PB_SUE_FW: PB Read Data SUE Error for Forwarded Request
PowerBus Read data for a forwarded OCI Request contained SUE Error.
3 RWX WOX_AND WOX_OR PBAFIR_PB_UE_FW: PB Read Data UE Error for Forwarded Request
PowerBus Read data for a forwarded OCI Request contained UE Error.
4 RWX WOX_AND WOX_OR PBAFIR_PB_CE_FW: PB Read Data CE Error for Forwarded Request
PowerBus Read data for a forwarded OCI Request contained CE Error.
5 RWX WOX_AND WOX_OR PBAFIR_PB_UNEXPCRESP: PB Unexpected CRESP
PowerBus Combined Response was received unexpectedly with PBA transfer tag. . Response is ignored. See PBAERRRPT0 for per-queue information.
6 RWX WOX_AND WOX_OR PBAFIR_PB_UNEXPDATA: PB Unexpected Data
PowerBus data received for transaction ID that was not expecting data. Data is ignored. This does not check for duplicate OW_ID. See PBAERRRPT0 for
per-queue information.
7 RWX WOX_AND WOX_OR PBAFIR_PB_PARITY_ERR: PB Tag parity Error Detected
Powerbus CRESP TTAG, ATAG, or DPX RTAG Parity error detected. FIR set only.
8 RWX WOX_AND WOX_OR PBAFIR_PB_WRADRERR_FW: PB CRESP Addr Error Received for Forwarded Write Request
PowerBus request by PBA for a forwarded OCI Write Request received a CRESP error response. See PBAERRRPT0 for per-queue information.
addr_error combined response
9 RWX WOX_AND WOX_OR PBAFIR_PB_BADCRESP: PB Invalid CRESP
An invalid CRESP was received for a pending request. PBA will retry the request unless PBACFG[chsw_hang_on_invalid_cresp]=1.
See PBAERRRPT1 for per-queue information.
10 RWX WOX_AND WOX_OR PBAFIR_PB_ACKDEAD_FW_RD: PB CRESP ACK Dead response received for Forwarded Read request to a foreign link. The Buffer allocated for this request will continue unless
PBACFG[chsw_hang_on_adrerror] = 1.
See PBAERRRPT0 for per-queue information.
11 RWX WOX_AND WOX_OR PBAFIR_PB_OPERTO: PB OPERATIONAL Timeout detected when PBACFG[EXIT_ON_HANG]=1. The powerbus request is terminated so the OCI request can complete.
See PBAERRRPT1 for per queue information.
12 RWX WOX_AND WOX_OR PBAFIR_BCUE_PB_ACK_DEAD: BCUE PowerBus Link Dead
ack_dead combined response for PowerBus Write
13 RWX WOX_AND WOX_OR PBAFIR_BCUE_PB_ADRERR: PB CRESP Addr Error Received for BCUE Write Request
addr_error combined response
14 RWX WOX_AND WOX_OR PBAFIR_BCDE_PB_ACK_DEAD: BCDE PowerBus Link Dead
ack_dead combined response for PowerBus Read
15 RWX WOX_AND WOX_OR PBAFIR_BCDE_PB_ADRERR: PB CRESP Addr Error Received for BCDE Read Request
addr_error combined response
16 RWX WOX_AND WOX_OR PBAFIR_BCDE_RDDATATO_ERR: PB Read Data Timeout for BCDE Request
PowerBus Read Request for a BCDE Request timed out waiting for data. Timer is based on the hang pulse.
17 RWX WOX_AND WOX_OR PBAFIR_BCDE_SUE_ERR: PB Read Data SUE Error for BCDE Request
PowerBus Read data for a BCDE Request contained SUE Error.
18 RWX WOX_AND WOX_OR PBAFIR_BCDE_UE_ERR: PB Read Data UE Error for BCDE Request
PowerBus Read data for a BCDE Request contained UE Error.
19 RWX WOX_AND WOX_OR PBAFIR_BCDE_CE: PB Read Data CE Error for BCDE Request
PowerBus Read data for a BCDE Request contained CE Error.
20 RWX WOX_AND WOX_OR PBAFIR_INTERNAL_ERR: Internal Logic Error. See PBAERRRPT2 for more detailed information.
21 RWX WOX_AND WOX_OR PBAFIR_ILLEGAL_CACHE_OP: Byte count is less than full cache line: Write operation did not start gathering on a cache line boundary OR the write address was not contiguous
before writing the full cache line.
22 RWX WOX_AND WOX_OR PBAFIR_AXRCV_DLO_ERR: PBAXRCV Low data before High Data. See PBAXRCVSTAT[rcv_capture] for more information.
23 RWX WOX_AND WOX_OR PBAFIR_AXRCV_DLO_TO: PBAXRCV Low data timeout. See PBAXRCVSTAT[rcv_capture] for more information.
24 RWX WOX_AND WOX_OR PBAFIR_AXRCV_RSVDATA_TO: PBAXRCV Reservation data timeout. Reservation acquired but phase1 data never seen. This could happen if PBAXSND is unable to get access to the
powerbus. See PBAXRCVSTAT[rcv_capture] for more information.
25 RWX WOX_AND WOX_OR PBAFIR_AXFLOW_ERR: Illegal PBAX Flow. See PBAERRRPT2 for more info
Per queue Push queue overflow: PBAXRCV decode but Push Q is full
26 RWX WOX_AND WOX_OR PBAFIR_AXSND_DHI_RTYTO: PBAXSND engine retry threshold reached sending Phase 1
27 RWX WOX_AND WOX_OR PBAFIR_AXSND_DLO_RTYTO: PBAXSND engine retry threshold reached sending Phase 2
28 RWX WOX_AND WOX_OR PBAFIR_AXSND_RSVTO: PBAXSND Reservation Timeout
29 RWX WOX_AND WOX_OR PBAFIR_PB_ACKDEAD_FW_WR: PB CRESP ACK Dead response received for Forwarded Write request to a foreign link. The Buffer allocated for this request will continue unless
PBACIFG[chsw_hang_on_adrerror] = 1.
See PBAERRRPT0 for per-queue information.
30 RWX WOX_AND WOX_OR PBAFIR_AXIRCV_DLO_ERR: PBAXIRCV Low data before High Data. See PBAXIRCVSTAT[rcv_capture] for more information.
31 RWX WOX_AND WOX_OR PBAFIR_AXIRCV_DLO_TO: PBAXIRCV Low data timeout. See PBAXIRCVSTAT[rcv_capture] for more information.
32 RWX WOX_AND WOX_OR PBAFIR_AXIRCV_RSVDATA_TO: PBAXIRCV Reservation data timeout. Reservation acquired but phase1 data never seen. This could happen if PBAXISND is unable to get access to the
powerbus. See PBAXIRCVSTAT[rcv_capture] for more information.
33 RWX WOX_AND WOX_OR PBAFIR_AXIFLOW_ERR: Illegal PBAX Flow. See PBAERRRPT2 for more info.
Per queue Push queue overflow: PBAXIRCV decode but Push Q is full
34 RWX WOX_AND WOX_OR PBAFIR_AXISND_DHI_RTYTO: PBAXISND engine retry threshold reached sending Phase 1
35 RWX WOX_AND WOX_OR PBAFIR_AXISND_DLO_RTYTO: PBAXISND engine retry threshold reached sending Phase 2
36 RWX WOX_AND WOX_OR PBAFIR_AXISND_RSVTO: PBAXISND Reservation Timeout
37 RWX WOX_AND WOX_OR PBAFIR_RESERVED_37: Spare
38 RWX WOX_AND WOX_OR PBAFIR_RESERVED_38: Spare
39 RWX WOX_AND WOX_OR PBAFIR_RESERVED_39: Spare
40:63 RO RO RO constant=0b000000000000000000000000

PBA Local Fault Isolation Mask Register
Addr: 0000000003011DC3 (SCOM)
0000000003011DC4 (SCOM1)
0000000003011DC5 (SCOM2)
Name:TP.TPBR.PBA.PBAF.PBAFIRMASK
Constant(s):
Comments:PBA Local Fault Isolation Mask Register. Reset value of PBAFIRMSK set according to RAS FIR Review for DD1.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39TP.TPBR.PBA.PBAF.SCOM.LSCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_AND WO_OR PBAFIRMASK_PB_RDADRERR_FW_MASK: pb_rdadrerr_fw_mask
1 RW WO_AND WO_OR PBAFIRMASK_PB_RDDATATO_FW_MASK: pb_rddatato_fw_mask
2 RW WO_AND WO_OR PBAFIRMASK_PB_SUE_FW_MASK: pb_sue_fw_mask
3 RW WO_AND WO_OR PBAFIRMASK_PB_UE_FW_MASK: pb_ue_fw_mask
4 RW WO_AND WO_OR PBAFIRMASK_PB_CE_FW_MASK: pb_ce_fw_mask
5 RW WO_AND WO_OR PBAFIRMASK_PB_UNEXPCRESP_MASK: pb_unexpcresp_mask
6 RW WO_AND WO_OR PBAFIRMASK_PB_UNEXPDATA_MASK: pb_unexpdata_mask
7 RW WO_AND WO_OR PBAFIRMASK_PB_PARITY_ERR_MASK: pb_parity_err_mask
8 RW WO_AND WO_OR PBAFIRMASK_PB_WRADRERR_FW_MASK: pb_wradrerr_fw_mask
9 RW WO_AND WO_OR PBAFIRMASK_PB_BADCRESP_MASK: pb_badcresp_mask
10 RW WO_AND WO_OR PBAFIRMASK_PB_ACKDEAD_FW_RD_MASK: pb_ackdead_fw_rd_mask
11 RW WO_AND WO_OR PBAFIRMASK_PB_OPERTO_MASK: pb_operto_mask
12 RW WO_AND WO_OR PBAFIRMASK_BCUE_PB_ACK_DEAD_MASK: bcue_pb_ack_dead_mask
13 RW WO_AND WO_OR PBAFIRMASK_BCUE_PB_ADRERR_MASK: bcue_pb_adrerr_mask
14 RW WO_AND WO_OR PBAFIRMASK_BCDE_PB_ACK_DEAD_MASK: bcde_pb_ack_dead_mask
15 RW WO_AND WO_OR PBAFIRMASK_BCDE_PB_ADRERR_MASK: bcde_pb_adrerr_mask
16 RW WO_AND WO_OR PBAFIRMASK_BCDE_RDDATATO_ERR_MASK: bcde_rddatato_err_mask
17 RW WO_AND WO_OR PBAFIRMASK_BCDE_SUE_ERR_MASK: bcde_sue_err_mask
18 RW WO_AND WO_OR PBAFIRMASK_BCDE_UE_ERR_MASK: bcde_ue_err_mask
19 RW WO_AND WO_OR PBAFIRMASK_BCDE_CE_MASK: bcde_ce_mask
20 RW WO_AND WO_OR PBAFIRMASK_INTERNAL_ERR_MASK: internal_err_mask
21 RW WO_AND WO_OR PBAFIRMASK_ILLEGAL_CACHE_OP_MASK: illegal_cache_op_mask
22 RW WO_AND WO_OR PBAFIRMASK_AXRCV_DLO_ERR_MASK: axrcv_dlo_err_mask
23 RW WO_AND WO_OR PBAFIRMASK_AXRCV_DLO_TO_MASK: axrcv_dlo_to_mask
24 RW WO_AND WO_OR PBAFIRMASK_AXRCV_RSVDATA_TO_MASK: axrcv_rsvdata_to_mask
25 RW WO_AND WO_OR PBAFIRMASK_AXFLOW_ERR_MASK: axflow_err_mask
26 RW WO_AND WO_OR PBAFIRMASK_AXSND_DHI_RTYTO_MASK: axsnd_dhi_rtyto_mask
27 RW WO_AND WO_OR PBAFIRMASK_AXSND_DLO_RTYTO_MASK: axsnd_dlo_rtyto_mask
28 RW WO_AND WO_OR PBAFIRMASK_AXSND_RSVTO_MASK: axsnd_rsvto_mask
29 RW WO_AND WO_OR PBAFIRMASK_PB_ACKDEAD_FW_WR_MASK: pb_ackdead_fw_wr_mask
30 RW WO_AND WO_OR PBAFIRMASK_AXIRCV_DLO_ERR_MASK: axircv_dlo_err_mask
31 RW WO_AND WO_OR PBAFIRMASK_AXIRCV_DLO_TO_MASK: axircv_dlo_to_mask
32 RW WO_AND WO_OR PBAFIRMASK_AXIRCV_RSVDATA_TO_MASK: axircv_rsvdata_to_mask
33 RW WO_AND WO_OR PBAFIRMASK_AXIFLOW_ERR_MASK: axiflow_err_mask
34 RW WO_AND WO_OR PBAFIRMASK_AXISND_DHI_RTYTO_MASK: axisnd_dhi_rtyto_mask
35 RW WO_AND WO_OR PBAFIRMASK_AXISND_DLO_RTYTO_MASK: axisnd_dlo_rtyto_mask
36 RW WO_AND WO_OR PBAFIRMASK_AXISND_RSVTO_MASK: axisnd_rsvto_mask
37:39 RW WO_AND WO_OR PBAFIRMASK_RESERVED_37_39: Reserved
40:63 RO RO RO constant=0b000000000000000000000000

PBA FIR Action0
Addr: 0000000003011DC6 (SCOM)
Name:TP.TPBR.PBA.PBAF.PBAFIRACT0
Constant(s):
Comments:PBA Local Fault Isolation Action0 Register. All Errors are configured as Recoverable in this register by the hardware as the default value.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39TP.TPBR.PBA.PBAF.SCOM.LSCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PBAFIRACT0_FIR_ACTION0: MSB of action select for corresponding bit in FIR
(Action0, Action1, Mask) = Action Select
(0,0,0) = Checkstop Error (PBA_TC_XSTOP)
(0,1,0) = Recoverable Error (PBA_TC_RECOV)
(1,0,0) = N/A
(1,1,0) = N/A
(x,x,1) = MASKED
40:63 RO constant=0b000000000000000000000000

PBA FIR Action1
Addr: 0000000003011DC7 (SCOM)
Name:TP.TPBR.PBA.PBAF.PBAFIRACT1
Constant(s):
Comments:OCC Local Fault Isolation Action1 Register. All Errors are configured as Recoverable in this register by the hardware as the default value.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:39TP.TPBR.PBA.PBAF.SCOM.LSCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:39) [0000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:39 RW PBAFIRACT1_FIR_ACTION1: MSB of action select for corresponding bit in FIR
(Action0, Action1, Mask) = Action Select
(0,0,0) = Checkstop Error (PBA_TC_XSTOP)
(0,1,0) = Recoverable Error (PBA_TC_RECOV)
(1,0,0) = N/A
(1,1,0) = N/A
(x,x,1) = MASKED
40:63 RO constant=0b000000000000000000000000

PBA Configuration Register for Fabric
Addr: 0000000003011DCB (SCOM)
Name:TP.TPBR.PBA.PBAF.PBAFCFG
Constant(s):
Comments:This register is used to setup system-specific settings for the PowerBus and for Debug Chicken Switches
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:47TP.TPBR.PBA.PBAF.SCOM.PBAF_CFG_Q_0_INST.LATC.L2(0:47) [000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW PBAFCFG_PBREQ_SLVFW_MAX_PRIORITY: Max PowerBus Drop Priority for Forwarded requests
This bit controls the Maximum PowerBus Drop Priority that can be used to forward OCI requests. It should be set to HI.

Dial enums:
LOW=>0b0
HI=>0b1
1 RW PBAFCFG_PBREQ_EXIT_ON_HANG: Exit PowerBus Rd/Wr Op on Operational Hang
When set, the PBA will abort a powerbus Read or Write request using the tc_pba_hang_pulse detected when a powerbus command is outstanding. (new for
P9)
2 RW PBAFCFG_PBREQ_BCE_MAX_PRIORITY: Max PowerBus Drop Priority for Block Copy Engine requests
This bit controls the Maximum PowerBus Drop Priority that can be used by the Block copy Engine. It should be set to HI.

Dial enums:
LOW=>0b0
HI=>0b1
3 RW PBAFCFG_PBREQ_EXIT_ON_HANG_PBAX: Exit PowerBus PBAX Op on Operational Hang
When set, the PBA will abort a powerbus PBAX request using the tc_pba_hang_pulse detected when a powerbus command is outstanding. (new for P9)
4:8 RW PBAFCFG_PBREQ_DATA_HANG_DIV: PowerBus Data Hang Timeout Divider.
Initializes when clocks are started. Divides the PowerBus Data hang pulse to control the Read Data Timeout.
9:13 RW PBAFCFG_PBREQ_OPER_HANG_DIV: PowerBus Operational Hang Timeout Divider.
Initializes when clocks are started. Divides the PowerBus Operational hang pulse to control the Livelock/hang rty_other response to the PowerBus Hang
Check command.
14:19 RW PBAFCFG_PBREQ_DROP_PRIORITY_MASK: PowerBus Drop Priority Mask
Mask to control the probability that a request that received a rty_drop cresp should increase its priority. Mask bits control probability from 1:1
(all ones) to 64:1 (all zeroes)
20:23 RW PBAFCFG_PBREQ_EXIT_HANG_DIV: PowerBus Exit Hang divider.
Initializes to zero when clocks are started. Used for the upper 4 bits of a 5-bit divider of the tc_pba_hang pulse to use for the exit_hang function
enabled in pbreq_exit_on_hang and/or pbreq_exit_on_hang_pbax.
24 RW PBAFCFG_CHSW_DIS_OPER_HANG: Disable Operational Hang Pulse preventing PowerBus Livelock Warning
25 RW PBAFCFG_CHSW_DIS_DATA_HANG: Disable Data Hang pulse preventing PowerBus Timeout.
26 RW PBAFCFG_CHSW_DIS_ECC_CHECK: Disable ECC Checking on inbound PowerBus data
27 RW PBAFCFG_CHSW_DIS_RETRY_BACKOFF: Disable Retry Backoff on PowerBus
28 RW PBAFCFG_CHSW_EXIT_ON_INVALID_CRESP: Enable Exit on Invalid PowerBus CRESP. (otherwise will retry)
29 RW PBAFCFG_RESERVED_29: Spare
30 RW PBAFCFG_CHSW_DIS_GROUP_SCOPE: Disable Group Scope
Used to eliminate Group Scope for debug/problem workaround. If the starting scope or an increased scope from a nodal scope is required, the scopeis
Vg(S).
31 RW PBAFCFG_CHSW_DIS_RTAG_PARITY_CHK: Disable Powerbus parity check on dpx_rtag. Only used in designer sim.
32 RW PBAFCFG_CHSW_DIS_PB_PARITY_CHK: Disable PowerBus parity check on rcmd0 addr, cresp atag and ttag. Only used in designer sim.
33 RW PBAFCFG_CHSW_SKIP_GROUP_SCOPE: Skip group scope on rty_inc .
Does not eliminate Group scope. Used in a chip=group to control the masters scope progression. On a rty_inc, next scope is Vg(S).
34 RW PBAFCFG_CHSW_USE_PR_DMA_INJ: Force pr_dma_inj as default
Controls the starting powerbus write ttype to use when PBASLVCTL[write_ttype]=DMA for a partial cache line op. (new for P9)
0-- Starting ttype is dma_pr_w
1-- Starting ttype is pr_dma_inj.
35 RW PBAFCFG_CHSW_USE_CL_DMA_INJ: Force cl_dma_inj as default
Controls the starting powerbus write ttype to use when PBASLVCTL[write_ttype]=DMA for a cache line op. (new for P9)
0-- Starting ttype is cl_dma_w
1-- Starting ttype is cl_dma_inj.
36:37 RW PBAFCFG_PBREQ_EVENT_MUX: PB Event Select
These bits control which PowerBus events are muxed to the event counters.
Only Counters 0 and 1 are used.
00 - count rty_inc CRESP and rty_drp CRESP
01 - count cycles waiting for CMD Grant and Data Write Grant
10 - count PBAX RCV Asserting rty_other for reservation/not reservation
11 - count PBAXI RCV Asserting rty_other for reservation/not reservation
38 RW PBAFCFG_EN_EVENT_COUNT: Enable Event Counter
This bit enables the first 2 PBAPBOCRn counters to be re-purposed as Even counters. The PBAFCFG[dis_chgrate_count] must also be set
39 RW PBAFCFG_DIS_CHGRATE_COUNT: Disable CHGRATE Counters
OFF - (default) CHGRATE Counters are Enabled.
PBAFCFG[en_event_count] must also be zero
ON - Freeze the CHGRATE counters. If PBAFCFG[en_event_count]=1, the counters are re-purposed as event counters
40 RW PBAFCFG_HTM_ENABLE: Enable the asynchronous queue to transfer HTM records to the nest domain. Must also set PBAOCFG[HTM_ENABLE]
41 RW PBAFCFG_TRACE_ENABLE: Enable the trace output latches to log PBA FBC data to an external trace array.
42 RW PBAFCFG_DEBUG_TRACE_SEL: 0 - select PBAXI trace information, 1 - select PBSNR trace information
43 RW PBAFCFG_RESERVED_43: Spare
44:45 RWX PBAFCFG_INJECT_MODE: Configure Error Injection Mode
These bits may be written at any time to setup the error injection mode for PowerBus Inbound Read Data. When doing Single Error Inject, the CE/UE/SUE
error bits in the FIR must be cleared before another error can be injected. Addionally, the bits are cleared when the CE/UE/SUE bits in FIR are set

Dial enums:
NONE=>0b00
SOLID=>0b01
SINGLE=>0b10
NOT_VALID=>0b11
46:47 RW PBAFCFG_INJECT_TYPE: Configure Error injection type
These bits may be written at any time to setup the error injection type on PowerBus Inbound Read Data.

Dial enums:
CE=>0b00
UE=>0b01
SUE=>0b10
48:63 RO constant=0b0000000000000000
Dial enums:
CE=>0b00
UE=>0b01
SUE=>0b10

PBA Error Report 0 Register
Addr: 0000000003011DCC (SCOM)
Name:TP.TPBR.PBA.PBAF.PBAERRRPT0
Constant(s):
Comments:PBA Error Report Register 0 (read/clear c_err_rpt) shows the hold condition from the c_err_rpt logic for each individual error detected by the PBA. Writing any value to the PBAERRRPT0 will force a reset to clear all hold bits in all the PBAERRPTn. CERR_RST: CERR reset for PBA.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:5TP.TPBR.PBA.PBAF.SCOM.PB_RDDATATO_FW_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:5) [000000]
6:11TP.TPBR.PBA.PBAF.SCOM.PB_RDADRERR_FW_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:5) [000000]
12:17TP.TPBR.PBA.PBAF.SCOM.PB_WRADRERR_FW_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:5) [000000]
18:25TP.TPBR.PBA.PBAF.SCOM.PB_ACKDEAD_FW_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:7) [00000000]
26:37TP.TPBR.PBA.PBAF.SCOM.PB_UNEXPCRESP_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:11) [000000000000]
38:43TP.TPBR.PBA.PBAF.SCOM.PB_UNEXPDATA_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:5) [000000]
Bit(s)SCOM Dial: Description
0:5 RWX_WCLRPART PBAERRRPT0_CERR_PB_RDDATATO_FW: CERR_OBS: PBAFIR(2) PB Read Data Timeout for Forwarded Request
0:5 - Per Read queue(0:5).
6:11 RWX_WCLRPART PBAERRRPT0_CERR_PB_RDADRERR_FW: CERR_OBS: PBAFIR(1) PB CRESP Addr Error Received for Forwarded Read Request
0:5 - Per Read queue (0:5)
12:17 RWX_WCLRPART PBAERRRPT0_CERR_PB_WRADRERR_FW: CERR_OBS: PBAFIR(12) PB CRESP Addr Error Received for Forwarded Write Request
0:1 - Per Write queue (0:1), f
2 - PBAXSND,
3 - PBAXRCV,
4 - PBAXISND,
5 - PBAXIRCV
18:23 RWX_WCLRPART PBAERRRPT0_CERR_PB_ACKDEAD_FW_RD: CERR_OBS: PBAFIR(14) Ackdead response received for forwarded read request
0:5 - Per Read queue(0:5),
24:25 RWX_WCLRPART PBAERRRPT0_CERR_PB_ACKDEAD_FW_WR: CERR_OBS: PBAFIR(40) Ackdead response received for forwarded write request
0:1 - Per Write queue.(0:1)
26:37 RWX_WCLRPART PBAERRRPT0_CERR_PB_UNEXPCRESP: CERR_OBS: PBAFIR(9) Unexp CRESP received for request.
0:5 - Per Read queue.(0:5),
6:7 - Per Write queue(0:1),
8:9 - Per BCUE write queue,
10 - PBAXSND,
11 - PBAXISND,
38:43 RWX_WCLRPART PBAERRRPT0_CERR_PB_UNEXPDATA: CERR_OBS: PBAFIR(10) Unexpected Data response received
0:5 - Per Read queue(0:5)
44:63 RO constant=0b00000000000000000000

PBA Error Report 1 Register
Addr: 0000000003011DCD (SCOM)
Name:TP.TPBR.PBA.PBAF.PBAERRRPT1
Constant(s):
Comments:PBA Error Report Register 1shows the hold condition from the c_err_rpt logic for each individual error detected by the PBA. Writing any value to the PBAERRRPT0 will force a reset to clear all hold bits in all the PBAERRPTn.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:13TP.TPBR.PBA.PBAF.SCOM.PB_BADCRESP_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:13) [00000000000000]
14:27TP.TPBR.PBA.PBAF.SCOM.PB_OPERTO_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:13) [00000000000000]
Bit(s)SCOM Dial: Description
0:13 ROX PBAERRRPT1_CERR_PB_BADCRESP: CERR_OBS: PBAFIR(13) Invalid CRESP received.
0:5 - Per Read queue(0:5),
6:9 - Per Write queue(0:3),
10 - PBAXSND,
11 - PBAXRCV,
12 - PBAXISND,
13 - PBAXIRCV
14:27 ROX PBAERRRPT1_CERR_PB_OPERTO: CERR_OBS: PBAFIR(15) Operational Timeout.
0:5 - Per Read queue(0:5),
6:9 - Per Write queue(0:3),
10 - PBAXSND,
11 - PBAXRCV,
12 - PBAXISND,
13 - PBAXIRCV
28:63 RO constant=0b000000000000000000000000000000000000

PBA Error Report 2 Register
Addr: 0000000003011DCE (SCOM)
Name:TP.TPBR.PBA.PBAF.PBAERRRPT2
Constant(s):
Comments:PBA Error Report Register 2 (read/clear c_err_rpt) shows the hold condition from the c_err_rpt logic for each individual error detected by the PBA. Writing any value to the PBAERRRPT0 will force a reset to clear all hold bits in all the PBAERRPTn.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:4TP.TPBR.PBA.PBAF.SCOM.INTERNAL_ERR_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:4) [00000]
5:7TP.TPBR.PBA.PBAF.SCOM.PB_PARITY_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:2) [000]
8:9TP.TPBR.PBA.PBAF.SCOM.AXFLOW_ERR_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:1) [00]
10:11TP.TPBR.PBA.PBAF.SCOM.AXIFLOW_ERR_ERR_OUT_0_INST.HOLD_LATCH_INST.HOLD.LATC.L2(0:1) [00]
Bit(s)SCOM Dial: Description
0 ROX PBAERRRPT2_CERR_BAR_PARITY_ERR: CERR_OBS: PBAFIR(28) PBA Internal Error - BAR Parity Error
1 ROX PBAERRRPT2_CERR_SCOMTB_ERR: CERR_OBS: PBAFIR(28) PBA Internal Error - Trusted Scom fsm error.
2:3 ROX PBAERRRPT2_CERR_SPARE: CERR_OBS: PBAFIR(28) PBA Internal Error - Unused.
4 ROX PBAERRRPT2_CERR_PBDOUT_PARITY_ERR: CERR_OBS: PBAFIR(28) PBA Internal Error - Parity error detected on outbound write data. Forced bad ECC.
5:7 ROX PBAERRRPT2_CERR_PB_PARITY_ERR: CERR_OBS: PBAFIR(11) PowerBus parity error detected
0 - CRESP TTAG or ATAG parity error
1 - DPX_RTAG parity error
2 - RCMD0 ADDR parity error
8:9 ROX PBAERRRPT2_CERR_AXFLOW_ERR: CERR_OBS.PBAFIR(35) PBAX Flow error
0:1 - axflow Overflow per qid.
10:11 ROX PBAERRRPT2_CERR_AXIFLOW_ERR: CERR_OBS.PBAFIR(35) PBAXI Flow error
0:1 - axiflow Overflow per qid.
12:62 RO constant=0b000000000000000000000000000000000000000000000000000

PBA Overcommit Rate Register 0
Addr: 0000000003011DD0 (SCOM)
Name:TP.TPBR.PBA.PBAF.PBAPBOCR0
Constant(s):
Comments:This register contains two free-running counters that can be read to determine the average overcommit rate for a given Scope/Drop priority class.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
16:31TP.TPBR.PBA.PBAF.SCOM.PBA_CHGRATE_CNTR0_Q_0_INST.LATC.L2(0:15) [0000000000000000]
44:63TP.TPBR.PBA.PBAF.SCOM.PBA_CHGRATE_ACCUM0_Q_0_INST.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOM Dial: Description
0:15 RO constant=0b0000000000000000
16:31 ROX PBAPBOCR0_EVENT: Change Rate Event
This is a free-running counter that increments (by 1) when a PowerBus chgrate.grant command is decoded.
32:43 RO constant=0b000000000000
44:63 ROX PBAPBOCR0_ACCUM: Change Rate Accumulation
This is a free-running counter that accumlates the issue rate value (number from 0 to 7) in the PowerBus chgrate.grant command.

PBA Overcommit Rate Register 1
Addr: 0000000003011DD1 (SCOM)
Name:TP.TPBR.PBA.PBAF.PBAPBOCR1
Constant(s):
Comments:This register contains two free-running counters that can be read to determine the average overcommit rate for a given Scope/Drop priority class.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
16:31TP.TPBR.PBA.PBAF.SCOM.PBA_CHGRATE_CNTR1_Q_0_INST.LATC.L2(0:15) [0000000000000000]
44:63TP.TPBR.PBA.PBAF.SCOM.PBA_CHGRATE_ACCUM1_Q_0_INST.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOM Dial: Description
0:15 RO constant=0b0000000000000000
16:31 ROX PBAPBOCR1_EVENT: Change Rate Event
This is a free-running counter that increments (by 1) when a PowerBus chgrate.grant command is decoded.
32:43 RO constant=0b000000000000
44:63 ROX PBAPBOCR1_ACCUM: Change Rate Accumulation
This is a free-running counter that accumlates the issue rate value (number from 0 to 7) in the PowerBus chgrate.grant command.

PBA Global Over-Current Prediction Config Register
Addr: 0000000003011DD6 (SCOM)
Name:TP.TPBR.PBA.PBAF.GOCPCR
Constant(s):
Comments:This register is used to setup chip-level Over-current prediction tank to communicate with tanks in each per-Core CPMS local OCP logic.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TPBR.PBA.PBAF.SCOM.GOCPCR_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW GOCPCR_CHIP_OCP_ENABLE: When set, enables the Chip-level OCP tank logic in the central PBA macro via the subsequent fields in this register. Rising edge of this bit resets
the Global Tank and associated state, including Core requests. Note: code must disable the Local OCP in per-Core QME before disabling this bit. Code
must enable this bit before enabling the Local OCP in per-Core QME.
Note: Enabling the OCP sets bits (0 to ~MSB_SKIP+DELAY_THRESH) of the Global tank to zero, and the remaining bits to 1 (start at half the threshold)
1:3 RW GOCPCR_MSB_SKIP: Optionally reduce size of counter by the number of bits as indicated by this field. Effectively reduces the size of the "tank" by increasing factors
of 2.
4:5 RW GOCPCR_DELAY_THRESH: Selects how many consecutive MSB bits, immediately after the skipped bits defined by the previous field, must be set to all 1 to dictate what % of the
"tank" counter must be full (discharged) before delaying grant requests.
6:8 RW GOCPCR_GRANT_DELAY_SEL: Selects how many bits past the MSB_SKIP plus DELAY_THRESH bits to use for calculating the grant delay.
Note: If this field is set to 0x0, the GRANT_DELAY_FLOOR is always used when the DELAY_THRESH criteria is met.
9:11 RW GOCPCR_GRANT_DELAY_MULT: Number of Zeroes to append to the end of the delay count selected by GRANT_DELAY_SEL and to the end of the GRANT_DELAY_FLOOR, effectively multiplying
themby a factor of 2.
12:31 RW GOCPCR_GRANT_SCALE_FACTOR: Amount added to the "tank" for every grant request received
32:35 RW GOCPCR_GRANT_DELAY_FLOOR: This field (after applying the GRANT_DELAY_MULT) is used for the Grant Delay when the DELAY_THRESH has been exceeded if it is greater than the value
obtained from the Global tank by using the GRANT_DELAY_SEL and GRANT_DELAY_MULT values.
Note: a value of 0x0 disables this feature.
Note: this field is also used when ALWAYS_USE_DELAY=1.
Note: when GRANT_DELAY_SEL=0x0, this field defines a constant amount of delay to use when DELAY_THRESH criteria is met.
36 RW GOCPCR_ALWAYS_USE_DELAY: When set, GRANT_DELAY_FLOOR (after applying the GRANT_DELAY_MULT) is also used when DELAY_THRESH has not been exceeded.
37:39 RW GOCPCR_RECHARGE_FRAC_TIME: How often to adjust the RECHARGE_VALUE. This value is loaded into a decrementer that when it reaches zero adds the additional RECHARGE_FRAC_VALUE
amount to the "tank" with the RECHARGE_VALUE. A value of 0x0 disables this feature.
40:47 RW GOCPCR_RECHARGE_FRAC_VALUE: Amount subtracted from the "tank" on some cycles to fine tune the power supply charge as per the subsequent field.
48:63 RW GOCPCR_RECHARGE_VALUE: 16-bit Amount subtracted from the "tank" every cycle to model power supply charge available per cycle.

PBA Global Over-Current Prediction Event Register
Addr: 0000000003011DD7 (SCOM)
Name:TP.TPBR.PBA.PBAF.GOCPER
Constant(s):
Comments:This register is used to sample the chip-level Over-current prediction tank characterization event counters.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
8:31TP.TPBR.PBA.PBAF.DOCP_GLOBAL.OCP_CNTR0_Q_0_INST.LATC.L2(0:23) [000000000000000000000000]
40:63TP.TPBR.PBA.PBAF.DOCP_GLOBAL.OCP_CNTR1_Q_0_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:7 RO constant=0b00000000
8:31 ROX GOCPER_OCP_COUNT0: Characterization Counter0 Value (24-bit). This counter increments based on GOCPRR[OCP_COUNT0_SELECT], saturates at 0xFFFFFF, and resets on: read to
this register, write to GOCPRR, and write GOCPCR.
32:39 RO constant=0b00000000
40:63 ROX GOCPER_OCP_COUNT1: Same as the above, but based on GOCPRR[OCP_COUNT1_SELECT].

PBA Global Over-Current Prediction Response Register
Addr: 0000000003011DD8 (SCOM)
Name:TP.TPBR.PBA.PBAF.GOCPRR
Constant(s):
Comments:This register is used to configure the global response of chip-level Over-current prediction tank, and setup the OCP Counters, and read out an instantaneous snapshot of the Global Tank for analysis & debug.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15TP.TPBR.PBA.PBAF.SCOM.GOCPRR_Q_0_INST.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0 RW GOCPRR_GLOBAL_RESPONSE_ENABLE: When set, the below fields in this register control bits 0:1 of the DPLL Encoded Data to TP. When not set, PBAF drives bits 0:1 of the DPLL encoded
data bits to TP as always "11". Note that bit2 of DPLL encoded data is always driven as 1, regardless.
1:2 RW GOCPRR_SLOW_MAG_COMPARE: Value to compare against the OCP Global Tank Magnitude (top two bits of the MSB) when enabling the overcurrent response to slew down the DPLL
frequency slowly, based on the next field.
3:5 RW GOCPRR_SLOW_SECONDARY_SELECT: When GLOBAL_RESPONSE_ENABLE=1, selects the number of bits to the right of the top two MSB to NOR in forming bit 1 of the DPLL Encoded Data to TP.
Note that a value of 0 in the field means this field is unused and only the MAG_COMPARE is used.
6:7 RW GOCPRR_FAST_MAG_COMPARE: Same as above but for bit 0 of the DPLL Encoded Data to TP.
8:10 RW GOCPRR_FAST_SECONDARY_SELECT: Same as above but for bit 0 of the DPLL Encoded Data to TP.
11 RW GOCPRR_USE_HANG_PULSE: I
DD1: Spare
DD2: Decrement the global charge count using a constant hang pulse instead of the nest clock.
12:13 RW GOCPRR_OCP_COUNT0_SELECT: DD1: controls mux selects into both characterization counters
Controls what increments the event counters reported in the GOCPER register.
When this field is 00:
Counter0 - grants not delayed (DD1 undercounts when close*) Counter1 -- grants that were delayed (DD1 overcounts by same*)
When this field is 01:
Counter0 - all incoming requests
Counter1 - grant delay transitions
(grant was delayed but previous grant was not)
When this field is 10:
Counter0 - cycles that grants have been actively delayed
(DD1 undercounts a little, still need to identify DD2 fix*)
Counter1 -- grants that were delayed*
When this field is 11:
Counter0 - cycles that OCP tank is above the delay threshold
(such that future grants will be delayed)
Counter1 - grants that were delayed*
* DD1 NOTE: the cycle and delayed grant counters maybe off by a small number of cycles on each transition but should be a small percentage error.
DD2: controls mux selects into only characterization counter0
00: number of grants not delayed
01: number of incoming requests
10: cycles that grants have been actively delayed
11: cycles that OCP tank is above the delay threshold
(such that future grants will be delayed)
14:15 RW GOCPRR_OCP_COUNT1_SELECT: DD1: Implemented but not used.
DD2: controls mux selects into characterization counter1
00: grants that were delayed
01: grant delay transitions
10: grants that were not delayed
11: cycles that grants are not actively delayed but request is present
16:63 RO constant=0b000000000000000000000000000000000000000000000000

PBA Global Over-Current Prediction Sample Register
Addr: 0000000003011DD9 (SCOM)
Name:TP.TPBR.PBA.PBAF.GOCPSR
Constant(s):
Comments:This register is used to sample the behavior of the Global OCP.
DD1 ERRATA: this register must be read during IPL as part of the OCP configuration procedure.
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TPBR.PBA.PBAF.DOCP_GLOBAL.GLBL_SLOW_RSP_Q_INST.LATC.L2(0) [0]
1TP.TPBR.PBA.PBAF.DOCP_GLOBAL.GLBL_FAST_RSP_Q_INST.LATC.L2(0) [0]
4:15TP.TPBR.PBA.PBAF.DOCP_GLOBAL.GLBL_TANK_MAX_Q_0_INST.LATC.L2(0:11) [000000000000]
20:31TP.TPBR.PBA.PBAF.DOCP_GLOBAL.GLBL_TANK_MIN_Q_0_INST.LATC.L2(0:11) [000000000000]
32:63TP.TPBR.PBA.PBAF.DOCP_GLOBAL.DOCP_GLOBAL_TANK_CNTR_Q_0_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX GOCPSR_SLOW_RESPONSE_THRESH: Sticky indicator that the Slow Response threshold (defined by the SLOW_* fields above) was reached since the last read to this register, regardless of
the value of GLOBAL_RESPONSE_ENABLE.
1 ROX GOCPSR_FAST_RESPONSE_THRESH: Sticky indicator that the Fast Response threshold (defined by the FAST_* fields above) was reached since the last read to this register, regardless of
the value of GLOBAL_RESPONSE_ENABLE.
2:3 RO constant=0b00
4:15 ROX GOCPSR_GLOBAL_TANK_MAX: Max value of the top 12 sampled bits of the Global Tank since this register was last read (determined by SKIP_MSB).
Resets to 0x000 on read.
16:19 RO constant=0b0000
20:31 ROX GOCPSR_GLOBAL_TANK_MIN: Min value of the top 12 sampled bits of the Global Tank since this register was last read (determined by SKIP_MSB).
Resets to 0xFFF on read.
32:63 ROX GOCPSR_GLOBAL_TANK_VALUE: Value of the Tank counter that tracks how much charge is available.

notrust Bar0
Addr: 0000000003011F40 (SCOM)
Name:TP.TPBR.PSIHB.NOTRUST_BAR0
Constant(s):
Comments:
SelectedAttributes:Secure=true, Magic=true
LatchesBitsLatch Name [flushval]
14:43TP.TPBR.PSIHB.CTRL.SEC_BAR0_Q_8_INST.LATC.L2(14:43) [000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:13 RO constant=0b00000000000000
14:43 RWX UNTRUSTED_BAR0: Untrusted_Bar0 - defaults to all 1s

notrust bar1
Addr: 0000000003011F41 (SCOM)
Name:TP.TPBR.PSIHB.NOTRUST_BAR1
Constant(s):
Comments:
SelectedAttributes:Secure=true, Magic=true
LatchesBitsLatch Name [flushval]
14:43TP.TPBR.PSIHB.CTRL.SEC_BAR1_Q_8_INST.LATC.L2(14:43) [000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:13 RO constant=0b00000000000000
14:43 RWX UNTRUSTED_BAR1: Untrusted_bar1 - defaults to all 1s

notrust bar0mask
Addr: 0000000003011F42 (SCOM)
Name:TP.TPBR.PSIHB.NOTRUST_BAR0MASK
Constant(s):
Comments:
SelectedAttributes:Secure=true, Magic=true
LatchesBitsLatch Name [flushval]
14:43TP.TPBR.PSIHB.CTRL.SEC_BARMSK0_Q_8_INST.LATC.L2(14:43) [000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:13 RO constant=0b00000000000000
14:43 RWX UNTRUSTED_BAR0MASK: Untrusted_bar0mask - defaults to all 0s

notrust bar1mask
Addr: 0000000003011F43 (SCOM)
Name:TP.TPBR.PSIHB.NOTRUST_BAR1MASK
Constant(s):
Comments:
SelectedAttributes:Secure=true, Magic=true
LatchesBitsLatch Name [flushval]
14:43TP.TPBR.PSIHB.CTRL.SEC_BARMSK1_Q_8_INST.LATC.L2(14:43) [000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:13 RO constant=0b00000000000000
14:43 RWX UNTRUSTED_BAR1MASK: Untrusted_bar1mask - defaults to all 0s

TAR - TCE Address Register
Addr: 0000000003011F44 (SCOM)
Name:TP.TPBR.PSIHB.PSI_TCE_ADDR_REG
Constant(s):
Comments:
SelectedAttributes:Secure=true, Magic=true
LatchesBitsLatch Name [flushval]
14:47TP.TPBR.PSIHB.CTRL.TCE_ADDR_Q_8_INST.LATC.L2(14:47) [0000000000000000000000000000000000]
61:62TP.TPBR.PSIHB.CTRL.NEW_TCE_ENTRIES_Q_0_INST.LATC.L2(0:1) [00]
63TP.TPBR.PSIHB.CTRL.TCE_ENTRIES_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:13 RO constant=0b00000000000000
14:47 RWX TCE_ADDR: The TCE Address Register contains the address used to look up higher order bits of DMA addresses when translation is enabled. Bits 18 to 47 of the TCE address are specified with this IDial. For address bits 14 to 15, need to set PSIHB ADDR Upper bits
48:60 RO constant=0b0000000000000
61:63 RWX TCE_ENTRIES: The TCE Address Register contains a 3-bits to indicate how many TCE entries there are. No bits set to 1 means there are 8K entries, while a 1 in bit pos 1 means there are 512K entries. If bit pos 2 is set and bit pos 1 is not set, then there are 256k entries. If only bit pos 0 is set, then there are 16k entries. Bits 61-63 of TARTCE Register are specified with this IDial in the following order: TARTCE(61) = tce_entries(1); TARTCE(62) = tce_entries(2); TARTCE(63) = tce_entries(0)

Secure Boot Control
Addr: 0000000003011F45 (SCOM)
Name:TP.TPBR.PSIHB.TRUST_CONTROL
Constant(s):
Comments:
SelectedAttributes:Secure=true, Magic=true
LatchesBitsLatch Name [flushval]
2TP.TPBR.PSIHB.CTRL.TCE_ENABLE_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:1 RO constant=0b00
2 RWX FSP_TCE_ENABLE: This bit controls the use of TCE s to translate incoming FSP addresses to system memory addresses. When set to 1 , DMA operations within the low 32 bit FSP address space use the TCE mechanism to access the 48 bit system address space. This bit is similar to the Winnipeg PHB Configuration Register, bit 2.
3 ROX secure_booth

PBAM low sped part FIR Register
Addr: 0000000003012000 (SCOM)
0000000003012001 (SCOM1)
0000000003012002 (SCOM2)
Name:TP.LPC.SYNC_FIR_REG
Constant(s):
Comments:PBAM low sped part FIR Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:9TP.LPC.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR.LATC.L2(0:9) [0000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR INVALID_TRANSFER_SIZE: OPB_Master_LS_received_a_transfer_size_value_unequal_to_1-_or_2-_or_4-Byte
1 RWX WOX_AND WOX_OR INVALID_COMMAND: OPB_Master_LS_received_a_invalid_command_no_ci_store_and_no_ci_load
2 RWX WOX_AND WOX_OR INVALID_ADDRESS_ALIGNMENT: OPB_Master_LS_received_a_address_which_was_not_aligned_to_the_received_transfer_size
3 RWX WOX_AND WOX_OR OPB_ERROR: OPB_Master_LS_detected_OPB_ErrAck_which_was_activated_by_the_accessed_OPB_slave
4 RWX WOX_AND WOX_OR OPB_TIMEOUT: the_OPB_arbiter_activated_the_OPB_Timeout_signal_Typical_reason_is_that_the_OPB_access_did_not_hit_any_available_OPB_slave
5 RWX WOX_AND WOX_OR OPB_MASTER_HANG_TIMEOUT: the_OPB_Master_LS_was_not_able_to_end_the_requested_OPB_access_within_the_OPB_Master_LS_hang_timeout_time
6 RWX WOX_AND WOX_OR CMD_BUFFER_PAR_ERR: a parity_error_was_detected_in_the_OPB_Master_LS_command_buffer
7 RWX WOX_AND WOX_OR DAT_BUFFER_PAR_ERR: a parity_error_was_detected_in_the_OPB_Master_LS_data_buffer
8 RWX WOX_AND WOX_OR RETURNQ_ERR: reserved_bit_1_tied_to_zero
9 RWX WOX_AND WOX_OR RESERVED: reserved_bit_0_tied_to_zero
10:61 RO n/a n/a constant=0b0000000000000000000000000000000000000000000000000000

PBAM_low_speed_part_FIR_Mask_Register
Addr: 0000000003012003 (SCOM)
0000000003012004 (SCOM1)
0000000003012005 (SCOM2)
Name:TP.LPC.SYNC_FIR_MASK_REG
Constant(s):
Comments:PBAM_low_speed_part_FIR_Mask_Register
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:9TP.LPC.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:9) [0000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_AND WO_OR INVALID_TRANSFER_SIZE_MASK: mask_for_invalid_transfer_size
1 RW WO_AND WO_OR INVALID_COMMAND_MASK: mask_for_invalid_command
2 RW WO_AND WO_OR INVALID_ADDRESS_ALIGNMENT_MASK: mask_for_invalid_address_alignment
3 RW WO_AND WO_OR OPB_ERROR_MASK: mask_for_OPB_error
4 RW WO_AND WO_OR OPB_TIMEOUT_MASK: mask_for_OPB_timeout
5 RW WO_AND WO_OR OPB_MASTER_HANG_TIMEOUT_MASK: mask_for_OPB_master_hang_timeout
6 RW WO_AND WO_OR CMD_BUFFER_PAR_ERR_MASK: mask_for_OPB_master_cmd_buffer_parity_error
7 RW WO_AND WO_OR DAT_BUFFER_PAR_ERR_MASK: mask_for_OPB_master_dat_buffer_parity_error
8 RW WO_AND WO_OR RETURNQ_ERR_MASK: mask_for_reserved_bit_1
9 RW WO_AND WO_OR RESERVED_MASK: mask_for_reserved_bit_0
10:61 RO n/a n/a constant=0b0000000000000000000000000000000000000000000000000000

PBAM_FIR_Action0_Register
Addr: 0000000003012006 (SCOM)
Name:TP.LPC.SYNC_FIR_ACTION0_REG
Constant(s):
Comments:GX Nest FIR Action0 Register
Action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = No Error
(0,1) = recoverable error
(1,0) = Checkstop Error
(1,1) = unused
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:9TP.LPC.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0 RO INVALID_TRANSFER_SIZE_ACTION0: action0_for_invalid_transfer_size
1 RO INVALID_COMMAND_ACTION0: action0_for_invalid_command
2 RO INVALID_ADDRESS_ALIGNMENT_ACTION0: action0_for_invalid_address_alignment
3 RO OPB_ERROR_ACTION0: action0_for_OPB_error
4 RO OPB_TIMEOUT_ACTION0: action0_for_OPB_timeout
5 RO OPB_MASTER_HANG_TIMEOUT_ACTION0: action0_for_OPB_master_hang_timeout
6 RO CMD_BUFFER_PAR_ERR_ACTION0: action0_for_OPB_master_cmd_buffer_parity_error
7 RO DAT_BUFFER_PAR_ERR_ACTION0: action0_for_OPB_master_dat_buffer_parity_error
8 RO RETURNQ_ERR_ACTION0: reserved_bit_1
9 RO RESERVED_ACTION0: action0_for_reserved0
10:61 RO constant=0b0000000000000000000000000000000000000000000000000000

PBAM_FIR_action1_Register
Addr: 0000000003012007 (SCOM)
Name:TP.LPC.SYNC_FIR_ACTION1_REG
Constant(s):
Comments:GX Nest FIR action1 Register
Action select for corresponding bit in FIR
(Action0,Action1) = Action Select
(0,0) = No Error
(0,1) = recoverable error
(1,0) = Checkstop Error
(1,1) = unused
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:9TP.LPC.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:9) [0000000000]
Bit(s)SCOM Dial: Description
0 RO INVALID_TRANSFER_SIZE_ACTION1: action1_for_invalid_transfer_size
1 RO INVALID_COMMAND_ACTION1: action1_for_invalid_command
2 RO INVALID_ADDRESS_ALIGNMENT_ACTION1: action1_for_invalid_address_alignment
3 RO OPB_ERROR_ACTION1: action1_for_OPB_error
4 RO OPB_TIMEOUT_ACTION1: action1_for_OPB_timeout
5 RO OPB_MASTER_HANG_TIMEOUT_ACTION1: action1_for_OPB_master_hang_timeout
6 RO CMD_BUFFER_PAR_ERR_ACTION1: action1_for_OPB_master_cmd_buffer_parity_error
7 RO DAT_BUFFER_PAR_ERR_ACTION1: action1_for_OPB_master_dat_buffer_parity_error
8 RO RETURNQ_ERR_ACTION1: reserved_bit_1
9 RO RESERVED_ACTION1: action1_for_reserved_bit_0
10:61 RO constant=0b0000000000000000000000000000000000000000000000000000

Pervasive FIR WOF Register
Addr: 0000000003012008 (SCOM)
Name:TP.LPC.SYNC_FIR_WOF_REG
Constant(s):
Comments:Who is on first register indicates which error occurred first
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:5TP.LPC.SCOMFIR.PAR_OFF.LEM_FIR.LOCALFIR.FIR.WOF_LAT_YES.WOF.LATC.L2(0:5) [000000]
Bit(s)SCOM Dial: Description
0:5 RWX_WCLRREG SYNC_FIR_WOF: WOF Register locks on first error
6:63 RO constant=0b0000000000000000000000000000000000000000000000000000000000

configuration of CC counters
Addr: 0000000003030000 (SCOM)
Name:TP.TCN1.N1.SYNC_CONFIG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:23TP.TCN1.N1.EPS.CC.PHASE_SYNC.SYNC_CONFIG_Q_INST.LATC.L2(0:23) [000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RW SYNC_PULSE_DELAY: Delay incoming sync pulse. Default are 8 latches incl. Async. 0000=8 , 0001=2(ungated), 0010=3, 0011=4, 0100=5, 0101=6, 0110=7, 0111=8 cycles, 1000=9, 1001=10, 1010=11, 1011=12, 1100=13, 1101=14, 1110=15, 1111=16 delay of the reset of the phase counter
4 RW LISTEN_TO_SYNC_PULSE_DIS: disable phase counter synchronization by sync_pulse signal (default is enabled) ATTENTION: when ENABLE listen_to_sync, chiplet gets corrupted for 200 cycles
5 RW SYNC_PULSE_INPUT_SEL: default is 0, when set to 1, the alternative input of the sync_pulse will be used ATTENTION: when toggle the input select, chiplet gets corrupted for 200 cycles
6 RW USE_SYNC_FOR_SCAN: if set, use opcg initial alignment for scan requests
7 RW CLEAR_CHIPLET_IS_ALIGNED: This bit will clear the chiplet_is_aligned bit - see cplt_stat register
8 RW PCB_NOT_BLOCKED_BY_CLKCMD: PCB will not waiting for Clock Start/Stop Commands
9 RW DISABLE_PCB_ITR: disable interrupt generation within CC - interrupt sent on each hld event
10 RW CONT_SCAN_DISABLE: disable continues scan feature if that is set, you need to check for OPCG_DONE after each cont_scan request
11 RW SYNC_PULSE_OUT_DIS: disable sync_pulse output when set to 1, master chiplet will not sending sync pulses to slave chiplets anymore
12 RW REGION_PGOOD_OVERRIDE: Default is 0: When set to 1, region_pgood gets ignored. Allows Clock Start of Partial BAD regions
13 RW CONT_SCAN_SHORT_WAIT: when 1, it shorts the delay between two scans. zThemis missed that. P10 need to set this bit to get faster scan performance
14 RW PCIE32_MODE: P10 DD2: 0=DD1 default mode- 48 mode for all chiplets but PCIE, 1=DD2 Phase Counter 32 mode - only in PCIE chiplet allowed
15 RW PHASE_COUNTER_ON_CLKCHANGE_EN: Enable Phase Counter capture on clk change or runn or xstop
16:23 RWX PHASE_COUNTER_ON_CLKCHANGE: Capture value of phase counter on Clock Change or XSTOP

OPCG ALIGN
Addr: 0000000003030001 (SCOM)
Name:TP.TCN1.N1.OPCG_ALIGN
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CC.OPCG.OPCG_ALIGN_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RW INOP_ALIGN: INOP phase alignment (0: none, 1: 2:1, 2: 3:1, 3: 4:1, 4: 6:1, 5: 8:1, 6: 12:1, 7: 16:1, 8: 24:1, 9-15: max=144:1 )
4:7 RW SNOP_ALIGN: SNOP phase alignment (0: none, 1: 2:1, 2: 3:1, 3: 4:1, 4: 6:1, 5: 8:1, 6: 12:1, 7: 16:1, 8: 24:1, 9-15: max=144:1 )
8:11 RW ENOP_ALIGN: ENOP phase alignment (0: none, 1: 2:1, 2: 3:1, 3: 4:1, 4: 6:1, 5: 8:1, 6: 12:1, 7: 16:1, 8: 24:1, 9-15: max=144:1 )
12:19 RW INOP_WAIT: INOP cycle delay (0-255)
20:31 RW SNOP_WAIT: SNOP cycle delay (0-4095)
32:39 RW ENOP_WAIT: ENOP cycle delay (0-255)
40 RW INOP_FORCE_SG: INOP: Set SG high during INOP
41 RW SNOP_FORCE_SG: SNOP: Set SG high during SNOP
42 RW ENOP_FORCE_SG: ENOP: Set SG high during ENOP ( including LOOP phase)
43 RW NO_WAIT_ON_CLK_CMD: 0: A clock change request will first wait the OPCG_WAIT cycles. 1: A clock change request will not wait, when not in flush
44:45 RW ALIGN_SOURCE_SELECT: 0: use inopa setting from opcg_reg0, 1: use rising edge of sync pulse, 2: use unit0_sync_lvl to align (for AVP - refresh0 ) 3: use unit1_sync_lvl to align (for AVP - refresh1)
46 RW UNUSED46: unused
47:51 RW SCAN_RATIO: scan_ratio (n=0-15: (n+1):1, 16: 24:1, 17: 32:1, 18: 48:1, 19: 64:1, 20: 128:1) - Default 4:1=00011
52:63 RW OPCG_WAIT_CYCLES: old PAD value, delay at the begin and end of the OPCG run, to allow DC signals to be there at the right time (0 4095), needs to be higher than plat depth ! Default=0x020

OPCG Control Register 0
Addr: 0000000003030002 (SCOM)
Name:TP.TCN1.N1.OPCG_REG0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CC.OPCG.OPCG_REG0_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW RUNN_MODE: 0=BIST-mode used for LBIST / 1=RUNN-mode used for ABIST/IOBIST
1 RWX OPCG_GO: opcg go (start OPCG) - bit will b cleared when OPCG is done - poll for opcg_done in cplt_start reg
2 RWX RUN_SCAN0: run scan0 (will override all BIST mode settings but the scan_ratio) - will start a scan0 run, bit gets cleared when OPCG is done - poll for opcg_done in cplt_start reg
3 RW SCAN0_MODE: set PRPGs in scan0_mode but do not run automatic scan0 sequence
4 RWX OPCG_IN_SLAVE_MODE: when selected, OPCG will wait for Master chiplet to get started. When Keep_MS_Mode is 0, SLAVE_MODE will be cleared after incoming trigger.
5 RWX OPCG_IN_MASTER_MODE: when selected, OPCG will send out trigger to all Slave chiplets - When Keep_MS_MODE=0, MASTER_MODE gets cleared after sending out one Master trigger
6 RW KEEP_MS_MODE: when set to 1, OPCG in M/S mode bits will not be cleared after one incoming OPCG trigger. Default is clear M/S mode bits
7 RW TRIGGER_OPCG_ON_UNIT0_SYNC_LVL: Unit pin used for AVP can trigger OPCG (unit0_sync_lvl)
8 RW TRIGGER_OPCG_ON_UNIT1_SYNC_LVL: Unit pin used for AVP can trigger OPCG (unit1_sync_lvl)
9:10 RW UNUSED910: unused
11 RW RUN_OPCG_ON_UPDATE_DR: start opcg engine when scan updated (update_dr) received (set pulse) Cronus requires this bit=1 for a setpulse WRITE
12 RW RUN_OPCG_ON_CAPTURE_DR: start opcg engine when scan updated (capture_dr) received (set pulse) Cronus requires this bit=1 for a setpulse READ
13 RW STOP_RUNN_ON_XSTOP: runn-mode: stop run-n on xstop
14 RW OPCG_STARTS_BIST: runn-mode: OPCG engine controls start_bist for ABIST or IOBIST (see BIST register)
15 RW RUNN_HLD_DLY_EN: runn-mode: Enable of the HLD Delay function - programming in OPCG_CAPT1,2,3 to allow staggered stop of Cores during Cache-Contained mode
16:20 RW UNUSED1620: unused
21:63 RWX LOOP_COUNT: Loop counter for LBIST and RUNN - write: target value - read: current counter value - will count from 0 to target value

OPCG Control Register 1
Addr: 0000000003030003 (SCOM)
Name:TP.TCN1.N1.OPCG_REG1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CC.OPCG.OPCG_REG1_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:11 RW SCAN_COUNT: BIST mode: Channel scan count (s = 0-4095) runn-mode: start_bist match value(0:11)
12:23 RW MISR_A_VAL: BIST mode: a value for MISR aperture, runn-mode: start_bist match value(12:23)
24:35 RW MISR_B_VAL: BIST mode: b value for MISR aperture, runn-mode: start_bist match value(24:35)
36:47 RW MISR_INIT_WAIT: BIST mode: delay MISR aperture, MISRs get active after this number of loops
48 RW UNUSED48: Unused to suppress the last RUNN clock please look at CLK_REGION register bit 54
49 RW SCAN_CLK_USE_EVEN: Generate scan clock in even cycle instead of odd. Default is 0 = odd for scan
50 RW DISABLE_FCE_DURING_FILL: Scan0 and LBIST - disable FCE during NSL Fill - LBIST_COMBINED=1
51 RW UNUSED51: unused
52 RW RTIM_THOLD_FORCE: force rtim_thold low when not in test_dc mode (must be 0 at all time)
53 RW DISABLE_ARY_CLK_DURING_FILL: LBIST and SCAN0: prevent fire of ARY HLD during NSL-fill - LBIST_COMBINED=1
54 RW SG_HIGH_DURING_FILL: LBIST and SCAN0: Hold SG high during NSL-fill
55:56 RW LBIST_SKITTER_CTL: BIST mode: 00: enable skitter during lbist_ip, 01: enable skitter when misr_active - see misr_init_wait 10: skitter OPCG_GO mode - falling edge=start, rising edge=stop 11 - unused
57 RW MISR_MODE: BIST mode: MISR aperture mode (0: a-1 to b-1, 1: start to a and b to end)
58 RW INFINITE_MODE: infinite mode - RUNN and LBIST will run forever and ignore the loop count
59:63 RW NSL_FILL_COUNT: BIST mode: NSL-fill count (0-31)

OPCG Control Register 2
Addr: 0000000003030004 (SCOM)
Name:TP.TCN1.N1.OPCG_REG2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CC.OPCG.OPCG_REG2_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RWX OPCG_GO2: opcg go for broadcast sequences (start sequence)
1:3 RW PRPG_WEIGHTING: prpg_activate: 1/2, 1/4, 1/8, 1/16, 1/2, 3/4, 7/8, 15/16
4:15 RWX PRPG_SEED: set to 0 for prpg always on, else seed
16:27 RW PRPG_A_VAL: a value for PRPG aperture
28:39 RW PRPG_B_VAL: b value for PRPG aperture
40 RW PRPG_MODE: PRPG aperture mode (0: a-1 to b-1, 1: start to a and b to end)
41:47 RW UNUSED41_47: unused
48:51 RW SM_LBIST_CTRL_WEIGHT_SEL_PRIM: Stumpmux LBIST Control - weight select primary
52:55 RW SM_LBIST_CTRL_WEIGHT_SEL_SEC_OR_APERTURE_MASK: Stumpmux LBIST Control - weight select secondary (when mode_select=0) or aperture_mask (when mode_select=1)
56 RW SM_LBIST_CTRL_MODE_SELECT: Stumpmux LBIST Control - mode select - 0=secondary weight 1=aperture_mask
57 RW SM_LBIST_CTRL_PRPG_HOLD_MODE: Stumpmux LBIST Control - PRPG hold mode
58 RW SM_LBIST_CTRL_LOCAL_OVERRIDE: Stumpmux LBIST Control - Local Override
59 RW SM_LBIST_CTRL_LOAD_APERTURE_VALUE: Stumpmux LBIST Control - Aperture Value
60:63 RW SM_LBIST_CTRL_LOAD_APERTURE_SELECT: Stumpmux LBIST Control - Aperture Select

Scan Region and Type
Addr: 0000000003030005 (SCOM)
Name:TP.TCN1.N1.SCAN_REGION_TYPE
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.CC.CLOCK_MUX.SYSTEM_FAST_INIT_Q_INST.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.CC.CLOCK_MUX.PARALLEL_SCAN_Q_INST.LATC.L2(0) [0]
2TP.TCN1.N1.EPS.CC.CLOCK_MUX.PARALLEL_SCAN_AND_NOTOR_Q_INST.LATC.L2(0) [0]
3TP.TCN1.N1.EPS.CC.CCFG.SCAN_REGION_VITL_INST.CCFG_Q_INST.FSILAT.LATC.L2(0) [0]
4:18TP.TCN1.N1.EPS.CC.CCFG.SCAN_REGION_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:14) [000000000000000]
48:59TP.TCN1.N1.EPS.CC.CCFG.SCAN_TYPE_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0 RWX SYSTEM_FAST_INIT: Default is 0, when its set to 1, the MASK bits in the CMSK chain decide, which part will be scanned or scan0. MASK=1=scan0, MASK=0-part or scan chain
1 RWX PARALLEL_SCAN: Enable Parallel Scan of several regions with the same data
2 RWX PARALLEL_SCAN_AND_NOTOR: Default is 0, return data will be OR-ed. When set to 1, the return data will be AND-ed
3 RWX SCAN_REGION_VITL: scan clock region vitl (Vital = Clock)
4 RWX SCAN_REGION_PERV: scan clock region perv (Pervasive)
5 RWX SCAN_REGION_UNIT1: scan clock region 1 - unused
6 RWX SCAN_REGION_UNIT2: scan clock region 2 - fbc
7 RWX SCAN_REGION_UNIT3: scan clock region 3 - unused
8 RWX SCAN_REGION_UNIT4: scan clock region 4 - pe
9 RWX SCAN_REGION_UNIT5: scan clock region 5 - mm
10 RWX SCAN_REGION_UNIT6: scan clock region 6 - unused
11 RWX SCAN_REGION_UNIT7: scan clock region 7 - unused
12 RWX SCAN_REGION_UNIT8: scan clock region 8 - unused
13 RWX SCAN_REGION_UNIT9: scan clock region 9 - unused
14 RWX SCAN_REGION_UNIT10: scan clock region 10 - reserved
15 RWX SCAN_REGION_UNIT11: scan clock region 11 - unused
16 RWX SCAN_REGION_UNIT12: scan clock region 12 - unused
17 RWX SCAN_REGION_UNIT13: scan clock region 13 - unused
18 RWX SCAN_REGION_UNIT14: scan clock region 14 - unused
19:47 RO constant=0b00000000000000000000000000000
48 RW SCAN_TYPE_FUNC: scan chain func (functional)
49 RW SCAN_TYPE_CFG: scan chain mode (boot config and debug config)
50 RW SCAN_TYPE_CCFG_GPTR: scan chain ccfg / gptr (Pervasive: CC config, Others: GPTR)
51 RW SCAN_TYPE_REGF: scan chain regf (register files)
52 RW SCAN_TYPE_LBIST: scan chain lbst (LBIST)
53 RW SCAN_TYPE_ABIST: scan chain abst (ABIST)
54 RW SCAN_TYPE_REPR: scan chain repr (Array Repair)
55 RW SCAN_TYPE_TIME: scan chain time (Array Timing)
56 RW SCAN_TYPE_BNDY: scan chain bndy (Boundary IO's)
57 RW SCAN_TYPE_FARR: scan chain farr (fast array unload)
58 RW SCAN_TYPE_CMSK: scan chain cmsk (lbist channel mask)
59 RW SCAN_TYPE_INEX: scan chain idex (c14 asic)
60:63 RO constant=0b0000

start/stop of Clocks
Addr: 0000000003030006 (SCOM)
Name:TP.TCN1.N1.CLK_REGION
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TCN1.N1.EPS.CC.CLOCK_MUX.CLOCK_CMD_Q_INST.LATC.L2(0:3) [0000]
4:18TP.TCN1.N1.EPS.CC.CCFG.CLOCK_REGION_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:14) [000000000000000]
48:50TP.TCN1.N1.EPS.CC.CCFG.CLOCK_TYPE_INST.CCFG_Q_INST.FSILAT.LATC.L2(0:2) [000]
52TP.TCN1.N1.EPS.CC.CLOCK_MUX.CLOCK_PULSE_USE_EVEN_Q_INST.LATC.L2(0) [0]
53TP.TCN1.N1.EPS.CC.CLOCK_MUX.CLOCK_START_RUNN_SUPPR_FIRST_CLK_Q_INST.LATC.L2(0) [0]
54TP.TCN1.N1.EPS.CC.CLOCK_MUX.CLOCK_STOP_RUNN_SUPPR_LAST_CLK_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:1 RWX CLOCK_CMD: command for clock control: 00 NOP 01 START 10 STOP 11 PULSE (one pulse)
2 RWX SLAVE_MODE: when selected, Clock Command will wait for Master chiplet to get started. Bit gets cleared after incoming Slave trigger and Keep_MS_Mode_after_trigger is set to 0
3 RWX MASTER_MODE: when selected, Clock Command will send out trigger to all Slave chiplets - Bit gets cleared after sending out one Master trigger and Keep_MS_Mode_after_trigger is set to 0
4 RWX CLOCK_REGION_PERV: for clock region perv (Pervasive)
5 RWX CLOCK_REGION_UNIT1: for clock region 1 - unused
6 RWX CLOCK_REGION_UNIT2: for clock region 2 - fbc
7 RWX CLOCK_REGION_UNIT3: for clock region 3 - unused
8 RWX CLOCK_REGION_UNIT4: for clock region 4 - pe
9 RWX CLOCK_REGION_UNIT5: for clock region 5 - mm
10 RWX CLOCK_REGION_UNIT6: for clock region 6 - unused
11 RWX CLOCK_REGION_UNIT7: for clock region 7 - unused
12 RWX CLOCK_REGION_UNIT8: for clock region 8 - unused
13 RWX CLOCK_REGION_UNIT9: for clock region 9 - unused
14 RWX CLOCK_REGION_UNIT10: for clock region 10 - reserved
15 RWX CLOCK_REGION_UNIT11: for clock region 11 - unused
16 RWX CLOCK_REGION_UNIT12: for clock region 12 - unused
17 RWX CLOCK_REGION_UNIT13: for clock region 13 - unused
18 RWX CLOCK_REGION_UNIT14: for clock region 14 - unused
19:47 RO constant=0b00000000000000000000000000000
48 RWX SEL_THOLD_SL: select sl tholds
49 RWX SEL_THOLD_NSL: select nsl tholds
50 RWX SEL_THOLD_ARY: select array thold
51 RO constant=0b0
52 RW CLOCK_PULSE_USE_EVEN: For dual mesh support: default for pulse is ODD phase, when this bit is set, pulse will by applied on EVEN phase
53 RW CLOCK_START_RUNN_SUPPR_FIRST_CLK: For dual mesh support or 2:1 CC : A clock start or a RUNN will skip the first clock (EVEN) and starts with the ODD clock.
54 RW CLOCK_STOP_RUNN_SUPPR_LAST_CLK: For dual mesh support or 2:1 CC : A clock stop or a RUNN will skip the last clock (ODD) and stops earlier with an EVEN clock.
55:63 RO constant=0b000000000

Clocks running sl
Addr: 0000000003030008 (SCOM)
Name:TP.TCN1.N1.CLOCK_STAT_SL
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
4:18TP.TCN1.N1.EPS.CC.CLOCK_MUX.CLOCK_STATUS_SL_Q_INST.LATC.L2(0:14) [000000000000000]
Bit(s)SCOM Dial: Description
0:3 RO constant=0b1111
4 ROX CLOCK_STATUS_PERV_SL: status of perv sl hld 0=run, 1=stop
5 ROX CLOCK_STATUS_UNIT1_SL: status of region 1 - unused sl hld 0=run, 1=stop
6 ROX CLOCK_STATUS_UNIT2_SL: status of region 2 - fbc sl hld 0=run, 1=stop
7 ROX CLOCK_STATUS_UNIT3_SL: status of region 3 - unused sl hld 0=run, 1=stop
8 ROX CLOCK_STATUS_UNIT4_SL: status of region 4 - pe sl hld 0=run, 1=stop
9 ROX CLOCK_STATUS_UNIT5_SL: status of region 5 - mm sl hld 0=run, 1=stop
10 ROX CLOCK_STATUS_UNIT6_SL: status of region 6 - unused sl hld 0=run, 1=stop
11 ROX CLOCK_STATUS_UNIT7_SL: status of region 7 - unused sl hld 0=run, 1=stop
12 ROX CLOCK_STATUS_UNIT8_SL: status of region 8 - unused sl hld 0=run, 1=stop
13 ROX CLOCK_STATUS_UNIT9_SL: status of region 9 - unused sl hld 0=run, 1=stop
14 ROX CLOCK_STATUS_UNIT10_SL: status of region 10 - reserved sl hld 0=run, 1=stop
15 ROX CLOCK_STATUS_UNIT11_SL: status of region 11 - unused sl hld 0=run, 1=stop
16 ROX CLOCK_STATUS_UNIT12_SL: status of region 12 - unused sl hld 0=run, 1=stop
17 ROX CLOCK_STATUS_UNIT13_SL: status of region 13 - unused sl hld 0=run, 1=stop
18 ROX CLOCK_STATUS_UNIT14_SL: status of region 14 - unused sl hld 0=run, 1=stop
19:63 RO constant=0b111111111111111111111111111111111111111111111

Clocks running nsl
Addr: 0000000003030009 (SCOM)
Name:TP.TCN1.N1.CLOCK_STAT_NSL
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
4:18TP.TCN1.N1.EPS.CC.CLOCK_MUX.CLOCK_STATUS_NSL_Q_INST.LATC.L2(0:14) [000000000000000]
Bit(s)SCOM Dial: Description
0:3 RO constant=0b1111
4 ROX CLOCK_STATUS_PERV_NSL: status of perv nsl hld 0=run, 1=stop
5 ROX CLOCK_STATUS_UNIT1_NSL: status of region 1 - unused nsl hld 0=run, 1=stop
6 ROX CLOCK_STATUS_UNIT2_NSL: status of region 2 - fbc nsl hld 0=run, 1=stop
7 ROX CLOCK_STATUS_UNIT3_NSL: status of region 3 - unused nsl hld 0=run, 1=stop
8 ROX CLOCK_STATUS_UNIT4_NSL: status of region 4 - pe nsl hld 0=run, 1=stop
9 ROX CLOCK_STATUS_UNIT5_NSL: status of region 5 - mm nsl hld 0=run, 1=stop
10 ROX CLOCK_STATUS_UNIT6_NSL: status of region 6 - unused nsl hld 0=run, 1=stop
11 ROX CLOCK_STATUS_UNIT7_NSL: status of region 7 - unused nsl hld 0=run, 1=stop
12 ROX CLOCK_STATUS_UNIT8_NSL: status of region 8 - unused nsl hld 0=run, 1=stop
13 ROX CLOCK_STATUS_UNIT9_NSL: status of region 9 - unused nsl hld 0=run, 1=stop
14 ROX CLOCK_STATUS_UNIT10_NSL: status of region 10 - reserved nsl hld 0=run, 1=stop
15 ROX CLOCK_STATUS_UNIT11_NSL: status of region 11 - unused nsl hld 0=run, 1=stop
16 ROX CLOCK_STATUS_UNIT12_NSL: status of region 12 - unused nsl hld 0=run, 1=stop
17 ROX CLOCK_STATUS_UNIT13_NSL: status of region 13 - unused nsl hld 0=run, 1=stop
18 ROX CLOCK_STATUS_UNIT14_NSL: status of region 14 - unused nsl hld 0=run, 1=stop
19:63 RO constant=0b111111111111111111111111111111111111111111111

Clocks running ary
Addr: 000000000303000A (SCOM)
Name:TP.TCN1.N1.CLOCK_STAT_ARY
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
4:18TP.TCN1.N1.EPS.CC.CLOCK_MUX.CLOCK_STATUS_ARY_Q_INST.LATC.L2(0:14) [000000000000000]
Bit(s)SCOM Dial: Description
0:3 RO constant=0b1111
4 ROX CLOCK_STATUS_PERV_ARY: status of perv ary hld 0=run, 1=stop
5 ROX CLOCK_STATUS_UNIT1_ARY: status of region 1 - unused ary hld 0=run, 1=stop
6 ROX CLOCK_STATUS_UNIT2_ARY: status of region 2 - fbc ary hld 0=run, 1=stop
7 ROX CLOCK_STATUS_UNIT3_ARY: status of region 3 - unused ary hld 0=run, 1=stop
8 ROX CLOCK_STATUS_UNIT4_ARY: status of region 4 - pe ary hld 0=run, 1=stop
9 ROX CLOCK_STATUS_UNIT5_ARY: status of region 5 - mm ary hld 0=run, 1=stop
10 ROX CLOCK_STATUS_UNIT6_ARY: status of region 6 - unused ary hld 0=run, 1=stop
11 ROX CLOCK_STATUS_UNIT7_ARY: status of region 7 - unused ary hld 0=run, 1=stop
12 ROX CLOCK_STATUS_UNIT8_ARY: status of region 8 - unused ary hld 0=run, 1=stop
13 ROX CLOCK_STATUS_UNIT9_ARY: status of region 9 - unused ary hld 0=run, 1=stop
14 ROX CLOCK_STATUS_UNIT10_ARY: status of region 10 - reserved ary hld 0=run, 1=stop
15 ROX CLOCK_STATUS_UNIT11_ARY: status of region 11 - unused ary hld 0=run, 1=stop
16 ROX CLOCK_STATUS_UNIT12_ARY: status of region 12 - unused ary hld 0=run, 1=stop
17 ROX CLOCK_STATUS_UNIT13_ARY: status of region 13 - unused ary hld 0=run, 1=stop
18 ROX CLOCK_STATUS_UNIT14_ARY: status of region 14 - unused ary hld 0=run, 1=stop
19:63 RO constant=0b111111111111111111111111111111111111111111111

ABIST and IOBIST per region
Addr: 000000000303000B (SCOM)
Name:TP.TCN1.N1.BIST
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TCN1.N1.EPS.CC.BIST.BIST_CONFIG_Q_INST.LATC.L2(0:3) [0000]
4:18TP.TCN1.N1.EPS.CC.BIST.BIST_REGIONS_Q_INST.LATC.L2(0:14) [000000000000000]
48TP.TCN1.N1.EPS.CC.BIST.BIST_SETUP_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 RW TC_BIST_START_TEST_DC: keep this 0 during ABIST/IOBIST. It could be used to bypass the RUNN start. When this bit is set, the BIST_START_TEST will go high immediately without waiting for RUNN. BIST will start with the first hld clock cycle.
1 RW TC_SRAM_ABIST_MODE_DC: select the ABIST engines for SRAMs
2 RW UNUSED_BC2: unused
3 RW TC_IOBIST_MODE_DC: select the IOBIST engines
4 RW BIST_REGION_PERV: region perv: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
5 RW BIST_REGION_UNIT1: region 1 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
6 RW BIST_REGION_UNIT2: region 2 - fbc: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
7 RW BIST_REGION_UNIT3: region 3 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
8 RW BIST_REGION_UNIT4: region 4 - pe: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
9 RW BIST_REGION_UNIT5: region 5 - mm: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
10 RW BIST_REGION_UNIT6: region 6 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
11 RW BIST_REGION_UNIT7: region 7 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
12 RW BIST_REGION_UNIT8: region 8 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
13 RW BIST_REGION_UNIT9: region 9 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
14 RW BIST_REGION_UNIT10: region 10 - reserved: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
15 RW BIST_REGION_UNIT11: region 11 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
16 RW BIST_REGION_UNIT12: region 12 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
17 RW BIST_REGION_UNIT13: region 13 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
18 RW BIST_REGION_UNIT14: region 14 - unused: 1=BIST_START_TEST for this region will be triggered, 0=region take not part of the ABIST/IOBIST run.
19:47 RO constant=0b00000000000000000000000000000
48 RW BIST_STROBE_WINDOW_EN: Enable Strobe window only in TE=1 mode OPCGGO tester pin is enabling ABIST compare, once ABIST has been started. Special setup in ABIST engine is required. default is 0. System mode can not enable this feature
49:63 RO constant=0b000000000000000

XSTOP per region
Addr: 000000000303000C (SCOM)
Name:TP.TCN1.N1.XSTOP1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TCN1.N1.EPS.CC.XSTOP1.XSTOP_CONFIG_Q_INST.LATC.L2(0:3) [0000]
4:18TP.TCN1.N1.EPS.CC.XSTOP1.XSTOP_REGIONS_Q_INST.LATC.L2(0:14) [000000000000000]
48:59TP.TCN1.N1.EPS.CC.XSTOP1.XSTOP_WAITS_Q_INST.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0 RW XSTOP1_ENABLE: enable xstop to clockstop of selected regions, 0 = ignore chkstop, 1= stop on chkstop
1 RW XSTOP1_WAIT_SNOPA: wait for SNOP align to stop clocks on checkstop
2 RW XSTOP1_TRIGGER_OPCG_GO: trigger opcg on xstop instead of performing clockstop
3 RW XSTOP1_WAIT_ALWAYS: when set to 1, xstop will wait independent from flush, default is no wait, when flush in not set
4 RW XSTOP1_REGION_PERV: region perv: 1=region will be stopped, 0=region will keep running on xstop
5 RW XSTOP1_REGION_UNIT1: region 1 - unused: 1=region will be stopped, 0=region will keep running on xstop
6 RW XSTOP1_REGION_UNIT2: region 2 - fbc: 1=region will be stopped, 0=region will keep running on xstop
7 RW XSTOP1_REGION_UNIT3: region 3 - unused: 1=region will be stopped, 0=region will keep running on xstop
8 RW XSTOP1_REGION_UNIT4: region 4 - pe: 1=region will be stopped, 0=region will keep running on xstop
9 RW XSTOP1_REGION_UNIT5: region 5 - mm: 1=region will be stopped, 0=region will keep running on xstop
10 RW XSTOP1_REGION_UNIT6: region 6 - unused: 1=region will be stopped, 0=region will keep running on xstop
11 RW XSTOP1_REGION_UNIT7: region 7 - unused: 1=region will be stopped, 0=region will keep running on xstop
12 RW XSTOP1_REGION_UNIT8: region 8 - unused: 1=region will be stopped, 0=region will keep running on xstop
13 RW XSTOP1_REGION_UNIT9: region 9 - unused: 1=region will be stopped, 0=region will keep running on xstop
14 RW XSTOP1_REGION_UNIT10: region 10 - reserved: 1=region will be stopped, 0=region will keep running on xstop
15 RW XSTOP1_REGION_UNIT11: region 11 - unused: 1=region will be stopped, 0=region will keep running on xstop
16 RW XSTOP1_REGION_UNIT12: region 12 - unused: 1=region will be stopped, 0=region will keep running on xstop
17 RW XSTOP1_REGION_UNIT13: region 13 - unused: 1=region will be stopped, 0=region will keep running on xstop
18 RW XSTOP1_REGION_UNIT14: region 14 - unused: 1=region will be stopped, 0=region will keep running on xstop
19:47 RO constant=0b00000000000000000000000000000
48:59 RW XSTOP1_WAIT_CYCLES: Defines, how many cycle xstop will wait after dropping flush, before tholds get dropped. 0-4095 cycles possible
60:63 RO constant=0b0000

XSTOP per region
Addr: 000000000303000D (SCOM)
Name:TP.TCN1.N1.XSTOP2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TCN1.N1.EPS.CC.XSTOP2.XSTOP_CONFIG_Q_INST.LATC.L2(0:3) [0000]
4:18TP.TCN1.N1.EPS.CC.XSTOP2.XSTOP_REGIONS_Q_INST.LATC.L2(0:14) [000000000000000]
48:59TP.TCN1.N1.EPS.CC.XSTOP2.XSTOP_WAITS_Q_INST.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0 RW XSTOP2_ENABLE: enable xstop to clockstop of select regions, 0 = ignore chkstop, 1= stop on chkstop
1 RW XSTOP2_WAIT_SNOPA: wait for SNOP align to stop clocks on checkstop
2 RW XSTOP2_TRIGGER_OPCG_GO: trigger opcg on xstop instead of performing clockstop
3 RW XSTOP2_WAIT_ALWAYS: when set to 1, xstop will wait independent from flush, default is no wait, when flush in not set
4 RW XSTOP2_REGION_PERV: region perv: 1=region will be stopped, 0=region will keep running on xstop
5 RW XSTOP2_REGION_UNIT1: region 1 - unused: 1=region will be stopped, 0=region will keep running on xstop
6 RW XSTOP2_REGION_UNIT2: region 2 - fbc: 1=region will be stopped, 0=region will keep running on xstop
7 RW XSTOP2_REGION_UNIT3: region 3 - unused: 1=region will be stopped, 0=region will keep running on xstop
8 RW XSTOP2_REGION_UNIT4: region 4 - pe: 1=region will be stopped, 0=region will keep running on xstop
9 RW XSTOP2_REGION_UNIT5: region 5 - mm: 1=region will be stopped, 0=region will keep running on xstop
10 RW XSTOP2_REGION_UNIT6: region 6 - unused: 1=region will be stopped, 0=region will keep running on xstop
11 RW XSTOP2_REGION_UNIT7: region 7 - unused: 1=region will be stopped, 0=region will keep running on xstop
12 RW XSTOP2_REGION_UNIT8: region 8 - unused: 1=region will be stopped, 0=region will keep running on xstop
13 RW XSTOP2_REGION_UNIT9: region 9 - unused: 1=region will be stopped, 0=region will keep running on xstop
14 RW XSTOP2_REGION_UNIT10: region 10 - reserved: 1=region will be stopped, 0=region will keep running on xstop
15 RW XSTOP2_REGION_UNIT11: region 11 - unused: 1=region will be stopped, 0=region will keep running on xstop
16 RW XSTOP2_REGION_UNIT12: region 12 - unused: 1=region will be stopped, 0=region will keep running on xstop
17 RW XSTOP2_REGION_UNIT13: region 13 - unused: 1=region will be stopped, 0=region will keep running on xstop
18 RW XSTOP2_REGION_UNIT14: region 14 - unused: 1=region will be stopped, 0=region will keep running on xstop
19:47 RO constant=0b00000000000000000000000000000
48:59 RW XSTOP2_WAIT_CYCLES: Defines, how many cycle xstop will wait after dropping flush, before tholds get dropped. 0-4095 cycles possible
60:63 RO constant=0b0000

XSTOP per region
Addr: 000000000303000E (SCOM)
Name:TP.TCN1.N1.XSTOP3
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TCN1.N1.EPS.CC.XSTOP3.XSTOP_CONFIG_Q_INST.LATC.L2(0:3) [0000]
4:18TP.TCN1.N1.EPS.CC.XSTOP3.XSTOP_REGIONS_Q_INST.LATC.L2(0:14) [000000000000000]
48:59TP.TCN1.N1.EPS.CC.XSTOP3.XSTOP_WAITS_Q_INST.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0 RW XSTOP3_ENABLE: enable xstop to clockstop of select regions, 0 = ignore chkstop, 1= stop on chkstop
1 RW XSTOP3_WAIT_SNOPA: wait for SNOP align to stop clocks on checkstop
2 RW XSTOP3_TRIGGER_OPCG_GO: trigger opcg on xstop instead of performing clockstop
3 RW XSTOP3_WAIT_ALWAYS: when set to 1, xstop will wait independent from flush, default is no wait, when flush in not set
4 RW XSTOP3_REGION_PERV: region perv: 1=region will be stopped, 0=region will keep running on xstop
5 RW XSTOP3_REGION_UNIT1: region 1 - unused: 1=region will be stopped, 0=region will keep running on xstop
6 RW XSTOP3_REGION_UNIT2: region 2 - fbc: 1=region will be stopped, 0=region will keep running on xstop
7 RW XSTOP3_REGION_UNIT3: region 3 - unused: 1=region will be stopped, 0=region will keep running on xstop
8 RW XSTOP3_REGION_UNIT4: region 4 - pe: 1=region will be stopped, 0=region will keep running on xstop
9 RW XSTOP3_REGION_UNIT5: region 5 - mm: 1=region will be stopped, 0=region will keep running on xstop
10 RW XSTOP3_REGION_UNIT6: region 6 - unused: 1=region will be stopped, 0=region will keep running on xstop
11 RW XSTOP3_REGION_UNIT7: region 7 - unused: 1=region will be stopped, 0=region will keep running on xstop
12 RW XSTOP3_REGION_UNIT8: region 8 - unused: 1=region will be stopped, 0=region will keep running on xstop
13 RW XSTOP3_REGION_UNIT9: region 9 - unused: 1=region will be stopped, 0=region will keep running on xstop
14 RW XSTOP3_REGION_UNIT10: region 10 - reserved: 1=region will be stopped, 0=region will keep running on xstop
15 RW XSTOP3_REGION_UNIT11: region 11 - unused: 1=region will be stopped, 0=region will keep running on xstop
16 RW XSTOP3_REGION_UNIT12: region 12 - unused: 1=region will be stopped, 0=region will keep running on xstop
17 RW XSTOP3_REGION_UNIT13: region 13 - unused: 1=region will be stopped, 0=region will keep running on xstop
18 RW XSTOP3_REGION_UNIT14: region 14 - unused: 1=region will be stopped, 0=region will keep running on xstop
19:47 RO constant=0b00000000000000000000000000000
48:59 RW XSTOP3_WAIT_CYCLES: Defines, how many cycle xstop will wait after dropping flush, before tholds get dropped. 0-4095 cycles possible
60:63 RO constant=0b0000

Error Status of CC
Addr: 000000000303000F (SCOM)
Name:TP.TCN1.N1.ERROR_STATUS
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_0_INST.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_1_INST.LATC.L2(1) [0]
2TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_2_INST.LATC.L2(2) [0]
3TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_3_INST.LATC.L2(3) [0]
4TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_4_INST.LATC.L2(4) [0]
5TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_5_INST.LATC.L2(5) [0]
6TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_6_INST.LATC.L2(6) [0]
7TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_7_INST.LATC.L2(7) [0]
8TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_8_INST.LATC.L2(8) [0]
9TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_9_INST.LATC.L2(9) [0]
10TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_10_INST.LATC.L2(10) [0]
11TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_11_INST.LATC.L2(11) [0]
12TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_12_INST.LATC.L2(12) [0]
13TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_13_INST.LATC.L2(13) [0]
14TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_14_INST.LATC.L2(14) [0]
15TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_15_INST.LATC.L2(15) [0]
16TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_16_INST.LATC.L2(16) [0]
17TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_17_INST.LATC.L2(17) [0]
18TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_18_INST.LATC.L2(18) [0]
19TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_19_INST.LATC.L2(19) [0]
20TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_20_INST.LATC.L2(20) [0]
21TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_21_INST.LATC.L2(21) [0]
22TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_22_INST.LATC.L2(22) [0]
23TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_23_INST.LATC.L2(23) [0]
24TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_24_INST.LATC.L2(24) [0]
25TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_25_INST.LATC.L2(25) [0]
26TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_26_INST.LATC.L2(26) [0]
27TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_27_INST.LATC.L2(27) [0]
28TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_28_INST.LATC.L2(28) [0]
29TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_29_INST.LATC.L2(29) [0]
30TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_30_INST.LATC.L2(30) [0]
31TP.TCN1.N1.EPS.CC.ERROR.ERROR_REG_Q_31_INST.LATC.L2(31) [0]
Bit(s)SCOM Dial: Description
0 RWX PCB_WRITE_NOT_ALLOWED_ERR: write on read only register
1 RWX PCB_READ_NOT_ALLOWED_ERR: read not allowed, maybe write only register
2 RWX PCB_PARITY_ON_CMD_ERR: parity error on cmd
3 RWX PCB_ADDRESS_NOT_VALID_ERR: invalid address
4 RWX PCB_PARITY_ON_ADDR_ERR: parity error on addr
5 RWX PCB_PARITY_ON_DATA_ERR: parity error on data
6 RWX PCB_PROTECTED_ACCESS_INVALID_ERR: protection violation
7 RWX PCB_PARITY_ON_SPCIF_ERR: parity error on spcif
8 RWX PCB_WRITE_AND_OPCG_IP_ERR: pcb write while OPCG is running
9 RWX SCAN_READ_AND_OPCG_IP_ERR: scan read when opcg is running
10 RWX CLOCK_CMD_CONFLICT_ERR: clock cmd in progress
11 RWX SCAN_COLLISION_ERR: scan region selected of running region
12 RWX PREVENTED_SCAN_COLLISION_ERR: PCB request to set scan region which is running
13 RWX OPCG_TRIGGER_ERR: OPCG gets triggered while OPCG is running
14 RWX PHASE_CNT_CORRUPTION_ERR: phase counters inside chiplet out of sync
15 RWX CLOCK_CMD_PREVENTED_ERR: security or scan collision prevented a clock start
16 RWX PARITY_ON_OPCG_SM_ERR: parity error on OPCG state machine
17 RWX PARITY_ON_CLOCK_MUX_REG_ERR: parity error on scan/clock region/type or clock status reg
18 RWX PARITY_ON_OPCG_REG_ERR: parity error on OPCG regs
19 RWX PARITY_ON_SYNC_CONFIG_REG_ERR: parity error on sync config reg
20 RWX PARITY_ON_XSTOP_REG_ERR: parity error on xstop reg
21 RWX PARITY_ON_GPIO_REG_ERR: parity error on GP0,4,5,6 regs
22 RWX CLKCMD_REQUEST_ERR: region clkcmd has two requests start and stop at the same time start clkcmd will win, but this still causes this error bit go high
23 RWX CBS_PROTOCOL_ERR: CBS protocol error - REQ / ACK sequence wrong ERROR is when REQ goes low before ACK goes high
24 RWX VITL_ALIGN_ERR: VITL alignment is out of sync to sync pulse
25 RWX UNIT_SYNC_LVL_ERR: Unit0 and Unit1 sync lvl pulse are not in sync - AVP broken
26 RWX PARITY_ON_SELFBOOT_CMD_STATE_ERR: Parity error on selfboot cmd state
27 RWX OPCG_STOPPED_BY_PCB_ERR: OPCG has been stopped by write on a new register
28 RWX UNUSED_ERROR28: unused
29 RWX UNUSED_ERROR29: unused
30 RWX UNUSED_ERROR30: unused
31 RWX UNUSED_ERROR31: unused

OPCG Control Register Capture1
Addr: 0000000003030010 (SCOM)
Name:TP.TCN1.N1.OPCG_CAPT1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CC.OPCG.OPCG_CAPT1_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RW COUNT: 0000=12 cycle 0001 - 1100= cycle 1-12 1101-1111=24 normal, no fast
4:8 RW SEQ_01: sequence cycle 1 for normal/slow region (sl, nsl, ary, se, fce)
9:13 RW SEQ_02: sequence cycle 2 for normal/slow region (sl, nsl, ary, se, fce)
14:18 RW SEQ_03: sequence cycle 3 for normal/slow region (sl, nsl, ary, se, fce)
19:23 RW SEQ_04: sequence cycle 4 for normal/slow region (sl, nsl, ary, se, fce)
24:28 RW SEQ_05: sequence cycle 5 for normal/slow region (sl, nsl, ary, se, fce)
29:33 RW SEQ_06: sequence cycle 6 for normal/slow region (sl, nsl, ary, se, fce)
34:38 RW SEQ_07: sequence cycle 7 for normal/slow region (sl, nsl, ary, se, fce)
39:43 RW SEQ_08: sequence cycle 8 for normal/slow region (sl, nsl, ary, se, fce)
44:48 RW SEQ_09: sequence cycle 9 for normal/slow region (sl, nsl, ary, se, fce)
49:53 RW SEQ_10: sequence cycle 10 for normal/slow region (sl, nsl, ary, se, fce)
54:58 RW SEQ_11: sequence cycle 11 for normal/slow region (sl, nsl, ary, se, fce)
59:63 RW SEQ_12: sequence cycle 12 for normal/slow region (sl, nsl, ary, se, fce)

OPCG Control Register Capture 2
Addr: 0000000003030011 (SCOM)
Name:TP.TCN1.N1.OPCG_CAPT2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CC.OPCG.OPCG_CAPT2_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RW UNUSED_CAPT2:
4:8 RW SEQ_13_01EVEN: sequence cycle 1 - even - for fast region or cycle 13 for normal region (sl, nsl, ary, se, fce)
9:13 RW SEQ_14_01ODD: sequence cycle 1 - odd - for fast region or cycle 14 for normal region (sl, nsl, ary, se, fce)
14:18 RW SEQ_15_02EVEN: sequence cycle 2 - even - for fast region or cycle 15 for normal region (sl, nsl, ary, se, fce)
19:23 RW SEQ_16_02ODD: sequence cycle 2 - odd - for fast region or cycle 16 for normal region (sl, nsl, ary, se, fce)
24:28 RW SEQ_17_03EVEN: sequence cycle 3 - even - for fast region or cycle 17 for normal region (sl, nsl, ary, se, fce)
29:33 RW SEQ_18_03ODD: sequence cycle 3 - odd - for fast region or cycle 18 for normal region (sl, nsl, ary, se, fce)
34:38 RW SEQ_19_04EVEN: sequence cycle 4 - even - for fast region or cycle 19 for normal region (sl, nsl, ary, se, fce)
39:43 RW SEQ_20_04ODD: sequence cycle 4 - odd - for fast region or cycle 20 for normal region (sl, nsl, ary, se, fce)
44:48 RW SEQ_21_05EVEN: sequence cycle 5 - even - for fast region or cycle 21 for normal region (sl, nsl, ary, se, fce)
49:53 RW SEQ_22_05ODD: sequence cycle 5 - odd - for fast region or cycle 22 for normal region (sl, nsl, ary, se, fce)
54:58 RW SEQ_23_06EVEN: sequence cycle 6 - even - for fast region or cycle 23 for normal region (sl, nsl, ary, se, fce)
59:63 RW SEQ_24_06ODD: sequence cycle 6 - odd - for fast region or cycle 24 for normal region (sl, nsl, ary, se, fce)

OPCG Control Register Capture 3
Addr: 0000000003030012 (SCOM)
Name:TP.TCN1.N1.OPCG_CAPT3
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CC.OPCG.OPCG_CAPT3_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:3 RW UNUSED_CAPT3:
4:8 RW SEQ_07EVEN: sequence cycle 7 - even - for fast region (sl, nsl, ary, se, fce)
9:13 RW SEQ_07ODD: sequence cycle 7 - odd - for fast region (sl, nsl, ary, se, fce)
14:18 RW SEQ_08EVEN: sequence cycle 8 - even - for fast region (sl, nsl, ary, se, fce)
19:23 RW SEQ_08ODD: sequence cycle 8 - odd - for fast region (sl, nsl, ary, se, fce)
24:28 RW SEQ_09EVEN: sequence cycle 9 - even - for fast region (sl, nsl, ary, se, fce)
29:33 RW SEQ_09ODD: sequence cycle 9 - odd - for fast region (sl, nsl, ary, se, fce)
34:38 RW SEQ_10EVEN: sequence cycle 10 - even - for fast region (sl, nsl, ary, se, fce)
39:43 RW SEQ_10ODD: sequence cycle 10 - odd - for fast region (sl, nsl, ary, se, fce)
44:48 RW SEQ_11EVEN: sequence cycle 11 - even - for fast region (sl, nsl, ary, se, fce)
49:53 RW SEQ_11ODD: sequence cycle 11 - odd - for fast region (sl, nsl, ary, se, fce)
54:58 RW SEQ_12EVEN: sequence cycle 12 - even - for fast region (sl, nsl, ary, se, fce)
59:63 RW SEQ_12ODD: sequence cycle 12 - odd - for fast region (sl, nsl, ary, se, fce)

Debug CBS CC Register
Addr: 0000000003030013 (SCOM)
Name:TP.TCN1.N1.DBG_CBS_CC
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CC.SELFBOOT.DBG_CBS_CC_REG_Q_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX DBG_RESET_EP: Reset Endpoint - Is the CC and CTRL in reset state
1 ROX DBG_OPCG_IP: OPCG in progress, not in idle
2 ROX DBG_VITL_CLKOFF: VITL HLD stopped, when enabled, need plat-depth cycles to switch this latch
3 ROX DBG_TEST_ENABLE: Test Enable
4 ROX DBG_CBS_REQ: CBS Interface - Request (Latched)
5:7 ROX DBG_CBS_CMD: CBS Interface - Command (Latched)
8:12 ROX DBG_CBS_STATE: CBS Command State Machine 00000=Idle
13 ROX DBG_SECURITY_DEBUG_MODE: status of the security mode bit
14 ROX DBG_CBS_PROTOCOL_ERROR: CBS Protocol Error - REQ raised, although state machine is not in IDLE - need reset_ep to clear this bit. No impact on IPL
15 ROX DBG_PCB_IDLE: PCB Interface in IDLE state
16:19 ROX DBG_CURRENT_OPCG_MODE: current / latest OPCG MODE - 0=NOP, 1=LBIST, 2=ABIST, 3=RUNN, 4=SCAN0, 5=SCAN, 6=SCAN rotate, 7=SCAN w UpdateDR, 8=SCAN w CaptureDR, 9=nonblocking SCAN, 10=CLK Change Request, 11-15=unused
20:23 ROX DBG_LAST_OPCG_MODE: previous OPCG MODE
24 ROX DBG_PCB_ERROR: PCB Interface Error, read CC Error Reg or set CBS_CMD=001 to switch FSI CBS Debug Information to CC Error Register.
25 ROX DBG_PARITY_ERROR: Any Parity Error, non PCB Parity - read CC Error Reg or set CBS_CMD=001 to switch FSI CBS Debug Information to CC Error Register.
26 ROX DBG_CC_ERROR: Any other CC Error - read CC Error Reg or set CBS_CMD=001 to switch FSI CBS Debug Information to CC Error Register.
27 ROX DBG_CHIPLET_IS_ALIGNED: Is 1 when the a valid align pulse ws send out.
28 ROX DBG_PCB_REQUEST_SINCE_RESET: RESET will clear that bit, the first PCB request will set it.
29 ROX DBG_PARANOIA_TEST_ENABLE_CHANGE: rising or falling edge on test enable, after reset - need reset_ep to clear, no impact on IPL
30 ROX DBG_PARANOIA_VITL_CLKOFF_CHANGE: rising or falling edge on vitl_clkoff, after reset - need reset_ep to clear, no impact on IPL
31 ROX TP_TPFSI_CBS_ACK: only represenation of CC ack signal going to FSI

XSTOP per region
Addr: 0000000003030014 (SCOM)
Name:TP.TCN1.N1.XSTOP4
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TCN1.N1.EPS.CC.XSTOP4.XSTOP_CONFIG_Q_INST.LATC.L2(0:3) [0000]
4:18TP.TCN1.N1.EPS.CC.XSTOP4.XSTOP_REGIONS_Q_INST.LATC.L2(0:14) [000000000000000]
48:59TP.TCN1.N1.EPS.CC.XSTOP4.XSTOP_WAITS_Q_INST.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0 RW XSTOP4_ENABLE: enable xstop to clockstop of selected regions, 0 = ignore chkstop, 1= stop on chkstop
1 RW XSTOP4_WAIT_SNOPA: wait for SNOP align to stop clocks on checkstop
2 RW XSTOP4_TRIGGER_OPCG_GO: trigger opcg on xstop instead of performing clockstop
3 RW XSTOP4_WAIT_ALWAYS: when set to 1, xstop will wait independent from flush, default is no wait, when flush in not set
4 RW XSTOP4_REGION_PERV: region perv: 1=region will be stopped, 0=region will keep running on xstop
5 RW XSTOP4_REGION_UNIT1: region 1 - unused: 1=region will be stopped, 0=region will keep running on xstop
6 RW XSTOP4_REGION_UNIT2: region 2 - fbc: 1=region will be stopped, 0=region will keep running on xstop
7 RW XSTOP4_REGION_UNIT3: region 3 - unused: 1=region will be stopped, 0=region will keep running on xstop
8 RW XSTOP4_REGION_UNIT4: region 4 - pe: 1=region will be stopped, 0=region will keep running on xstop
9 RW XSTOP4_REGION_UNIT5: region 5 - mm: 1=region will be stopped, 0=region will keep running on xstop
10 RW XSTOP4_REGION_UNIT6: region 6 - unused: 1=region will be stopped, 0=region will keep running on xstop
11 RW XSTOP4_REGION_UNIT7: region 7 - unused: 1=region will be stopped, 0=region will keep running on xstop
12 RW XSTOP4_REGION_UNIT8: region 8 - unused: 1=region will be stopped, 0=region will keep running on xstop
13 RW XSTOP4_REGION_UNIT9: region 9 - unused: 1=region will be stopped, 0=region will keep running on xstop
14 RW XSTOP4_REGION_UNIT10: region 10 - reserved: 1=region will be stopped, 0=region will keep running on xstop
15 RW XSTOP4_REGION_UNIT11: region 11 - unused: 1=region will be stopped, 0=region will keep running on xstop
16 RW XSTOP4_REGION_UNIT12: region 12 - unused: 1=region will be stopped, 0=region will keep running on xstop
17 RW XSTOP4_REGION_UNIT13: region 13 - unused: 1=region will be stopped, 0=region will keep running on xstop
18 RW XSTOP4_REGION_UNIT14: region 14 - unused: 1=region will be stopped, 0=region will keep running on xstop
19:47 RO constant=0b00000000000000000000000000000
48:59 RW XSTOP4_WAIT_CYCLES: Defines, how many cycle xstop will wait after dropping flush, before tholds get dropped. 0-4095 cycles possible
60:63 RO constant=0b0000

XSTOP per region
Addr: 0000000003030015 (SCOM)
Name:TP.TCN1.N1.XSTOP5
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TCN1.N1.EPS.CC.XSTOP5.XSTOP_CONFIG_Q_INST.LATC.L2(0:3) [0000]
4:18TP.TCN1.N1.EPS.CC.XSTOP5.XSTOP_REGIONS_Q_INST.LATC.L2(0:14) [000000000000000]
48:59TP.TCN1.N1.EPS.CC.XSTOP5.XSTOP_WAITS_Q_INST.LATC.L2(0:11) [000000000000]
Bit(s)SCOM Dial: Description
0 RW XSTOP5_ENABLE: enable xstop to clockstop of selected regions, 0 = ignore chkstop, 1= stop on chkstop
1 RW XSTOP5_WAIT_SNOPA: wait for SNOP align to stop clocks on checkstop
2 RW XSTOP5_TRIGGER_OPCG_GO: trigger opcg on xstop instead of performing clockstop
3 RW XSTOP5_WAIT_ALWAYS: when set to 1, xstop will wait independent from flush, default is no wait, when flush in not set
4 RW XSTOP5_REGION_PERV: region perv: 1=region will be stopped, 0=region will keep running on xstop
5 RW XSTOP5_REGION_UNIT1: region 1 - unused: 1=region will be stopped, 0=region will keep running on xstop
6 RW XSTOP5_REGION_UNIT2: region 2 - fbc: 1=region will be stopped, 0=region will keep running on xstop
7 RW XSTOP5_REGION_UNIT3: region 3 - unused: 1=region will be stopped, 0=region will keep running on xstop
8 RW XSTOP5_REGION_UNIT4: region 4 - pe: 1=region will be stopped, 0=region will keep running on xstop
9 RW XSTOP5_REGION_UNIT5: region 5 - mm: 1=region will be stopped, 0=region will keep running on xstop
10 RW XSTOP5_REGION_UNIT6: region 6 - unused: 1=region will be stopped, 0=region will keep running on xstop
11 RW XSTOP5_REGION_UNIT7: region 7 - unused: 1=region will be stopped, 0=region will keep running on xstop
12 RW XSTOP5_REGION_UNIT8: region 8 - unused: 1=region will be stopped, 0=region will keep running on xstop
13 RW XSTOP5_REGION_UNIT9: region 9 - unused: 1=region will be stopped, 0=region will keep running on xstop
14 RW XSTOP5_REGION_UNIT10: region 10 - reserved: 1=region will be stopped, 0=region will keep running on xstop
15 RW XSTOP5_REGION_UNIT11: region 11 - unused: 1=region will be stopped, 0=region will keep running on xstop
16 RW XSTOP5_REGION_UNIT12: region 12 - unused: 1=region will be stopped, 0=region will keep running on xstop
17 RW XSTOP5_REGION_UNIT13: region 13 - unused: 1=region will be stopped, 0=region will keep running on xstop
18 RW XSTOP5_REGION_UNIT14: region 14 - unused: 1=region will be stopped, 0=region will keep running on xstop
19:47 RO constant=0b00000000000000000000000000000
48:59 RW XSTOP5_WAIT_CYCLES: Defines, how many cycle xstop will wait after dropping flush, before tholds get dropped. 0-4095 cycles possible
60:63 RO constant=0b0000

Region CCFLUSH Status
Addr: 0000000003030016 (SCOM)
Name:TP.TCN1.N1.REGION_CCFLUSH_STATUS
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
4:18TP.TCN1.N1.EPS.CC.CLOCK_MUX.REGION_FLUSHMODE_INH_Q_INST.LATC.L2(0:14) [000000000000000]
Bit(s)SCOM Dial: Description
0:3 RO constant=0b0000
4:18 ROX REGION_CCFLUSH: Region CCFLUSH status - 0=region not in flush, 1= region in flush state
19:63 RO constant=0b000000000000000000000000000000000000000000000

OPCG GO - Start OPCG on WRITE to this register
Addr: 0000000003030020 (SCOM)
Name:TP.TCN1.N1.PCB_OPCG_GO
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.CC.OPCG.PCB_WRITE_OPCG_GO_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 WOX PCB_OPCGGO: opcg go (start OPCG) - write this register to start OPCG

Careful use only: a WRITE of xFACE000000000000 will reset the phase counter. Alignment of the chiplet is broken
Addr: 0000000003030028 (SCOM)
Name:TP.TCN1.N1.PHASE_COUNTER_RESET
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.CC.PCB.PCB_WRITE_RESET_PHASE_COUNTER_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 WOX PHASECOUNTER_RESET: Careful use only: a WRITE of xFACE000000000000 will reset the phase counter. Alignment of the chiplet is broken

OPCG STOP - Stop OPCG when in RUNN or LBIST
Addr: 0000000003030030 (SCOM)
Name:TP.TCN1.N1.PCB_OPCG_STOP
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.CC.OPCG.PCB_WRITE_OPCG_LOOP_STOP_Q_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 WOX PCB_OPCGSTOP: opcg stop (stop OPCG) - write this register to stop OPCG during RUNN or LBIST

CC Protect Mode Register
Addr: 00000000030303FE (SCOM)
Name:TP.TCN1.N1.CC_PROTECT_MODE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.CC.PCB.PCB_IF.PROTECT_MODE.RD_PROTECT_ENA_INST.LATC.L2(0) [0]
1TP.TCN1.N1.EPS.CC.PCB.PCB_IF.PROTECT_MODE.WR_PROTECT_ENA_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 RW CC_READ_PROTECT_ENABLE: Enable read protection
1 RW CC_WRITE_PROTECT_ENABLE: Enable write protection

Atomic Lock Register
Addr: 00000000030303FF (SCOM)
Name:TP.TCN1.N1.CC_ATOMIC_LOCK_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.CC.PCB.PCB_IF.ATOMIC_LOCK.ATOMIC_LOCK_ENA_INST.LATC.L2(0) [0]
1:4TP.TCN1.N1.EPS.CC.PCB.PCB_IF.ATOMIC_LOCK.ATOMIC_ID_Q_INST.LATC.L2(0:3) [0000]
8:15TP.TCN1.N1.EPS.CC.PCB.PCB_IF.ATOMIC_LOCK.ATOMIC_LOCK_ACTIVITY_Q_INST.LATC.L2(0:7) [00000000]
Bit(s)SCOM Dial: Description
0 RW CC_ATOMIC_LOCK_ENABLE: Enable atomic lock
1:4 ROX CC_ATOMIC_ID: Atomic ID
5:7 RO constant=0b000
8:15 ROX CC_ATOMIC_ACTIVITY: Atomic lock counter

Scan in 32bit mode
Addr: 0000000003038000 (SCOM)
Name:TP.TCN1.N1.SCAN32
Constant(s):
Comments:nn38000 - write 32 bit and/or read 64 bit of the scan buffer - no scan cycles will be shifted
nn38001 - nn3801F - write of 01 - 31 bits left aligned into the scan buffer(masking), shifting 01-31 cycles and read 64 bit
nn38020 - write 32 bit, shift 32 bit, read 64 bit scan buffer
nn38nnn - write max 32 bits, rotate nnn cycles, read of the 64bit scan buffer
Order: WRITE - Shift - READ
PCB Timout possible, if scan count is too high or scan ratio to slow
Write max 32 bits (left aligned) - read will respond full 64 bit scan buffer
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CC.SCANPCB.SCANDATA_Q_0_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RW scan32_reg
32:63 RO constant=0b11011110101011011011111011101111

Long rotate scan - Only rotate the ring
Addr: 0000000003039000 (SCOM)
Name:TP.TCN1.N1.SCAN_LONG_ROTATE
Constant(s):
Comments:Used to rotate the ring only, the cycle number is programmmed in the scom data, not in the address
example putscom nn39000 0000123400000000 - will rotate x1234 cycles
PCB network will NOT be blocked - poll opcg done !
SelectedAttributes:
LatchesBitsLatch Name [flushval]
12:31TP.TCN1.N1.EPS.CC.SCANPCB.BIT_COUNT_Q_0_INST.LATC.L2(0:19) [00000000000000000000]
Bit(s)SCOM Dial: Description
0:11 n/a not implemented
12:31 WOX

Scan in 32bit mode with Update DR
Addr: 000000000303A000 (SCOM)
Name:TP.TCN1.N1.SCAN_UPDATEDR
Constant(s):
Comments:see scan32 - after the scan CC will apply a functional clock to update non-scannable latches
used e.g. to load PLL cntrl ring
PCB network blocked until scan has finished - timeout possible
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CC.SCANPCB.SCANDATA_Q_0_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RW scan_updatedr_reg
32:63 RO constant=0b11011110101011011011111011101111

Scan in 32bit mode with Update DR - PCB will not be blocked
Addr: 000000000303B000 (SCOM)
Name:TP.TCN1.N1.SCAN_UPDATEDR_LONG
Constant(s):
Comments:see scan32 - after the scan CC will apply a functional clock to update non-scannable latches
used e.g. to load PLL cntrl ring
PCB network will NOT be blocked - poll opcg done !
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CC.SCANPCB.SCANDATA_Q_0_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 WOX scan_updatedr_long_reg
32:63 RO constant=0b11011110101011011011111011101111

Scan in 32bit mode with CAPTURE DR
Addr: 000000000303C000 (SCOM)
Name:TP.TCN1.N1.SCAN_CAPTUREDR
Constant(s):
Comments:see scan32 - before the scan CC will apply a functional clock to CAPTURE non-scannable latches
used e.g. to unload PLL cntrl ring
PCB network blocked until scan has finished - timeout possible
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CC.SCANPCB.SCANDATA_Q_0_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 RW scan_capturedr_reg
32:63 RO constant=0b11011110101011011011111011101111

Scan in 32bit mode with CAPTURE DR - PCB will not be blocked
Addr: 000000000303D000 (SCOM)
Name:TP.TCN1.N1.SCAN_CAPTUREDR_LONG
Constant(s):
Comments:see scan32 - before the scan CC will apply a functional clock to CAPTURE non-scannable latches
used e.g. to unload PLL cntrl ring
PCB network will NOT be blocked - poll opcg done !
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:31TP.TCN1.N1.EPS.CC.SCANPCB.SCANDATA_Q_0_INST.LATC.L2(0:31) [00000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:31 WOX scan_capturedr_long_reg
32:63 RO constant=0b11011110101011011011111011101111

Scan in 64bit mode
Addr: 000000000303E000 (SCOM)
Name:TP.TCN1.N1.SCAN64
Constant(s):
Comments:nn3E000 - write and/or read of 64 bit scan buffer - no shift
nn3E001 - nn3803F - write of 01 - 63 bits left aligned into the scan buffer(masking), shifting 01-63 cycles and read 64 bit
nn3E040 - write an/or read of 64 bit scan buffer - shift 64 bit - order Write Shift Read
nn3Ennn - write max 64 bit, shift nnn cycles, read max 64 bit
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CC.SCANPCB.SCANDATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW scan64_reg

Scan in 64bit mode - Continues Scanning - non-blocking scan
Addr: 000000000303F000 (SCOM)
Name:TP.TCN1.N1.SCAN64CONTSCAN
Constant(s):
Comments:nn3F000 - write and/or read of 64 bit scan buffer - no shift
nn3F001 - nn3803F - write of 01 - 63 bits left aligned into the scan buffer(masking), shifting 01-63 cycles and read 64 bit
nn3F040 - write an/or read of 64 bit scan buffer - shift 64 bit - order Write Shift Read
nn3Fnnn - write max 64 bit, shift nnn cycles, read max 64 bit
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.CC.SCANPCB.SCANDATA_Q_0_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 RW scan64contscan_reg

XSTOP Register - after masking - OLD XFIR
Addr: 0000000003040000 (SCOM)
Name:TP.TCN1.N1.XSTOP
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:53TP.TCN1.N1.EPS.FIR.COMP.XSTOP_MASKED_REG_Q_INST.LATC.L2(0:53) [000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX ANY_XSTOP: any xstop
1 ROX SYSTEM_XSTOP: system_xstop
2 ROX XSTOP_ANY_SPATTN: any_spattn
3 ROX DBG_FIR_XSTOP_ON_TRIG: dbg_fir_xstop_on_trig
4 ROX XSTOP_PERV: perv
5 ROX XSTOP_IN05: mm_0
6 ROX XSTOP_IN06: mm_1
7 ROX XSTOP_IN07: mcd
8 ROX XSTOP_IN08: unused
9 ROX XSTOP_IN09: hca
10 ROX XSTOP_IN10: ad
11 ROX XSTOP_IN11: unused
12 ROX XSTOP_IN12: unused
13 ROX XSTOP_IN13: pe_0
14 ROX XSTOP_IN14: pe_1
15 ROX XSTOP_IN15: pe_2
16 ROX XSTOP_IN16: IOPSI
17 ROX XSTOP_IN17: pb_0
18 ROX XSTOP_IN18: pb_1
19 ROX XSTOP_IN19: pb_2
20 ROX XSTOP_IN20: pb_3
21 ROX XSTOP_IN21: pb_4
22 ROX XSTOP_IN22: pb_5
23 ROX XSTOP_IN23: pb_6
24 ROX XSTOP_IN24: pb_7
25 ROX XSTOP_IN25: pb_8
26 ROX XSTOP_IN26: pb_9
27 ROX XSTOP_IN27: pb_10
28 ROX XSTOP_IN28: pb_11
29 ROX XSTOP_IN29: pb_12
30 ROX XSTOP_IN30: pb_13
31 ROX XSTOP_IN31: pb_14
32 ROX XSTOP_IN32: pb_15
33 ROX XSTOP_IN33: pb_tc_fir_err
34 ROX XSTOP_IN34: unused
35 ROX XSTOP_IN35: unused
36 ROX XSTOP_IN36: unused
37 ROX XSTOP_IN37: unused
38 ROX XSTOP_IN38: unused
39 ROX XSTOP_IN39: unused
40 ROX XSTOP_IN40: unused
41 ROX XSTOP_IN41: unused
42 ROX XSTOP_IN42: unused
43 ROX XSTOP_IN43: unused
44 ROX XSTOP_IN44: unused
45 ROX XSTOP_IN45: unused
46 ROX XSTOP_IN46: unused
47 ROX XSTOP_IN47: unused
48 ROX XSTOP_IN48: unused
49 ROX XSTOP_IN49: unused
50 ROX XSTOP_IN50: unused
51 ROX XSTOP_IN51: unused
52 ROX XSTOP_IN52: unused
53 ROX XSTOP_IN53: unused

RECOV Error Register - after masking - OLD RFIR
Addr: 0000000003040001 (SCOM)
Name:TP.TCN1.N1.RECOV
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:53TP.TCN1.N1.EPS.FIR.COMP.RECOV_MASKED_REG_Q_INST.LATC.L2(0:53) [000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX ANY_RECOV: any_recov
1 ROX RESERVED1R: RESERVED
2 ROX RECOV_ANY_LOCAL_XSTOP: any_local_xstop
3 ROX RESERVED3R: RESERVED
4 ROX RECOV_PERV: perv
5 ROX RECOV_IN05: mm_0
6 ROX RECOV_IN06: mm_1
7 ROX RECOV_IN07: mcd
8 ROX RECOV_IN08: unused
9 ROX RECOV_IN09: hca
10 ROX RECOV_IN10: ad
11 ROX RECOV_IN11: unused
12 ROX RECOV_IN12: unused
13 ROX RECOV_IN13: pe_0
14 ROX RECOV_IN14: pe_1
15 ROX RECOV_IN15: pe_2
16 ROX RECOV_IN16: IOPSI
17 ROX RECOV_IN17: pb_0
18 ROX RECOV_IN18: pb_1
19 ROX RECOV_IN19: pb_2
20 ROX RECOV_IN20: pb_3
21 ROX RECOV_IN21: pb_4
22 ROX RECOV_IN22: pb_5
23 ROX RECOV_IN23: pb_6
24 ROX RECOV_IN24: pb_7
25 ROX RECOV_IN25: pb_8
26 ROX RECOV_IN26: pb_9
27 ROX RECOV_IN27: pb_10
28 ROX RECOV_IN28: pb_11
29 ROX RECOV_IN29: pb_12
30 ROX RECOV_IN30: pb_13
31 ROX RECOV_IN31: pb_14
32 ROX RECOV_IN32: pb_15
33 ROX RECOV_IN33: unused
34 ROX RECOV_IN34: unused
35 ROX RECOV_IN35: unused
36 ROX RECOV_IN36: unused
37 ROX RECOV_IN37: unused
38 ROX RECOV_IN38: unused
39 ROX RECOV_IN39: unused
40 ROX RECOV_IN40: unused
41 ROX RECOV_IN41: unused
42 ROX RECOV_IN42: unused
43 ROX RECOV_IN43: unused
44 ROX RECOV_IN44: unused
45 ROX RECOV_IN45: unused
46 ROX RECOV_IN46: unused
47 ROX RECOV_IN47: unused
48 ROX RECOV_IN48: unused
49 ROX RECOV_IN49: unused
50 ROX RECOV_IN50: unused
51 ROX RECOV_IN51: unused
52 ROX RECOV_IN52: unused
53 ROX RECOV_IN53: unused

Special Attention Register - after masking
Addr: 0000000003040002 (SCOM)
Name:TP.TCN1.N1.SPATTN
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:35TP.TCN1.N1.EPS.FIR.COMP.SPATTN_MASKED_REG_Q_INST.LATC.L2(0:35) [000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX ANY_SPATTN: any_spattn
1 ROX RESERVED1S: RESERVED
2 ROX RESERVED2S: RESERVED
3 ROX RESERVED3S: RESERVED
4 ROX SPATTN_PERV: perv
5 ROX SPATTN_IN05: unused
6 ROX SPATTN_IN06: unused
7 ROX SPATTN_IN07: mcd
8 ROX SPATTN_IN08: unused
9 ROX SPATTN_IN09: unused
10 ROX SPATTN_IN10: unused
11 ROX SPATTN_IN11: unused
12 ROX SPATTN_IN12: unused
13 ROX SPATTN_IN13: unused
14 ROX SPATTN_IN14: unused
15 ROX SPATTN_IN15: unused
16 ROX SPATTN_IN16: unused
17 ROX SPATTN_IN17: pb_0
18 ROX SPATTN_IN18: pb_1
19 ROX SPATTN_IN19: pb_2
20 ROX SPATTN_IN20: pb_3
21 ROX SPATTN_IN21: pb_4
22 ROX SPATTN_IN22: pb_5
23 ROX SPATTN_IN23: pb_6
24 ROX SPATTN_IN24: pb_7
25 ROX SPATTN_IN25: pb_8
26 ROX SPATTN_IN26: pb_9
27 ROX SPATTN_IN27: pb_10
28 ROX SPATTN_IN28: pb_11
29 ROX SPATTN_IN29: pb_12
30 ROX SPATTN_IN30: pb_13
31 ROX SPATTN_IN31: pb_14
32 ROX SPATTN_IN32: pb_15
33 ROX SPATTN_IN33: unused
34 ROX SPATTN_IN34: unused
35 ROX SPATTN_IN35: unused

Local XSTOP Register - after masking
Addr: 0000000003040003 (SCOM)
Name:TP.TCN1.N1.LOCAL_XSTOP
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15TP.TCN1.N1.EPS.FIR.COMP.LXSTOP_MASKED_REG_Q_INST.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0 ROX ANY_LOCAL_XSTOP: any local xstop
1 ROX RESERVED1L: RESERVED
2 ROX RESERVED2L: RESERVED
3 ROX RESERVED3L: RESERVED
4 ROX LOCAL_XSTOP_PERV: perv
5 ROX LOCAL_XSTOP_IN05: mm_0
6 ROX LOCAL_XSTOP_IN06: mm_1
7 ROX LOCAL_XSTOP_IN07: unused
8 ROX LOCAL_XSTOP_IN08: unused
9 ROX LOCAL_XSTOP_IN09: unused
10 ROX LOCAL_XSTOP_IN10: unused
11 ROX LOCAL_XSTOP_IN11: unused
12 ROX LOCAL_XSTOP_IN12: unused
13 ROX LOCAL_XSTOP_IN13: unused
14 ROX LOCAL_XSTOP_IN14: unused
15 ROX LOCAL_XSTOP_IN15: unused

Host Attention - Type4 - Register - after masking
Addr: 0000000003040004 (SCOM)
Name:TP.TCN1.N1.HOSTATTN
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:53TP.TCN1.N1.EPS.FIR.COMP.HOSTATTN_MASKED_REG_Q_INST.LATC.L2(0:53) [000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 ROX ANY_HOSTATTN: any host attn
1 ROX RESERVED1H: RESERVED
2 ROX RESERVED2H: RESERVED
3 ROX RESERVED3H: RESERVED
4 ROX HOSTATTN_PERV: perv
5 ROX HOSTATTN_IN05: unused
6 ROX HOSTATTN_IN06: unused
7 ROX HOSTATTN_IN07: unused
8 ROX HOSTATTN_IN08: unused
9 ROX HOSTATTN_IN09: unused
10 ROX HOSTATTN_IN10: unused
11 ROX HOSTATTN_IN11: unused
12 ROX HOSTATTN_IN12: unused
13 ROX HOSTATTN_IN13: unused
14 ROX HOSTATTN_IN14: unused
15 ROX HOSTATTN_IN15: unused
16 ROX HOSTATTN_IN16: unused
17 ROX HOSTATTN_IN17: unused
18 ROX HOSTATTN_IN18: unused
19 ROX HOSTATTN_IN19: unused
20 ROX HOSTATTN_IN20: unused
21 ROX HOSTATTN_IN21: unused
22 ROX HOSTATTN_IN22: unused
23 ROX HOSTATTN_IN23: unused
24 ROX HOSTATTN_IN24: unused
25 ROX HOSTATTN_IN25: unused
26 ROX HOSTATTN_IN26: unused
27 ROX HOSTATTN_IN27: unused
28 ROX HOSTATTN_IN28: unused
29 ROX HOSTATTN_IN29: unused
30 ROX HOSTATTN_IN30: unused
31 ROX HOSTATTN_IN31: unused
32 ROX HOSTATTN_IN32: unused
33 ROX HOSTATTN_IN33: unused
34 ROX HOSTATTN_IN34: unused
35 ROX HOSTATTN_IN35: unused
36 ROX HOSTATTN_IN36: unused
37 ROX HOSTATTN_IN37: unused
38 ROX HOSTATTN_IN38: unused
39 ROX HOSTATTN_IN39: unused
40 ROX HOSTATTN_IN40: unused
41 ROX HOSTATTN_IN41: unused
42 ROX HOSTATTN_IN42: unused
43 ROX HOSTATTN_IN43: unused
44 ROX HOSTATTN_IN44: unused
45 ROX HOSTATTN_IN45: unused
46 ROX HOSTATTN_IN46: unused
47 ROX HOSTATTN_IN47: unused
48 ROX HOSTATTN_IN48: unused
49 ROX HOSTATTN_IN49: unused
50 ROX HOSTATTN_IN50: unused
51 ROX HOSTATTN_IN51: unused
52 ROX HOSTATTN_IN52: unused
53 ROX HOSTATTN_IN53: unused

XSTOP Register - Unmasked incoming Errors - Debug only
Addr: 0000000003040010 (SCOM)
Name:TP.TCN1.N1.XSTOP_UNMASKED
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
1:53TP.TCN1.N1.EPS.FIR.COMP.XSTOP_REG_Q_INST.LATC.L2(1:53) [00000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RO constant=0b0
1:53 ROX XSTOP_UNMASKED_IN:

RECOV Error Register - Unmasked incoming Errors - Debug only
Addr: 0000000003040011 (SCOM)
Name:TP.TCN1.N1.RECOV_UNMASKED
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
1:53TP.TCN1.N1.EPS.FIR.COMP.RECOV_REG_Q_INST.LATC.L2(1:53) [00000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RO constant=0b0
1:53 ROX RECOV_UNMASKED_IN:

Special Attention - Unmasked incoming Errors - Debug only
Addr: 0000000003040012 (SCOM)
Name:TP.TCN1.N1.SPATTN_UNMASKED
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
1:35TP.TCN1.N1.EPS.FIR.COMP.SPATTN_REG_Q_INST.LATC.L2(1:35) [00000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RO constant=0b0
1:35 ROX SPATTN_UNMASKED_IN:

Local XSTOP Register - Unmasked incoming Errors - Debug only
Addr: 0000000003040013 (SCOM)
Name:TP.TCN1.N1.LOCAL_XSTOP_UNMASKED
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
1:15TP.TCN1.N1.EPS.FIR.COMP.LXSTOP_REG_Q_INST.LATC.L2(1:15) [000000000000000]
Bit(s)SCOM Dial: Description
0 RO constant=0b0
1:15 ROX LOCAL_XSTOP_UNMASKED_IN:

Host Attention - Type4 - Unmasked incoming Errors - Debug only
Addr: 0000000003040014 (SCOM)
Name:TP.TCN1.N1.HOSTATTN_UNMASKED
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
1:53TP.TCN1.N1.EPS.FIR.COMP.HOSTATTN_REG_Q_INST.LATC.L2(1:53) [00000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RO constant=0b0
1:53 ROX HOSTATTN_UNMASKED_IN:

WOF Who is on First of the Recovable Errors Register
Addr: 0000000003040021 (SCOM)
Name:TP.TCN1.N1.WOF
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:53TP.TCN1.N1.EPS.FIR.COMP.WOF_YES.RECOV_WOF_Q_INST.LATC.L2(0:53) [000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW_WCLRPART ANY_WOF: any_recov
1 RW_WCLRPART RESERVED1W: RESERVED
2 RW_WCLRPART WOF_ANY_LOCAL_XSTOP: any_local_xstop
3 RW_WCLRPART RESERVED3W: RESERVED
4 RW_WCLRPART WOF_PERV: perv
5 RW_WCLRPART WOF_IN05: mm_0
6 RW_WCLRPART WOF_IN06: mm_1
7 RW_WCLRPART WOF_IN07: mcd
8 RW_WCLRPART WOF_IN08: unused
9 RW_WCLRPART WOF_IN09: hca
10 RW_WCLRPART WOF_IN010: ad
11 RW_WCLRPART WOF_IN011: unused
12 RW_WCLRPART WOF_IN012: unused
13 RW_WCLRPART WOF_IN013: pe_0
14 RW_WCLRPART WOF_IN014: pe_1
15 RW_WCLRPART WOF_IN015: pe_2
16 RW_WCLRPART WOF_IN016: IOPSI
17 RW_WCLRPART WOF_IN017: pb_0
18 RW_WCLRPART WOF_IN018: pb_1
19 RW_WCLRPART WOF_IN019: pb_2
20 RW_WCLRPART WOF_IN020: pb_3
21 RW_WCLRPART WOF_IN021: pb_4
22 RW_WCLRPART WOF_IN022: pb_5
23 RW_WCLRPART WOF_IN023: pb_6
24 RW_WCLRPART WOF_IN024: pb_7
25 RW_WCLRPART WOF_IN025: pb_8
26 RW_WCLRPART WOF_IN026: pb_9
27 RW_WCLRPART WOF_IN027: pb_10
28 RW_WCLRPART WOF_IN028: pb_11
29 RW_WCLRPART WOF_IN029: pb_12
30 RW_WCLRPART WOF_IN030: pb_13
31 RW_WCLRPART WOF_IN031: pb_14
32 RW_WCLRPART WOF_IN032: pb_15
33 RW_WCLRPART WOF_IN033: unused
34 RW_WCLRPART WOF_IN034: unused
35 RW_WCLRPART WOF_IN035: unused
36 RW_WCLRPART WOF_IN036: unused
37 RW_WCLRPART WOF_IN037: unused
38 RW_WCLRPART WOF_IN038: unused
39 RW_WCLRPART WOF_IN039: unused
40 RW_WCLRPART WOF_IN040: unused
41 RW_WCLRPART WOF_IN041: unused
42 RW_WCLRPART WOF_IN042: unused
43 RW_WCLRPART WOF_IN043: unused
44 RW_WCLRPART WOF_IN044: unused
45 RW_WCLRPART WOF_IN045: unused
46 RW_WCLRPART WOF_IN046: unused
47 RW_WCLRPART WOF_IN047: unused
48 RW_WCLRPART WOF_IN048: unused
49 RW_WCLRPART WOF_IN049: unused
50 RW_WCLRPART WOF_IN050: unused
51 RW_WCLRPART WOF_IN051: unused
52 RW_WCLRPART WOF_IN052: unused
53 RW_WCLRPART WOF_IN053: unused

XSTOP Mask - OLD FIR_MASK
Addr: 0000000003040040 (SCOM)
0000000003040050 (SCOM1)
0000000003040060 (SCOM2)
Name:TP.TCN1.N1.XSTOP_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:53TP.TCN1.N1.EPS.FIR.COMP.XSTOP_MASK_Q_INST.LATC.L2(0:53) [000000000000000000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_OR WO_CLEAR XSTOP_MASK_UNUSED: Unused XSTOP Mask bit0
1 RW WO_OR WO_CLEAR XSTOP_MASK01: XSTOP Mask for bit1 - 0=firing 1=blocked - OLD FIR_MASK
2 RW WO_OR WO_CLEAR XSTOP_MASK02: XSTOP Mask for bit2 - 0=firing 1=blocked - OLD FIR_MASK
3 RW WO_OR WO_CLEAR XSTOP_MASK03: XSTOP Mask for bit3 - 0=firing 1=blocked - OLD FIR_MASK
4 RW WO_OR WO_CLEAR XSTOP_MASK04: XSTOP Mask for bit4 - 0=firing 1=blocked - OLD FIR_MASK
5 RW WO_OR WO_CLEAR XSTOP_MASK05: XSTOP Mask for bit5 - 0=firing 1=blocked - OLD FIR_MASK
6 RW WO_OR WO_CLEAR XSTOP_MASK06: XSTOP Mask for bit6 - 0=firing 1=blocked - OLD FIR_MASK
7 RW WO_OR WO_CLEAR XSTOP_MASK07: XSTOP Mask for bit7 - 0=firing 1=blocked - OLD FIR_MASK
8 RW WO_OR WO_CLEAR XSTOP_MASK08: XSTOP Mask for bit8 - 0=firing 1=blocked - OLD FIR_MASK
9 RW WO_OR WO_CLEAR XSTOP_MASK09: XSTOP Mask for bit9 - 0=firing 1=blocked - OLD FIR_MASK
10 RW WO_OR WO_CLEAR XSTOP_MASK10: XSTOP Mask for bit10 - 0=firing 1=blocked - OLD FIR_MASK
11 RW WO_OR WO_CLEAR XSTOP_MASK11: XSTOP Mask for bit11 - 0=firing 1=blocked - OLD FIR_MASK
12 RW WO_OR WO_CLEAR XSTOP_MASK12: XSTOP Mask for bit12 - 0=firing 1=blocked - OLD FIR_MASK
13 RW WO_OR WO_CLEAR XSTOP_MASK13: XSTOP Mask for bit13 - 0=firing 1=blocked - OLD FIR_MASK
14 RW WO_OR WO_CLEAR XSTOP_MASK14: XSTOP Mask for bit14 - 0=firing 1=blocked - OLD FIR_MASK
15 RW WO_OR WO_CLEAR XSTOP_MASK15: XSTOP Mask for bit15 - 0=firing 1=blocked - OLD FIR_MASK
16 RW WO_OR WO_CLEAR XSTOP_MASK16: XSTOP Mask for bit16 - 0=firing 1=blocked - OLD FIR_MASK
17 RW WO_OR WO_CLEAR XSTOP_MASK17: XSTOP Mask for bit17 - 0=firing 1=blocked - OLD FIR_MASK
18 RW WO_OR WO_CLEAR XSTOP_MASK18: XSTOP Mask for bit18 - 0=firing 1=blocked - OLD FIR_MASK
19 RW WO_OR WO_CLEAR XSTOP_MASK19: XSTOP Mask for bit19 - 0=firing 1=blocked - OLD FIR_MASK
20 RW WO_OR WO_CLEAR XSTOP_MASK20: XSTOP Mask for bit20 - 0=firing 1=blocked - OLD FIR_MASK
21 RW WO_OR WO_CLEAR XSTOP_MASK21: XSTOP Mask for bit21 - 0=firing 1=blocked - OLD FIR_MASK
22 RW WO_OR WO_CLEAR XSTOP_MASK22: XSTOP Mask for bit22 - 0=firing 1=blocked - OLD FIR_MASK
23 RW WO_OR WO_CLEAR XSTOP_MASK23: XSTOP Mask for bit23 - 0=firing 1=blocked - OLD FIR_MASK
24 RW WO_OR WO_CLEAR XSTOP_MASK24: XSTOP Mask for bit24 - 0=firing 1=blocked - OLD FIR_MASK
25 RW WO_OR WO_CLEAR XSTOP_MASK25: XSTOP Mask for bit25 - 0=firing 1=blocked - OLD FIR_MASK
26 RW WO_OR WO_CLEAR XSTOP_MASK26: XSTOP Mask for bit26 - 0=firing 1=blocked - OLD FIR_MASK
27 RW WO_OR WO_CLEAR XSTOP_MASK27: XSTOP Mask for bit27 - 0=firing 1=blocked - OLD FIR_MASK
28 RW WO_OR WO_CLEAR XSTOP_MASK28: XSTOP Mask for bit28 - 0=firing 1=blocked - OLD FIR_MASK
29 RW WO_OR WO_CLEAR XSTOP_MASK29: XSTOP Mask for bit29 - 0=firing 1=blocked - OLD FIR_MASK
30 RW WO_OR WO_CLEAR XSTOP_MASK30: XSTOP Mask for bit30 - 0=firing 1=blocked - OLD FIR_MASK
31 RW WO_OR WO_CLEAR XSTOP_MASK31: XSTOP Mask for bit31 - 0=firing 1=blocked - OLD FIR_MASK
32 RW WO_OR WO_CLEAR XSTOP_MASK32: XSTOP Mask for bit32 - 0=firing 1=blocked - OLD FIR_MASK
33 RW WO_OR WO_CLEAR XSTOP_MASK33: XSTOP Mask for bit33 - 0=firing 1=blocked - OLD FIR_MASK
34 RW WO_OR WO_CLEAR XSTOP_MASK34: XSTOP Mask for bit34 - 0=firing 1=blocked - OLD FIR_MASK
35 RW WO_OR WO_CLEAR XSTOP_MASK35: XSTOP Mask for bit35 - 0=firing 1=blocked - OLD FIR_MASK
36 RW WO_OR WO_CLEAR XSTOP_MASK36: XSTOP Mask for bit36 - 0=firing 1=blocked - OLD FIR_MASK
37 RW WO_OR WO_CLEAR XSTOP_MASK37: XSTOP Mask for bit37 - 0=firing 1=blocked - OLD FIR_MASK
38 RW WO_OR WO_CLEAR XSTOP_MASK38: XSTOP Mask for bit38 - 0=firing 1=blocked - OLD FIR_MASK
39 RW WO_OR WO_CLEAR XSTOP_MASK39: XSTOP Mask for bit39 - 0=firing 1=blocked - OLD FIR_MASK
40 RW WO_OR WO_CLEAR XSTOP_MASK40: XSTOP Mask for bit40 - 0=firing 1=blocked - OLD FIR_MASK
41 RW WO_OR WO_CLEAR XSTOP_MASK41: XSTOP Mask for bit41 - 0=firing 1=blocked - OLD FIR_MASK
42 RW WO_OR WO_CLEAR XSTOP_MASK42: XSTOP Mask for bit42 - 0=firing 1=blocked - OLD FIR_MASK
43 RW WO_OR WO_CLEAR XSTOP_MASK43: XSTOP Mask for bit43 - 0=firing 1=blocked - OLD FIR_MASK
44 RW WO_OR WO_CLEAR XSTOP_MASK44: XSTOP Mask for bit44 - 0=firing 1=blocked - OLD FIR_MASK
45 RW WO_OR WO_CLEAR XSTOP_MASK45: XSTOP Mask for bit45 - 0=firing 1=blocked - OLD FIR_MASK
46 RW WO_OR WO_CLEAR XSTOP_MASK46: XSTOP Mask for bit46 - 0=firing 1=blocked - OLD FIR_MASK
47 RW WO_OR WO_CLEAR XSTOP_MASK47: XSTOP Mask for bit47 - 0=firing 1=blocked - OLD FIR_MASK
48 RW WO_OR WO_CLEAR XSTOP_MASK48: XSTOP Mask for bit48 - 0=firing 1=blocked - OLD FIR_MASK
49 RW WO_OR WO_CLEAR XSTOP_MASK49: XSTOP Mask for bit49 - 0=firing 1=blocked - OLD FIR_MASK
50 RW WO_OR WO_CLEAR XSTOP_MASK50: XSTOP Mask for bit50 - 0=firing 1=blocked - OLD FIR_MASK
51 RW WO_OR WO_CLEAR XSTOP_MASK51: XSTOP Mask for bit51 - 0=firing 1=blocked - OLD FIR_MASK
52 RW WO_OR WO_CLEAR XSTOP_MASK52: XSTOP Mask for bit52 - 0=firing 1=blocked - OLD FIR_MASK
53 RW WO_OR WO_CLEAR XSTOP_MASK53: XSTOP Mask for bit53 - 0=firing 1=blocked - OLD FIR_MASK

RECOV Mask - OLD FIR_MASK
Addr: 0000000003040041 (SCOM)
0000000003040051 (SCOM1)
0000000003040061 (SCOM2)
Name:TP.TCN1.N1.RECOV_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:53TP.TCN1.N1.EPS.FIR.COMP.RECOV_MASK_Q_INST.LATC.L2(0:53) [000000000000000000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_OR WO_CLEAR RECOV_MASK_UNUSED: Unused RECOV Mask bit0
1 RW WO_OR WO_CLEAR RECOV_MASK01: RECOV Mask for bit1 - 0=firing 1=blocked - OLD FIR_MASK
2 RW WO_OR WO_CLEAR RECOV_MASK02: RECOV Mask for bit2 - 0=firing 1=blocked - OLD FIR_MASK
3 RW WO_OR WO_CLEAR RECOV_MASK03: RECOV Mask for bit3 - 0=firing 1=blocked - OLD FIR_MASK
4 RW WO_OR WO_CLEAR RECOV_MASK04: RECOV Mask for bit4 - 0=firing 1=blocked - OLD FIR_MASK
5 RW WO_OR WO_CLEAR RECOV_MASK05: RECOV Mask for bit5 - 0=firing 1=blocked - OLD FIR_MASK
6 RW WO_OR WO_CLEAR RECOV_MASK06: RECOV Mask for bit6 - 0=firing 1=blocked - OLD FIR_MASK
7 RW WO_OR WO_CLEAR RECOV_MASK07: RECOV Mask for bit7 - 0=firing 1=blocked - OLD FIR_MASK
8 RW WO_OR WO_CLEAR RECOV_MASK08: RECOV Mask for bit8 - 0=firing 1=blocked - OLD FIR_MASK
9 RW WO_OR WO_CLEAR RECOV_MASK09: RECOV Mask for bit9 - 0=firing 1=blocked - OLD FIR_MASK
10 RW WO_OR WO_CLEAR RECOV_MASK010: RECOV Mask for bit10 - 0=firing 1=blocked - OLD FIR_MASK
11 RW WO_OR WO_CLEAR RECOV_MASK011: RECOV Mask for bit11 - 0=firing 1=blocked - OLD FIR_MASK
12 RW WO_OR WO_CLEAR RECOV_MASK012: RECOV Mask for bit12 - 0=firing 1=blocked - OLD FIR_MASK
13 RW WO_OR WO_CLEAR RECOV_MASK013: RECOV Mask for bit13 - 0=firing 1=blocked - OLD FIR_MASK
14 RW WO_OR WO_CLEAR RECOV_MASK014: RECOV Mask for bit14 - 0=firing 1=blocked - OLD FIR_MASK
15 RW WO_OR WO_CLEAR RECOV_MASK015: RECOV Mask for bit15 - 0=firing 1=blocked - OLD FIR_MASK
16 RW WO_OR WO_CLEAR RECOV_MASK016: RECOV Mask for bit16 - 0=firing 1=blocked - OLD FIR_MASK
17 RW WO_OR WO_CLEAR RECOV_MASK017: RECOV Mask for bit17 - 0=firing 1=blocked - OLD FIR_MASK
18 RW WO_OR WO_CLEAR RECOV_MASK018: RECOV Mask for bit18 - 0=firing 1=blocked - OLD FIR_MASK
19 RW WO_OR WO_CLEAR RECOV_MASK019: RECOV Mask for bit19 - 0=firing 1=blocked - OLD FIR_MASK
20 RW WO_OR WO_CLEAR RECOV_MASK020: RECOV Mask for bit20 - 0=firing 1=blocked - OLD FIR_MASK
21 RW WO_OR WO_CLEAR RECOV_MASK021: RECOV Mask for bit21 - 0=firing 1=blocked - OLD FIR_MASK
22 RW WO_OR WO_CLEAR RECOV_MASK022: RECOV Mask for bit22 - 0=firing 1=blocked - OLD FIR_MASK
23 RW WO_OR WO_CLEAR RECOV_MASK023: RECOV Mask for bit23 - 0=firing 1=blocked - OLD FIR_MASK
24 RW WO_OR WO_CLEAR RECOV_MASK024: RECOV Mask for bit24 - 0=firing 1=blocked - OLD FIR_MASK
25 RW WO_OR WO_CLEAR RECOV_MASK025: RECOV Mask for bit25 - 0=firing 1=blocked - OLD FIR_MASK
26 RW WO_OR WO_CLEAR RECOV_MASK026: RECOV Mask for bit26 - 0=firing 1=blocked - OLD FIR_MASK
27 RW WO_OR WO_CLEAR RECOV_MASK027: RECOV Mask for bit27 - 0=firing 1=blocked - OLD FIR_MASK
28 RW WO_OR WO_CLEAR RECOV_MASK028: RECOV Mask for bit28 - 0=firing 1=blocked - OLD FIR_MASK
29 RW WO_OR WO_CLEAR RECOV_MASK029: RECOV Mask for bit29 - 0=firing 1=blocked - OLD FIR_MASK
30 RW WO_OR WO_CLEAR RECOV_MASK030: RECOV Mask for bit30 - 0=firing 1=blocked - OLD FIR_MASK
31 RW WO_OR WO_CLEAR RECOV_MASK031: RECOV Mask for bit31 - 0=firing 1=blocked - OLD FIR_MASK
32 RW WO_OR WO_CLEAR RECOV_MASK032: RECOV Mask for bit32 - 0=firing 1=blocked - OLD FIR_MASK
33 RW WO_OR WO_CLEAR RECOV_MASK033: RECOV Mask for bit33 - 0=firing 1=blocked - OLD FIR_MASK
34 RW WO_OR WO_CLEAR RECOV_MASK034: RECOV Mask for bit34 - 0=firing 1=blocked - OLD FIR_MASK
35 RW WO_OR WO_CLEAR RECOV_MASK035: RECOV Mask for bit35 - 0=firing 1=blocked - OLD FIR_MASK
36 RW WO_OR WO_CLEAR RECOV_MASK036: RECOV Mask for bit36 - 0=firing 1=blocked - OLD FIR_MASK
37 RW WO_OR WO_CLEAR RECOV_MASK037: RECOV Mask for bit37 - 0=firing 1=blocked - OLD FIR_MASK
38 RW WO_OR WO_CLEAR RECOV_MASK038: RECOV Mask for bit38 - 0=firing 1=blocked - OLD FIR_MASK
39 RW WO_OR WO_CLEAR RECOV_MASK039: RECOV Mask for bit39 - 0=firing 1=blocked - OLD FIR_MASK
40 RW WO_OR WO_CLEAR RECOV_MASK040: RECOV Mask for bit40 - 0=firing 1=blocked - OLD FIR_MASK
41 RW WO_OR WO_CLEAR RECOV_MASK041: RECOV Mask for bit41 - 0=firing 1=blocked - OLD FIR_MASK
42 RW WO_OR WO_CLEAR RECOV_MASK042: RECOV Mask for bit42 - 0=firing 1=blocked - OLD FIR_MASK
43 RW WO_OR WO_CLEAR RECOV_MASK043: RECOV Mask for bit43 - 0=firing 1=blocked - OLD FIR_MASK
44 RW WO_OR WO_CLEAR RECOV_MASK044: RECOV Mask for bit44 - 0=firing 1=blocked - OLD FIR_MASK
45 RW WO_OR WO_CLEAR RECOV_MASK045: RECOV Mask for bit45 - 0=firing 1=blocked - OLD FIR_MASK
46 RW WO_OR WO_CLEAR RECOV_MASK046: RECOV Mask for bit46 - 0=firing 1=blocked - OLD FIR_MASK
47 RW WO_OR WO_CLEAR RECOV_MASK047: RECOV Mask for bit47 - 0=firing 1=blocked - OLD FIR_MASK
48 RW WO_OR WO_CLEAR RECOV_MASK048: RECOV Mask for bit48 - 0=firing 1=blocked - OLD FIR_MASK
49 RW WO_OR WO_CLEAR RECOV_MASK049: RECOV Mask for bit49 - 0=firing 1=blocked - OLD FIR_MASK
50 RW WO_OR WO_CLEAR RECOV_MASK050: RECOV Mask for bit50 - 0=firing 1=blocked - OLD FIR_MASK
51 RW WO_OR WO_CLEAR RECOV_MASK051: RECOV Mask for bit51 - 0=firing 1=blocked - OLD FIR_MASK
52 RW WO_OR WO_CLEAR RECOV_MASK052: RECOV Mask for bit52 - 0=firing 1=blocked - OLD FIR_MASK
53 RW WO_OR WO_CLEAR RECOV_MASK053: RECOV Mask for bit53 - 0=firing 1=blocked - OLD FIR_MASK

Special Attention Mask
Addr: 0000000003040042 (SCOM)
0000000003040052 (SCOM1)
0000000003040062 (SCOM2)
Name:TP.TCN1.N1.SPATTN_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:35TP.TCN1.N1.EPS.FIR.COMP.SPATTN_MASK_Q_INST.LATC.L2(0:35) [000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_OR WO_CLEAR SPATTN_MASK_UNUSED: Unused SPATTN Mask bit0
1 RW WO_OR WO_CLEAR SPATTN_MASK01: SPATTN Mask for bit1 - 0=firing 1=blocked
2 RW WO_OR WO_CLEAR SPATTN_MASK02: SPATTN Mask for bit2 - 0=firing 1=blocked
3 RW WO_OR WO_CLEAR SPATTN_MASK03: SPATTN Mask for bit3 - 0=firing 1=blocked
4 RW WO_OR WO_CLEAR SPATTN_MASK04: SPATTN Mask for bit4 - 0=firing 1=blocked
5 RW WO_OR WO_CLEAR SPATTN_MASK05: SPATTN Mask for bit5 - 0=firing 1=blocked
6 RW WO_OR WO_CLEAR SPATTN_MASK06: SPATTN Mask for bit6 - 0=firing 1=blocked
7 RW WO_OR WO_CLEAR SPATTN_MASK07: SPATTN Mask for bit7 - 0=firing 1=blocked
8 RW WO_OR WO_CLEAR SPATTN_MASK08: SPATTN Mask for bit8 - 0=firing 1=blocked
9 RW WO_OR WO_CLEAR SPATTN_MASK09: SPATTN Mask for bit9 - 0=firing 1=blocked
10 RW WO_OR WO_CLEAR SPATTN_MASK10: SPATTN Mask for bit10 - 0=firing 1=blocked
11 RW WO_OR WO_CLEAR SPATTN_MASK11: SPATTN Mask for bit11 - 0=firing 1=blocked
12 RW WO_OR WO_CLEAR SPATTN_MASK12: SPATTN Mask for bit12 - 0=firing 1=blocked
13 RW WO_OR WO_CLEAR SPATTN_MASK13: SPATTN Mask for bit13 - 0=firing 1=blocked
14 RW WO_OR WO_CLEAR SPATTN_MASK14: SPATTN Mask for bit14 - 0=firing 1=blocked
15 RW WO_OR WO_CLEAR SPATTN_MASK15: SPATTN Mask for bit15 - 0=firing 1=blocked
16 RW WO_OR WO_CLEAR SPATTN_MASK16: SPATTN Mask for bit16 - 0=firing 1=blocked
17 RW WO_OR WO_CLEAR SPATTN_MASK17: SPATTN Mask for bit17 - 0=firing 1=blocked
18 RW WO_OR WO_CLEAR SPATTN_MASK18: SPATTN Mask for bit18 - 0=firing 1=blocked
19 RW WO_OR WO_CLEAR SPATTN_MASK19: SPATTN Mask for bit19 - 0=firing 1=blocked
20 RW WO_OR WO_CLEAR SPATTN_MASK20: SPATTN Mask for bit20 - 0=firing 1=blocked
21 RW WO_OR WO_CLEAR SPATTN_MASK21: SPATTN Mask for bit21 - 0=firing 1=blocked
22 RW WO_OR WO_CLEAR SPATTN_MASK22: SPATTN Mask for bit22 - 0=firing 1=blocked
23 RW WO_OR WO_CLEAR SPATTN_MASK23: SPATTN Mask for bit23 - 0=firing 1=blocked
24 RW WO_OR WO_CLEAR SPATTN_MASK24: SPATTN Mask for bit24 - 0=firing 1=blocked
25 RW WO_OR WO_CLEAR SPATTN_MASK25: SPATTN Mask for bit25 - 0=firing 1=blocked
26 RW WO_OR WO_CLEAR SPATTN_MASK26: SPATTN Mask for bit26 - 0=firing 1=blocked
27 RW WO_OR WO_CLEAR SPATTN_MASK27: SPATTN Mask for bit27 - 0=firing 1=blocked
28 RW WO_OR WO_CLEAR SPATTN_MASK28: SPATTN Mask for bit28 - 0=firing 1=blocked
29 RW WO_OR WO_CLEAR SPATTN_MASK29: SPATTN Mask for bit29 - 0=firing 1=blocked
30 RW WO_OR WO_CLEAR SPATTN_MASK30: SPATTN Mask for bit30 - 0=firing 1=blocked
31 RW WO_OR WO_CLEAR SPATTN_MASK31: SPATTN Mask for bit31 - 0=firing 1=blocked
32 RW WO_OR WO_CLEAR SPATTN_MASK32: SPATTN Mask for bit32 - 0=firing 1=blocked
33 RW WO_OR WO_CLEAR SPATTN_MASK33: SPATTN Mask for bit33 - 0=firing 1=blocked
34 RW WO_OR WO_CLEAR SPATTN_MASK34: SPATTN Mask for bit34 - 0=firing 1=blocked
35 RW WO_OR WO_CLEAR SPATTN_MASK35: SPATTN Mask for bit35 - 0=firing 1=blocked

Local XSTOP Mask
Addr: 0000000003040043 (SCOM)
0000000003040053 (SCOM1)
0000000003040063 (SCOM2)
Name:TP.TCN1.N1.LOCAL_XSTOP_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15TP.TCN1.N1.EPS.FIR.COMP.LXSTOP_MASK_Q_INST.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK_UNUSED: Unused Local XSTOP Mask bit0
1 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK01: Local XSTOP Mask for bit1 - 0=firing 1=blocked
2 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK02: Local XSTOP Mask for bit2 - 0=firing 1=blocked
3 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK03: Local XSTOP Mask for bit3 - 0=firing 1=blocked
4 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK04: Local XSTOP Mask for bit4 - 0=firing 1=blocked
5 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK05: Local XSTOP Mask for bit5 - 0=firing 1=blocked
6 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK06: Local XSTOP Mask for bit6 - 0=firing 1=blocked
7 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK07: Local XSTOP Mask for bit7 - 0=firing 1=blocked
8 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK08: Local XSTOP Mask for bit8 - 0=firing 1=blocked
9 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK09: Local XSTOP Mask for bit9 - 0=firing 1=blocked
10 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK10: Local XSTOP Mask for bit10 - 0=firing 1=blocked
11 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK11: Local XSTOP Mask for bit11 - 0=firing 1=blocked
12 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK12: Local XSTOP Mask for bit12 - 0=firing 1=blocked
13 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK13: Local XSTOP Mask for bit13 - 0=firing 1=blocked
14 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK14: Local XSTOP Mask for bit14 - 0=firing 1=blocked
15 RW WO_OR WO_CLEAR LOCAL_XSTOP_MASK15: Local XSTOP Mask for bit15 - 0=firing 1=blocked

Host Attention Mask
Addr: 0000000003040044 (SCOM)
0000000003040054 (SCOM1)
0000000003040064 (SCOM2)
Name:TP.TCN1.N1.HOSTATTN_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:53TP.TCN1.N1.EPS.FIR.COMP.HOSTATTN_MASK_Q_INST.LATC.L2(0:53) [000000000000000000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_OR WO_CLEAR HOSTATTN_MASK_UNUSED: Unused HOSTATTN Mask bit0
1 RW WO_OR WO_CLEAR HOSTATTN_MASK01: HOSTATTN Mask for bit1 - 0=firing 1=blocked
2 RW WO_OR WO_CLEAR HOSTATTN_MASK02: HOSTATTN Mask for bit2 - 0=firing 1=blocked
3 RW WO_OR WO_CLEAR HOSTATTN_MASK03: HOSTATTN Mask for bit3 - 0=firing 1=blocked
4 RW WO_OR WO_CLEAR HOSTATTN_MASK04: HOSTATTN Mask for bit4 - 0=firing 1=blocked
5 RW WO_OR WO_CLEAR HOSTATTN_MASK05: HOSTATTN Mask for bit5 - 0=firing 1=blocked
6 RW WO_OR WO_CLEAR HOSTATTN_MASK06: HOSTATTN Mask for bit6 - 0=firing 1=blocked
7 RW WO_OR WO_CLEAR HOSTATTN_MASK07: HOSTATTN Mask for bit7 - 0=firing 1=blocked
8 RW WO_OR WO_CLEAR HOSTATTN_MASK08: HOSTATTN Mask for bit8 - 0=firing 1=blocked
9 RW WO_OR WO_CLEAR HOSTATTN_MASK09: HOSTATTN Mask for bit9 - 0=firing 1=blocked
10 RW WO_OR WO_CLEAR HOSTATTN_MASK10: HOSTATTN Mask for bit10 - 0=firing 1=blocked
11 RW WO_OR WO_CLEAR HOSTATTN_MASK11: HOSTATTN Mask for bit11 - 0=firing 1=blocked
12 RW WO_OR WO_CLEAR HOSTATTN_MASK12: HOSTATTN Mask for bit12 - 0=firing 1=blocked
13 RW WO_OR WO_CLEAR HOSTATTN_MASK13: HOSTATTN Mask for bit13 - 0=firing 1=blocked
14 RW WO_OR WO_CLEAR HOSTATTN_MASK14: HOSTATTN Mask for bit14 - 0=firing 1=blocked
15 RW WO_OR WO_CLEAR HOSTATTN_MASK15: HOSTATTN Mask for bit15 - 0=firing 1=blocked
16 RW WO_OR WO_CLEAR HOSTATTN_MASK16: HOSTATTN Mask for bit16 - 0=firing 1=blocked
17 RW WO_OR WO_CLEAR HOSTATTN_MASK17: HOSTATTN Mask for bit17 - 0=firing 1=blocked
18 RW WO_OR WO_CLEAR HOSTATTN_MASK18: HOSTATTN Mask for bit18 - 0=firing 1=blocked
19 RW WO_OR WO_CLEAR HOSTATTN_MASK19: HOSTATTN Mask for bit19 - 0=firing 1=blocked
20 RW WO_OR WO_CLEAR HOSTATTN_MASK20: HOSTATTN Mask for bit20 - 0=firing 1=blocked
21 RW WO_OR WO_CLEAR HOSTATTN_MASK21: HOSTATTN Mask for bit21 - 0=firing 1=blocked
22 RW WO_OR WO_CLEAR HOSTATTN_MASK22: HOSTATTN Mask for bit22 - 0=firing 1=blocked
23 RW WO_OR WO_CLEAR HOSTATTN_MASK23: HOSTATTN Mask for bit23 - 0=firing 1=blocked
24 RW WO_OR WO_CLEAR HOSTATTN_MASK24: HOSTATTN Mask for bit24 - 0=firing 1=blocked
25 RW WO_OR WO_CLEAR HOSTATTN_MASK25: HOSTATTN Mask for bit25 - 0=firing 1=blocked
26 RW WO_OR WO_CLEAR HOSTATTN_MASK26: HOSTATTN Mask for bit26 - 0=firing 1=blocked
27 RW WO_OR WO_CLEAR HOSTATTN_MASK27: HOSTATTN Mask for bit27 - 0=firing 1=blocked
28 RW WO_OR WO_CLEAR HOSTATTN_MASK28: HOSTATTN Mask for bit28 - 0=firing 1=blocked
29 RW WO_OR WO_CLEAR HOSTATTN_MASK29: HOSTATTN Mask for bit29 - 0=firing 1=blocked
30 RW WO_OR WO_CLEAR HOSTATTN_MASK30: HOSTATTN Mask for bit30 - 0=firing 1=blocked
31 RW WO_OR WO_CLEAR HOSTATTN_MASK31: HOSTATTN Mask for bit31 - 0=firing 1=blocked
32 RW WO_OR WO_CLEAR HOSTATTN_MASK32: HOSTATTN Mask for bit32 - 0=firing 1=blocked
33 RW WO_OR WO_CLEAR HOSTATTN_MASK33: HOSTATTN Mask for bit33 - 0=firing 1=blocked
34 RW WO_OR WO_CLEAR HOSTATTN_MASK34: HOSTATTN Mask for bit34 - 0=firing 1=blocked
35 RW WO_OR WO_CLEAR HOSTATTN_MASK35: HOSTATTN Mask for bit35 - 0=firing 1=blocked
36 RW WO_OR WO_CLEAR HOSTATTN_MASK36: HOSTATTN Mask for bit36 - 0=firing 1=blocked
37 RW WO_OR WO_CLEAR HOSTATTN_MASK37: HOSTATTN Mask for bit37 - 0=firing 1=blocked
38 RW WO_OR WO_CLEAR HOSTATTN_MASK38: HOSTATTN Mask for bit38 - 0=firing 1=blocked
39 RW WO_OR WO_CLEAR HOSTATTN_MASK39: HOSTATTN Mask for bit39 - 0=firing 1=blocked
40 RW WO_OR WO_CLEAR HOSTATTN_MASK40: HOSTATTN Mask for bit40 - 0=firing 1=blocked
41 RW WO_OR WO_CLEAR HOSTATTN_MASK41: HOSTATTN Mask for bit41 - 0=firing 1=blocked
42 RW WO_OR WO_CLEAR HOSTATTN_MASK42: HOSTATTN Mask for bit42 - 0=firing 1=blocked
43 RW WO_OR WO_CLEAR HOSTATTN_MASK43: HOSTATTN Mask for bit43 - 0=firing 1=blocked
44 RW WO_OR WO_CLEAR HOSTATTN_MASK44: HOSTATTN Mask for bit44 - 0=firing 1=blocked
45 RW WO_OR WO_CLEAR HOSTATTN_MASK45: HOSTATTN Mask for bit45 - 0=firing 1=blocked
46 RW WO_OR WO_CLEAR HOSTATTN_MASK46: HOSTATTN Mask for bit46 - 0=firing 1=blocked
47 RW WO_OR WO_CLEAR HOSTATTN_MASK47: HOSTATTN Mask for bit47 - 0=firing 1=blocked
48 RW WO_OR WO_CLEAR HOSTATTN_MASK48: HOSTATTN Mask for bit48 - 0=firing 1=blocked
49 RW WO_OR WO_CLEAR HOSTATTN_MASK49: HOSTATTN Mask for bit49 - 0=firing 1=blocked
50 RW WO_OR WO_CLEAR HOSTATTN_MASK50: HOSTATTN Mask for bit50 - 0=firing 1=blocked
51 RW WO_OR WO_CLEAR HOSTATTN_MASK51: HOSTATTN Mask for bit51 - 0=firing 1=blocked
52 RW WO_OR WO_CLEAR HOSTATTN_MASK52: HOSTATTN Mask for bit52 - 0=firing 1=blocked
53 RW WO_OR WO_CLEAR HOSTATTN_MASK53: HOSTATTN Mask for bit53 - 0=firing 1=blocked

Any Local Error Mask - to PCB (old SUMMARY MASK)
Addr: 0000000003040080 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.ANY_LOCAL_ERR_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:4TP.TCN1.N1.EPS.FIR.COMP.ANY_LOCAL_ERR_MASK_Q_INST.LATC.L2(0:4) [00000]
Bit(s)SCOM Dial: Description
0 RW MASK_XSTOP_TO_PCB: mask XSTOP to pcb - 1=blocking
1 RW MASK_RECOV_TO_PCB: mask RECOV to pcb - 1=blocking
2 RW MASK_SPATTN_TO_PCB: mask SPATTN to pcb - 1=blocking
3 RW MASK_LOCAL_XSTOP_TO_PCB: mask LOCAL XSTOP to pcb - 1=blocking
4 RW MASK_HOSTATTN_TO_PCB: mask HOSTATTN to pcb - 1=blocking

Clockstop on XSTOP Mask1 Reg - to CC XSTOP1
Addr: 0000000003040081 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:26TP.TCN1.N1.EPS.FIR.COMP.CLKSTOP_ON_XSTOP_MASK1_Q_INST.LATC.L2(0:26) [000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW CLKSTOP_MASK1_XSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP1
1 RW CLKSTOP_MASK1_RECOV_ERR: any recov triggers clockstop using ClockControl XSTOP1
2 RW CLKSTOP_MASK1_SPATTN_ERR: any spattn triggers clockstop using ClockControl XSTOP1
3 RW CLKSTOP_MASK1_LXSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP1
4 RW CLKSTOP_MASK1_HOSTATTN_ERR: any hostattn triggers clockstop using ClockControl XSTOP1
5 RW CLKSTOP_MASK1_SYS_XSTOP_ERR: system xstop triggers clockstop using ClockControl XSTOP1
6 RW CLKSTOP_MASK1_SYS_XSTOP_STAGED_ERR: oob7 -system xstop staged triggers Clockstop using ClockControl XSTOP1
7 RW CLKSTOP_MASK1_DBG_TRIG_ERR: dbg triggers Clockstop using ClockControl XSTOP1
8 RW CLKSTOP_MASK1_UNUSED08: Unused
9 RW CLKSTOP_MASK1_UNUSED09: Unused
10 RW CLKSTOP_MASK1_UNUSED10: Unused
11 RW CLKSTOP_MASK1_UNUSED11: Unused
12 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP01: Local XSTOP bit 1 triggers Clockstop using ClockControl XSTOP1
13 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP02: Local XSTOP bit 2 triggers Clockstop using ClockControl XSTOP1
14 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP03: Local XSTOP bit 3 triggers Clockstop using ClockControl XSTOP1
15 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP04: Local XSTOP bit 4 triggers Clockstop using ClockControl XSTOP1
16 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP05: Local XSTOP bit 5 triggers Clockstop using ClockControl XSTOP1
17 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP06: Local XSTOP bit 6 triggers Clockstop using ClockControl XSTOP1
18 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP07: Local XSTOP bit 7 triggers Clockstop using ClockControl XSTOP1
19 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP08: Local XSTOP bit 8 triggers Clockstop using ClockControl XSTOP1
20 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP09: Local XSTOP bit 9 triggers Clockstop using ClockControl XSTOP1
21 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP10: Local XSTOP bit 10 triggers Clockstop using ClockControl XSTOP1
22 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP11: Local XSTOP bit 11 triggers Clockstop using ClockControl XSTOP1
23 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP12: Local XSTOP bit 12 triggers Clockstop using ClockControl XSTOP1
24 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP13: Local XSTOP bit 13 triggers Clockstop using ClockControl XSTOP1
25 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP14: Local XSTOP bit 14 triggers Clockstop using ClockControl XSTOP1
26 RW CLKSTOP_MASK1_UNIT_TC_FIR_LOCAL_XSTOP15: Local XSTOP bit 15 triggers Clockstop using ClockControl XSTOP1

Clockstop on XSTOP Mask2 Reg - to CC XSTOP2
Addr: 0000000003040082 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:26TP.TCN1.N1.EPS.FIR.COMP.CLKSTOP_ON_XSTOP_MASK2_Q_INST.LATC.L2(0:26) [000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW CLKSTOP_MASK2_XSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP2
1 RW CLKSTOP_MASK2_RECOV_ERR: any recov triggers clockstop using ClockControl XSTOP2
2 RW CLKSTOP_MASK2_SPATTN_ERR: any spattn triggers clockstop using ClockControl XSTOP2
3 RW CLKSTOP_MASK2_LXSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP2
4 RW CLKSTOP_MASK2_HOSTATTN_ERR: any hostattn triggers clockstop using ClockControl XSTOP2
5 RW CLKSTOP_MASK2_SYS_XSTOP_ERR: system xstop triggers clockstop using ClockControl XSTOP2
6 RW CLKSTOP_MASK2_SYS_XSTOP_STAGED_ERR: oob7 -system xstop staged triggers Clockstop using ClockControl XSTOP2
7 RW CLKSTOP_MASK2_DBG_TRIG_ERR: dbg triggers Clockstop using ClockControl XSTOP2
8 RW CLKSTOP_MASK2_UNUSED08: Unused
9 RW CLKSTOP_MASK2_UNUSED09: Unused
10 RW CLKSTOP_MASK2_UNUSED20: Unused
11 RW CLKSTOP_MASK2_UNUSED22: Unused
12 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP01: Local XSTOP bit 1 triggers Clockstop using ClockControl XSTOP2
13 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP02: Local XSTOP bit 2 triggers Clockstop using ClockControl XSTOP2
14 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP03: Local XSTOP bit 3 triggers Clockstop using ClockControl XSTOP2
15 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP04: Local XSTOP bit 4 triggers Clockstop using ClockControl XSTOP2
16 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP05: Local XSTOP bit 5 triggers Clockstop using ClockControl XSTOP2
17 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP06: Local XSTOP bit 6 triggers Clockstop using ClockControl XSTOP2
18 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP07: Local XSTOP bit 7 triggers Clockstop using ClockControl XSTOP2
19 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP08: Local XSTOP bit 8 triggers Clockstop using ClockControl XSTOP2
20 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP09: Local XSTOP bit 9 triggers Clockstop using ClockControl XSTOP2
21 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP010: Local XSTOP bit 10 triggers Clockstop using ClockControl XSTOP2
22 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP011: Local XSTOP bit 11 triggers Clockstop using ClockControl XSTOP2
23 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP012: Local XSTOP bit 12 triggers Clockstop using ClockControl XSTOP2
24 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP013: Local XSTOP bit 13 triggers Clockstop using ClockControl XSTOP2
25 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP014: Local XSTOP bit 14 triggers Clockstop using ClockControl XSTOP2
26 RW CLKSTOP_MASK2_UNIT_TC_FIR_LOCAL_XSTOP015: Local XSTOP bit 15 triggers Clockstop using ClockControl XSTOP2

Clockstop on XSTOP Mask3 Reg - to CC XSTOP3
Addr: 0000000003040083 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK3
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:26TP.TCN1.N1.EPS.FIR.COMP.CLKSTOP_ON_XSTOP_MASK3_Q_INST.LATC.L2(0:26) [000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW CLKSTOP_MASK3_XSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP3
1 RW CLKSTOP_MASK3_RECOV_ERR: any recov triggers clockstop using ClockControl XSTOP3
2 RW CLKSTOP_MASK3_SPATTN_ERR: any spattn triggers clockstop using ClockControl XSTOP3
3 RW CLKSTOP_MASK3_LXSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP3
4 RW CLKSTOP_MASK3_HOSTATTN_ERR: any hostattn triggers clockstop using ClockControl XSTOP3
5 RW CLKSTOP_MASK3_SYS_XSTOP_ERR: system xstop triggers clockstop using ClockControl XSTOP3
6 RW CLKSTOP_MASK3_SYS_XSTOP_STAGED_ERR: oob7 -system xstop staged triggers Clockstop using ClockControl XSTOP3
7 RW CLKSTOP_MASK3_DBG_TRIG_ERR: dbg triggers Clockstop using ClockControl XSTOP3
8 RW CLKSTOP_MASK3_UNUSED08: Unused
9 RW CLKSTOP_MASK3_UNUSED09: Unused
10 RW CLKSTOP_MASK3_UNUSED10: Unused
11 RW CLKSTOP_MASK3_UNUSED11: Unused
12 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP01: Local XSTOP bit 1 triggers Clockstop using ClockControl XSTOP3
13 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP02: Local XSTOP bit 2 triggers Clockstop using ClockControl XSTOP3
14 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP03: Local XSTOP bit 3 triggers Clockstop using ClockControl XSTOP3
15 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP04: Local XSTOP bit 4 triggers Clockstop using ClockControl XSTOP3
16 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP05: Local XSTOP bit 5 triggers Clockstop using ClockControl XSTOP3
17 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP06: Local XSTOP bit 6 triggers Clockstop using ClockControl XSTOP3
18 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP07: Local XSTOP bit 7 triggers Clockstop using ClockControl XSTOP3
19 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP08: Local XSTOP bit 8 triggers Clockstop using ClockControl XSTOP3
20 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP09: Local XSTOP bit 9 triggers Clockstop using ClockControl XSTOP3
21 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP010: Local XSTOP bit 10 triggers Clockstop using ClockControl XSTOP3
22 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP011: Local XSTOP bit 11 triggers Clockstop using ClockControl XSTOP3
23 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP012: Local XSTOP bit 12 triggers Clockstop using ClockControl XSTOP3
24 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP013: Local XSTOP bit 13 triggers Clockstop using ClockControl XSTOP3
25 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP014: Local XSTOP bit 14 triggers Clockstop using ClockControl XSTOP3
26 RW CLKSTOP_MASK3_UNIT_TC_FIR_LOCAL_XSTOP015: Local XSTOP bit 15 triggers Clockstop using ClockControl XSTOP3

Clockstop on XSTOP Mask4 Reg - to CC XSTOP4
Addr: 0000000003040084 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK4
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:26TP.TCN1.N1.EPS.FIR.COMP.CLKSTOP_ON_XSTOP_MASK4_Q_INST.LATC.L2(0:26) [000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW CLKSTOP_MASK4_XSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP4
1 RW CLKSTOP_MASK4_RECOV_ERR: any recov triggers clockstop using ClockControl XSTOP4
2 RW CLKSTOP_MASK4_SPATTN_ERR: any spattn triggers clockstop using ClockControl XSTOP4
3 RW CLKSTOP_MASK4_LXSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP4
4 RW CLKSTOP_MASK4_HOSTATTN_ERR: any hostattn triggers clockstop using ClockControl XSTOP4
5 RW CLKSTOP_MASK4_SYS_XSTOP_ERR: system xstop triggers clockstop using ClockControl XSTOP4
6 RW CLKSTOP_MASK4_SYS_XSTOP_STAGED_ERR: oob7 -system xstop staged triggers Clockstop using ClockControl XSTOP4
7 RW CLKSTOP_MASK4_DBG_TRIG_ERR: dbg triggers Clockstop using ClockControl XSTOP4
8 RW CLKSTOP_MASK4_UNUSED08: Unused
9 RW CLKSTOP_MASK4_UNUSED09: Unused
10 RW CLKSTOP_MASK4_UNUSED10: Unused
11 RW CLKSTOP_MASK4_UNUSED11: Unused
12 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP01: Local XSTOP bit 1 triggers Clockstop using ClockControl XSTOP4
13 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP02: Local XSTOP bit 2 triggers Clockstop using ClockControl XSTOP4
14 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP03: Local XSTOP bit 3 triggers Clockstop using ClockControl XSTOP4
15 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP04: Local XSTOP bit 4 triggers Clockstop using ClockControl XSTOP4
16 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP05: Local XSTOP bit 5 triggers Clockstop using ClockControl XSTOP4
17 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP06: Local XSTOP bit 6 triggers Clockstop using ClockControl XSTOP4
18 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP07: Local XSTOP bit 7 triggers Clockstop using ClockControl XSTOP4
19 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP08: Local XSTOP bit 8 triggers Clockstop using ClockControl XSTOP4
20 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP09: Local XSTOP bit 9 triggers Clockstop using ClockControl XSTOP4
21 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP10: Local XSTOP bit 10 triggers Clockstop using ClockControl XSTOP4
22 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP11: Local XSTOP bit 11 triggers Clockstop using ClockControl XSTOP4
23 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP12: Local XSTOP bit 12 triggers Clockstop using ClockControl XSTOP4
24 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP13: Local XSTOP bit 13 triggers Clockstop using ClockControl XSTOP4
25 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP14: Local XSTOP bit 14 triggers Clockstop using ClockControl XSTOP4
26 RW CLKSTOP_MASK4_UNIT_TC_FIR_LOCAL_XSTOP15: Local XSTOP bit 15 triggers Clockstop using ClockControl XSTOP4

Clockstop on XSTOP Mask5 Reg - to CC XSTOP5
Addr: 0000000003040085 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK5
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:26TP.TCN1.N1.EPS.FIR.COMP.CLKSTOP_ON_XSTOP_MASK5_Q_INST.LATC.L2(0:26) [000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW CLKSTOP_MASK5_XSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP5
1 RW CLKSTOP_MASK5_RECOV_ERR: any recov triggers clockstop using ClockControl XSTOP5
2 RW CLKSTOP_MASK5_SPATTN_ERR: any spattn triggers clockstop using ClockControl XSTOP5
3 RW CLKSTOP_MASK5_LXSTOP_ERR: any xstop triggers clockstop using ClockControl XSTOP5
4 RW CLKSTOP_MASK5_HOSTATTN_ERR: any hostattn triggers clockstop using ClockControl XSTOP5
5 RW CLKSTOP_MASK5_SYS_XSTOP_ERR: system xstop triggers clockstop using ClockControl XSTOP5
6 RW CLKSTOP_MASK5_SYS_XSTOP_STAGED_ERR: oob7 -system xstop staged triggers Clockstop using ClockControl XSTOP5
7 RW CLKSTOP_MASK5_DBG_TRIG_ERR: dbg triggers Clockstop using ClockControl XSTOP5
8 RW CLKSTOP_MASK5_UNUSED08: Unused
9 RW CLKSTOP_MASK5_UNUSED09: Unused
10 RW CLKSTOP_MASK5_UNUSED10: Unused
11 RW CLKSTOP_MASK5_UNUSED11: Unused
12 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP01: Local XSTOP bit 1 triggers Clockstop using ClockControl XSTOP5
13 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP02: Local XSTOP bit 2 triggers Clockstop using ClockControl XSTOP5
14 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP03: Local XSTOP bit 3 triggers Clockstop using ClockControl XSTOP5
15 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP04: Local XSTOP bit 4 triggers Clockstop using ClockControl XSTOP5
16 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP05: Local XSTOP bit 5 triggers Clockstop using ClockControl XSTOP5
17 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP06: Local XSTOP bit 6 triggers Clockstop using ClockControl XSTOP5
18 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP07: Local XSTOP bit 7 triggers Clockstop using ClockControl XSTOP5
19 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP08: Local XSTOP bit 8 triggers Clockstop using ClockControl XSTOP5
20 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP09: Local XSTOP bit 9 triggers Clockstop using ClockControl XSTOP5
21 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP10: Local XSTOP bit 10 triggers Clockstop using ClockControl XSTOP5
22 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP11: Local XSTOP bit 11 triggers Clockstop using ClockControl XSTOP5
23 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP12: Local XSTOP bit 12 triggers Clockstop using ClockControl XSTOP5
24 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP13: Local XSTOP bit 13 triggers Clockstop using ClockControl XSTOP5
25 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP14: Local XSTOP bit 14 triggers Clockstop using ClockControl XSTOP5
26 RW CLKSTOP_MASK5_UNIT_TC_FIR_LOCAL_XSTOP15: Local XSTOP bit 15 triggers Clockstop using ClockControl XSTOP5

Mode Register
Addr: 0000000003040088 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.MODE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15TP.TCN1.N1.EPS.FIR.COMP.MODE_REG_Q_INST.LATC.L2(0:15) [0000000000000000]
Bit(s)SCOM Dial: Description
0 RW XSTOP_LOCK_XSTOP: XSTOP will lock XSTOP register - default = 1
1 RW XSTOP_LOCK_RECOV: XSTOP will lock RECOV register - default = 1
2 RW XSTOP_LOCK_SPATTN: XSTOP will lock SPATTN register - default = 0
3 RW XSTOP_LOCK_LXSTOP: XSTOP will lock LXSTOP register - default = 0
4 RW XSTOP_LOCK_HOSTATTN: XSTOP will lock HOSTATTN register - default = 0
5 RW MODE_REG05: unused
6 RW DISABLE_IOPB_ERR: disable_iopb_err XSTOP trigger to IO/PB
7 RW MODE_REG07: unused
8 RW MODE_REG08: unused
9 RW MASK_DIRECT_ERROR: mask direct error XSTOP trigger to Core
10 RW MODE_REG10: unused
11 RW MODE_REG11: unused
12 RW MODE_REG12: unused
13 RW MODE_REG13: unused
14 RW MODE_REG14: unused
15 RW MODE_REG15: unused

Local FIR
Addr: 0000000003040100 (SCOM)
0000000003040101 (SCOM1)
0000000003040102 (SCOM2)
Name:TP.TCN1.N1.LOCAL_FIR
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.FIR.LFIR.LOCALFIR.FIR.FIR.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RWX WOX_AND WOX_OR LFIR_ERROR_CFIR: CFIR - Parity or PCB access error
TYPE:RECOV CLEAR:only LFIR
1 RWX WOX_AND WOX_OR LFIR_ERROR_CPLT_CTRL: CPLT_CTRL - PCB access error
TYPE:RECOV CLEAR:by next PCB req
2 RWX WOX_AND WOX_OR LFIR_ERROR_CC_PCB: CC - PCB access error
TYPE:RECOV READ STATUS:nn03000F CLEAR:write 0 to nn03000F
3 RWX WOX_AND WOX_OR LFIR_ERROR_CC_OTHERS: CC - Clock Control Error
TYPE:RECOV READ STATUS:nn03000F CLEAR:write 0 to nn03000F
4 RWX WOX_AND WOX_OR LFIR_ERROR_IN04: PSC - PSCOM access error
TYPE:RECOV READ STATUS:nn010001 CLEAR:write 0 to nn010001
5 RWX WOX_AND WOX_OR LFIR_ERROR_IN05: PSC - internal or ring interface error
TYPE:RECOV READ STATUS:nn010001 CLEAR:write 0 to nn010001
6 RWX WOX_AND WOX_OR LFIR_ERROR_IN06: THERM - pwr_comp_err, skitter_comp_err, scan_init_version_reg_parity_err_out , count_state_err_out
TYPE:RECOV - MASK afterwards READ STATUS:nn050013 CLEAR:only scan0
7 RWX WOX_AND WOX_OR LFIR_ERROR_IN07: THERM - pcb error
TYPE:RECOV CLEAR:by next PCB req
8 RWX WOX_AND WOX_OR LFIR_ERROR_IN08: THERMTRIP - Critical temperature indicator
TYPE:MASKED (unused) CLEAR:only LFIR
9 RWX WOX_AND WOX_OR LFIR_ERROR_IN09: THERMTRIP - Fatal temperature indicator
TYPE:MASKED (unused) CLEAR:only LFIR
10 RWX WOX_AND WOX_OR LFIR_ERROR_IN10: VOLTTRIP - Voltage sense error
TYPE:MASKED (unused) CLEAR:only LFIR
11 RWX WOX_AND WOX_OR LFIR_ERROR_IN11: DBG - scom parity fail
TYPE:RECOV CLEAR:by next SCOM req
12 RWX WOX_AND WOX_OR LFIR_ERROR_IN12: reserved
TYPE:MASKED (unused) CLEAR:only LFIR
13 RWX WOX_AND WOX_OR LFIR_ERROR_IN13: reserved
TYPE:MASKED (unused) CLEAR:only LFIR
14 RWX WOX_AND WOX_OR LFIR_ERROR_IN14: reserved
TYPE:MASKED (unused) CLEAR:only LFIR
15 RWX WOX_AND WOX_OR LFIR_ERROR_IN15: reserved
TYPE:MASKED (unused) CLEAR:only LFIR
16 RWX WOX_AND WOX_OR LFIR_ERROR_IN16: reserved
TYPE:MASKED (unused) CLEAR:only LFIR
17 RWX WOX_AND WOX_OR LFIR_ERROR_IN17: reserved
TYPE:MASKED (unused) CLEAR:only LFIR
18 RWX WOX_AND WOX_OR LFIR_ERROR_IN18: reserved
TYPE:MASKED (unused) CLEAR:only LFIR
19 RWX WOX_AND WOX_OR LFIR_ERROR_IN19: reserved
TYPE:MASKED (unused) CLEAR:only LFIR
20 RWX WOX_AND WOX_OR LFIR_ERROR_IN20: Trace00 - scom parity err
TYPE:RECOV CLEAR:by next SCOM req
21 RWX WOX_AND WOX_OR LFIR_ERROR_IN21: Trace01 - scom parity err - Unused in Axon,PCI
TYPE:RECOV CLEAR:by next SCOM req
22 RWX WOX_AND WOX_OR LFIR_ERROR_IN22: unused
TYPE:MASKED (unused) CLEAR:only LFIR
23 RWX WOX_AND WOX_OR LFIR_ERROR_IN23: unused
TYPE:MASKED (unused) CLEAR:only LFIR
24 RWX WOX_AND WOX_OR LFIR_ERROR_IN24: unused
TYPE:MASKED (unused) CLEAR:only LFIR
25 RWX WOX_AND WOX_OR LFIR_ERROR_IN25: unused
TYPE:MASKED (unused) CLEAR:only LFIR
26 RWX WOX_AND WOX_OR LFIR_ERROR_IN26: unused
TYPE:MASKED (unused) CLEAR:only LFIR
27 RWX WOX_AND WOX_OR LFIR_ERROR_IN27: unused
TYPE:MASKED (unused) CLEAR:only LFIR
28 RWX WOX_AND WOX_OR LFIR_ERROR_IN28: unused
TYPE:MASKED (unused) CLEAR:only LFIR
29 RWX WOX_AND WOX_OR LFIR_ERROR_IN29: unused
TYPE:MASKED (unused) CLEAR:only LFIR
30 RWX WOX_AND WOX_OR LFIR_ERROR_IN30: unused
TYPE:MASKED (unused) CLEAR:only LFIR
31 RWX WOX_AND WOX_OR LFIR_ERROR_IN31: unused
TYPE:MASKED (unused) CLEAR:only LFIR
32 RWX WOX_AND WOX_OR LFIR_ERROR_IN32: unused
TYPE:MASKED (unused) CLEAR:only LFIR
33 RWX WOX_AND WOX_OR LFIR_ERROR_IN33: unused
TYPE:MASKED (unused) CLEAR:only LFIR
34 RWX WOX_AND WOX_OR LFIR_ERROR_IN34: unused
TYPE:MASKED (unused) CLEAR:only LFIR
35 RWX WOX_AND WOX_OR LFIR_ERROR_IN35: unused
TYPE:MASKED (unused) CLEAR:only LFIR
36 RWX WOX_AND WOX_OR LFIR_ERROR_IN36: unused
TYPE:MASKED (unused) CLEAR:only LFIR
37 RWX WOX_AND WOX_OR LFIR_ERROR_IN37: unused
TYPE:MASKED (unused) CLEAR:only LFIR
38 RWX WOX_AND WOX_OR LFIR_ERROR_IN38: unused
TYPE:MASKED (unused) CLEAR:only LFIR
39 RWX WOX_AND WOX_OR LFIR_ERROR_IN39: unused
TYPE:MASKED (unused) CLEAR:only LFIR
40 RWX WOX_AND WOX_OR LFIR_ERROR_IN40: unused
TYPE:MASKED (unused) CLEAR:only LFIR
41 RWX WOX_AND WOX_OR LFIR_ERROR_IN41: unused
TYPE:MASKED (unused) CLEAR:only LFIR
42 RWX WOX_AND WOX_OR LFIR_ERROR_IN42: unused
TYPE:MASKED (unused) CLEAR:only LFIR
43 RWX WOX_AND WOX_OR LFIR_ERROR_IN43: unused
TYPE:MASKED (unused) CLEAR:only LFIR
44 RWX WOX_AND WOX_OR LFIR_ERROR_IN44: unused
TYPE:MASKED (unused) CLEAR:only LFIR
45 RWX WOX_AND WOX_OR LFIR_ERROR_IN45: unused
TYPE:MASKED (unused) CLEAR:only LFIR
46 RWX WOX_AND WOX_OR LFIR_ERROR_IN46: unused
TYPE:MASKED (unused) CLEAR:only LFIR
47 RWX WOX_AND WOX_OR LFIR_ERROR_IN47: unused
TYPE:MASKED (unused) CLEAR:only LFIR
48 RWX WOX_AND WOX_OR LFIR_ERROR_IN48: unused
TYPE:MASKED (unused) CLEAR:only LFIR
49 RWX WOX_AND WOX_OR LFIR_ERROR_IN49: unused
TYPE:MASKED (unused) CLEAR:only LFIR
50 RWX WOX_AND WOX_OR LFIR_ERROR_IN50: unused
TYPE:MASKED (unused) CLEAR:only LFIR
51 RWX WOX_AND WOX_OR LFIR_ERROR_IN51: unused
TYPE:MASKED (unused) CLEAR:only LFIR
52 RWX WOX_AND WOX_OR LFIR_ERROR_IN52: unused
TYPE:MASKED (unused) CLEAR:only LFIR
53 RWX WOX_AND WOX_OR LFIR_ERROR_IN53: unused
TYPE:MASKED (unused) CLEAR:only LFIR
54 RWX WOX_AND WOX_OR LFIR_ERROR_IN54: unused
TYPE:MASKED (unused) CLEAR:only LFIR
55 RWX WOX_AND WOX_OR LFIR_ERROR_IN55: unused
TYPE:MASKED (unused) CLEAR:only LFIR
56 RWX WOX_AND WOX_OR LFIR_ERROR_IN56: PowerBus chip quiesce failed - triggered by firmware
TYPE:XSTOP CLEAR:only LFIR
57 RWX WOX_AND WOX_OR LFIR_ERROR_IN57: PowerBus system quiesce failed - triggered by firmware
TYPE:XSTOP CLEAR:only LFIR
58 RWX WOX_AND WOX_OR LFIR_ERROR_IN58: Deadman timer expired during master core wakeup by SBE - triggered by firmware
TYPE:XSTOP CLEAR:only LFIR
59 RWX WOX_AND WOX_OR LFIR_ERROR_IN59: Switch from cache contained into system mode failed - triggered by firmware
TYPE:XSTOP CLEAR:only LFIR
60 RWX WOX_AND WOX_OR LFIR_ERROR_IN60: Hypervisor / Hostboot / OPAL initiated Terminate Immediate (TI) - triggered by firmware
TYPE:XSTOP CLEAR:only LFIR
61 RWX WOX_AND WOX_OR LFIR_ERROR_IN61: reserved for software use
TYPE:MASKED (unused) CLEAR:only LFIR
62 RWX WOX_AND WOX_OR LFIR_ERROR_IN62: reserved for software use
TYPE:MASKED (unused) CLEAR:only LFIR
63 RWX WOX_AND WOX_OR LFIR_ERROR_EXT_LOCAL_XSTOP: ext_local_xstop
TYPE:MASKED (unused) CLEAR:

Local FIR Mask
Addr: 0000000003040103 (SCOM)
0000000003040104 (SCOM1)
0000000003040105 (SCOM2)
Name:TP.TCN1.N1.EPS.FIR.LOCAL_FIR_MASK
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.FIR.LFIR.LOCALFIR.FIR.FIR_MASK.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOMSCOM1SCOM2Dial: Description
0 RW WO_AND WO_OR LFIR_MASK00: MASK
1 RW WO_AND WO_OR LFIR_MASK01: MASK
2 RW WO_AND WO_OR LFIR_MASK02: MASK
3 RW WO_AND WO_OR LFIR_MASK03: MASK
4 RW WO_AND WO_OR LFIR_MASK04: MASK
5 RW WO_AND WO_OR LFIR_MASK05: MASK
6 RW WO_AND WO_OR LFIR_MASK06: MASK
7 RW WO_AND WO_OR LFIR_MASK07: MASK
8 RW WO_AND WO_OR LFIR_MASK08: MASK
9 RW WO_AND WO_OR LFIR_MASK09: MASK
10 RW WO_AND WO_OR LFIR_MASK10: MASK
11 RW WO_AND WO_OR LFIR_MASK11: MASK
12 RW WO_AND WO_OR LFIR_MASK12: MASK
13 RW WO_AND WO_OR LFIR_MASK13: MASK
14 RW WO_AND WO_OR LFIR_MASK14: MASK
15 RW WO_AND WO_OR LFIR_MASK15: MASK
16 RW WO_AND WO_OR LFIR_MASK16: MASK
17 RW WO_AND WO_OR LFIR_MASK17: MASK
18 RW WO_AND WO_OR LFIR_MASK18: MASK
19 RW WO_AND WO_OR LFIR_MASK19: MASK
20 RW WO_AND WO_OR LFIR_MASK20: MASK
21 RW WO_AND WO_OR LFIR_MASK21: MASK
22 RW WO_AND WO_OR LFIR_MASK22: MASK
23 RW WO_AND WO_OR LFIR_MASK23: MASK
24 RW WO_AND WO_OR LFIR_MASK24: MASK
25 RW WO_AND WO_OR LFIR_MASK25: MASK
26 RW WO_AND WO_OR LFIR_MASK26: MASK
27 RW WO_AND WO_OR LFIR_MASK27: MASK
28 RW WO_AND WO_OR LFIR_MASK28: MASK
29 RW WO_AND WO_OR LFIR_MASK29: MASK
30 RW WO_AND WO_OR LFIR_MASK30: MASK
31 RW WO_AND WO_OR LFIR_MASK31: MASK
32 RW WO_AND WO_OR LFIR_MASK32: MASK
33 RW WO_AND WO_OR LFIR_MASK33: MASK
34 RW WO_AND WO_OR LFIR_MASK34: MASK
35 RW WO_AND WO_OR LFIR_MASK35: MASK
36 RW WO_AND WO_OR LFIR_MASK36: MASK
37 RW WO_AND WO_OR LFIR_MASK37: MASK
38 RW WO_AND WO_OR LFIR_MASK38: MASK
39 RW WO_AND WO_OR LFIR_MASK39: MASK
40 RW WO_AND WO_OR LFIR_MASK40: MASK
41 RW WO_AND WO_OR LFIR_MASK41: MASK
42 RW WO_AND WO_OR LFIR_MASK42: MASK
43 RW WO_AND WO_OR LFIR_MASK43: MASK
44 RW WO_AND WO_OR LFIR_MASK44: MASK
45 RW WO_AND WO_OR LFIR_MASK45: MASK
46 RW WO_AND WO_OR LFIR_MASK46: MASK
47 RW WO_AND WO_OR LFIR_MASK47: MASK
48 RW WO_AND WO_OR LFIR_MASK48: MASK
49 RW WO_AND WO_OR LFIR_MASK49: MASK
50 RW WO_AND WO_OR LFIR_MASK50: MASK
51 RW WO_AND WO_OR LFIR_MASK51: MASK
52 RW WO_AND WO_OR LFIR_MASK52: MASK
53 RW WO_AND WO_OR LFIR_MASK53: MASK
54 RW WO_AND WO_OR LFIR_MASK54: MASK
55 RW WO_AND WO_OR LFIR_MASK55: MASK
56 RW WO_AND WO_OR LFIR_MASK56: MASK
57 RW WO_AND WO_OR LFIR_MASK57: MASK
58 RW WO_AND WO_OR LFIR_MASK58: MASK
59 RW WO_AND WO_OR LFIR_MASK59: MASK
60 RW WO_AND WO_OR LFIR_MASK60: MASK
61 RW WO_AND WO_OR LFIR_MASK61: MASK
62 RW WO_AND WO_OR LFIR_MASK62: MASK
63 RW WO_AND WO_OR LFIR_MASK63: MASK

Local FIR Action0
Addr: 0000000003040106 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.LOCAL_FIR_ACTION0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.FIR.LFIR.LOCALFIR.FIR.DO_ACTION0.FIR_ACTION0.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW FIR_ACTION0_IN00: ACTION0
1 RW FIR_ACTION0_IN01: ACTION0
2 RW FIR_ACTION0_IN02: ACTION0
3 RW FIR_ACTION0_IN03: ACTION0
4 RW FIR_ACTION0_IN04: ACTION0
5 RW FIR_ACTION0_IN05: ACTION0
6 RW FIR_ACTION0_IN06: ACTION0
7 RW FIR_ACTION0_IN07: ACTION0
8 RW FIR_ACTION0_IN08: ACTION0
9 RW FIR_ACTION0_IN09: ACTION0
10 RW FIR_ACTION0_IN10: ACTION0
11 RW FIR_ACTION0_IN11: ACTION0
12 RW FIR_ACTION0_IN12: ACTION0
13 RW FIR_ACTION0_IN13: ACTION0
14 RW FIR_ACTION0_IN14: ACTION0
15 RW FIR_ACTION0_IN15: ACTION0
16 RW FIR_ACTION0_IN16: ACTION0
17 RW FIR_ACTION0_IN17: ACTION0
18 RW FIR_ACTION0_IN18: ACTION0
19 RW FIR_ACTION0_IN19: ACTION0
20 RW FIR_ACTION0_IN20: ACTION0
21 RW FIR_ACTION0_IN21: ACTION0
22 RW FIR_ACTION0_IN22: ACTION0
23 RW FIR_ACTION0_IN23: ACTION0
24 RW FIR_ACTION0_IN24: ACTION0
25 RW FIR_ACTION0_IN25: ACTION0
26 RW FIR_ACTION0_IN26: ACTION0
27 RW FIR_ACTION0_IN27: ACTION0
28 RW FIR_ACTION0_IN28: ACTION0
29 RW FIR_ACTION0_IN29: ACTION0
30 RW FIR_ACTION0_IN30: ACTION0
31 RW FIR_ACTION0_IN31: ACTION0
32 RW FIR_ACTION0_IN32: ACTION0
33 RW FIR_ACTION0_IN33: ACTION0
34 RW FIR_ACTION0_IN34: ACTION0
35 RW FIR_ACTION0_IN35: ACTION0
36 RW FIR_ACTION0_IN36: ACTION0
37 RW FIR_ACTION0_IN37: ACTION0
38 RW FIR_ACTION0_IN38: ACTION0
39 RW FIR_ACTION0_IN39: ACTION0
40 RW FIR_ACTION0_IN40: ACTION0
41 RW FIR_ACTION0_IN41: ACTION0
42 RW FIR_ACTION0_IN42: ACTION0
43 RW FIR_ACTION0_IN43: ACTION0
44 RW FIR_ACTION0_IN44: ACTION0
45 RW FIR_ACTION0_IN45: ACTION0
46 RW FIR_ACTION0_IN46: ACTION0
47 RW FIR_ACTION0_IN47: ACTION0
48 RW FIR_ACTION0_IN48: ACTION0
49 RW FIR_ACTION0_IN49: ACTION0
50 RW FIR_ACTION0_IN50: ACTION0
51 RW FIR_ACTION0_IN51: ACTION0
52 RW FIR_ACTION0_IN52: ACTION0
53 RW FIR_ACTION0_IN53: ACTION0
54 RW FIR_ACTION0_IN54: ACTION0
55 RW FIR_ACTION0_IN55: ACTION0
56 RW FIR_ACTION0_IN56: ACTION0
57 RW FIR_ACTION0_IN57: ACTION0
58 RW FIR_ACTION0_IN58: ACTION0
59 RW FIR_ACTION0_IN59: ACTION0
60 RW FIR_ACTION0_IN60: ACTION0
61 RW FIR_ACTION0_IN61: ACTION0
62 RW FIR_ACTION0_IN62: ACTION0
63 RW FIR_ACTION0_IN63: ACTION0

Local FIR Action1
Addr: 0000000003040107 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.LOCAL_FIR_ACTION1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.FIR.LFIR.LOCALFIR.FIR.DO_ACTION1.FIR_ACTION1.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW FIR_ACTION1_IN00: ACTION1
1 RW FIR_ACTION1_IN01: ACTION1
2 RW FIR_ACTION1_IN02: ACTION1
3 RW FIR_ACTION1_IN03: ACTION1
4 RW FIR_ACTION1_IN04: ACTION1
5 RW FIR_ACTION1_IN05: ACTION1
6 RW FIR_ACTION1_IN06: ACTION1
7 RW FIR_ACTION1_IN07: ACTION1
8 RW FIR_ACTION1_IN08: ACTION1
9 RW FIR_ACTION1_IN09: ACTION1
10 RW FIR_ACTION1_IN10: ACTION1
11 RW FIR_ACTION1_IN11: ACTION1
12 RW FIR_ACTION1_IN12: ACTION1
13 RW FIR_ACTION1_IN13: ACTION1
14 RW FIR_ACTION1_IN14: ACTION1
15 RW FIR_ACTION1_IN15: ACTION1
16 RW FIR_ACTION1_IN16: ACTION1
17 RW FIR_ACTION1_IN17: ACTION1
18 RW FIR_ACTION1_IN18: ACTION1
19 RW FIR_ACTION1_IN19: ACTION1
20 RW FIR_ACTION1_IN20: ACTION1
21 RW FIR_ACTION1_IN21: ACTION1
22 RW FIR_ACTION1_IN22: ACTION1
23 RW FIR_ACTION1_IN23: ACTION1
24 RW FIR_ACTION1_IN24: ACTION1
25 RW FIR_ACTION1_IN25: ACTION1
26 RW FIR_ACTION1_IN26: ACTION1
27 RW FIR_ACTION1_IN27: ACTION1
28 RW FIR_ACTION1_IN28: ACTION1
29 RW FIR_ACTION1_IN29: ACTION1
30 RW FIR_ACTION1_IN30: ACTION1
31 RW FIR_ACTION1_IN31: ACTION1
32 RW FIR_ACTION1_IN32: ACTION1
33 RW FIR_ACTION1_IN33: ACTION1
34 RW FIR_ACTION1_IN34: ACTION1
35 RW FIR_ACTION1_IN35: ACTION1
36 RW FIR_ACTION1_IN36: ACTION1
37 RW FIR_ACTION1_IN37: ACTION1
38 RW FIR_ACTION1_IN38: ACTION1
39 RW FIR_ACTION1_IN39: ACTION1
40 RW FIR_ACTION1_IN40: ACTION1
41 RW FIR_ACTION1_IN41: ACTION1
42 RW FIR_ACTION1_IN42: ACTION1
43 RW FIR_ACTION1_IN43: ACTION1
44 RW FIR_ACTION1_IN44: ACTION1
45 RW FIR_ACTION1_IN45: ACTION1
46 RW FIR_ACTION1_IN46: ACTION1
47 RW FIR_ACTION1_IN47: ACTION1
48 RW FIR_ACTION1_IN48: ACTION1
49 RW FIR_ACTION1_IN49: ACTION1
50 RW FIR_ACTION1_IN50: ACTION1
51 RW FIR_ACTION1_IN51: ACTION1
52 RW FIR_ACTION1_IN52: ACTION1
53 RW FIR_ACTION1_IN53: ACTION1
54 RW FIR_ACTION1_IN54: ACTION1
55 RW FIR_ACTION1_IN55: ACTION1
56 RW FIR_ACTION1_IN56: ACTION1
57 RW FIR_ACTION1_IN57: ACTION1
58 RW FIR_ACTION1_IN58: ACTION1
59 RW FIR_ACTION1_IN59: ACTION1
60 RW FIR_ACTION1_IN60: ACTION1
61 RW FIR_ACTION1_IN61: ACTION1
62 RW FIR_ACTION1_IN62: ACTION1
63 RW FIR_ACTION1_IN63: ACTION1

Local FIR WOF
Addr: 0000000003040108 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.LOCAL_FIR_WOF
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.FIR.LFIR.LOCALFIR.FIR.WOF_LAT_YES.WOF.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW_WCLRPART FIR_WOF_IN00: WOF
1 RW_WCLRPART FIR_WOF_IN01: WOF
2 RW_WCLRPART FIR_WOF_IN02: WOF
3 RW_WCLRPART FIR_WOF_IN03: WOF
4 RW_WCLRPART FIR_WOF_IN04: WOF
5 RW_WCLRPART FIR_WOF_IN05: WOF
6 RW_WCLRPART FIR_WOF_IN06: WOF
7 RW_WCLRPART FIR_WOF_IN07: WOF
8 RW_WCLRPART FIR_WOF_IN08: WOF
9 RW_WCLRPART FIR_WOF_IN09: WOF
10 RW_WCLRPART FIR_WOF_IN10: WOF
11 RW_WCLRPART FIR_WOF_IN11: WOF
12 RW_WCLRPART FIR_WOF_IN12: WOF
13 RW_WCLRPART FIR_WOF_IN13: WOF
14 RW_WCLRPART FIR_WOF_IN14: WOF
15 RW_WCLRPART FIR_WOF_IN15: WOF
16 RW_WCLRPART FIR_WOF_IN16: WOF
17 RW_WCLRPART FIR_WOF_IN17: WOF
18 RW_WCLRPART FIR_WOF_IN18: WOF
19 RW_WCLRPART FIR_WOF_IN19: WOF
20 RW_WCLRPART FIR_WOF_IN20: WOF
21 RW_WCLRPART FIR_WOF_IN21: WOF
22 RW_WCLRPART FIR_WOF_IN22: WOF
23 RW_WCLRPART FIR_WOF_IN23: WOF
24 RW_WCLRPART FIR_WOF_IN24: WOF
25 RW_WCLRPART FIR_WOF_IN25: WOF
26 RW_WCLRPART FIR_WOF_IN26: WOF
27 RW_WCLRPART FIR_WOF_IN27: WOF
28 RW_WCLRPART FIR_WOF_IN28: WOF
29 RW_WCLRPART FIR_WOF_IN29: WOF
30 RW_WCLRPART FIR_WOF_IN30: WOF
31 RW_WCLRPART FIR_WOF_IN31: WOF
32 RW_WCLRPART FIR_WOF_IN32: WOF
33 RW_WCLRPART FIR_WOF_IN33: WOF
34 RW_WCLRPART FIR_WOF_IN34: WOF
35 RW_WCLRPART FIR_WOF_IN35: WOF
36 RW_WCLRPART FIR_WOF_IN36: WOF
37 RW_WCLRPART FIR_WOF_IN37: WOF
38 RW_WCLRPART FIR_WOF_IN38: WOF
39 RW_WCLRPART FIR_WOF_IN39: WOF
40 RW_WCLRPART FIR_WOF_IN40: WOF
41 RW_WCLRPART FIR_WOF_IN41: WOF
42 RW_WCLRPART FIR_WOF_IN42: WOF
43 RW_WCLRPART FIR_WOF_IN43: WOF
44 RW_WCLRPART FIR_WOF_IN44: WOF
45 RW_WCLRPART FIR_WOF_IN45: WOF
46 RW_WCLRPART FIR_WOF_IN46: WOF
47 RW_WCLRPART FIR_WOF_IN47: WOF
48 RW_WCLRPART FIR_WOF_IN48: WOF
49 RW_WCLRPART FIR_WOF_IN49: WOF
50 RW_WCLRPART FIR_WOF_IN50: WOF
51 RW_WCLRPART FIR_WOF_IN51: WOF
52 RW_WCLRPART FIR_WOF_IN52: WOF
53 RW_WCLRPART FIR_WOF_IN53: WOF
54 RW_WCLRPART FIR_WOF_IN54: WOF
55 RW_WCLRPART FIR_WOF_IN55: WOF
56 RW_WCLRPART FIR_WOF_IN56: WOF
57 RW_WCLRPART FIR_WOF_IN57: WOF
58 RW_WCLRPART FIR_WOF_IN58: WOF
59 RW_WCLRPART FIR_WOF_IN59: WOF
60 RW_WCLRPART FIR_WOF_IN60: WOF
61 RW_WCLRPART FIR_WOF_IN61: WOF
62 RW_WCLRPART FIR_WOF_IN62: WOF
63 RW_WCLRPART FIR_WOF_IN63: WOF

Local FIR Action2
Addr: 0000000003040109 (SCOM)
Name:TP.TCN1.N1.EPS.FIR.LOCAL_FIR_ACTION2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.FIR.LFIR.LOCALFIR.FIR.DO_ACTION2.FIR_ACTION2.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0 RW FIR_ACTION2_IN00: ACTION2
1 RW FIR_ACTION2_IN01: ACTION2
2 RW FIR_ACTION2_IN02: ACTION2
3 RW FIR_ACTION2_IN03: ACTION2
4 RW FIR_ACTION2_IN04: ACTION2
5 RW FIR_ACTION2_IN05: ACTION2
6 RW FIR_ACTION2_IN06: ACTION2
7 RW FIR_ACTION2_IN07: ACTION2
8 RW FIR_ACTION2_IN08: ACTION2
9 RW FIR_ACTION2_IN09: ACTION2
10 RW FIR_ACTION2_IN10: ACTION2
11 RW FIR_ACTION2_IN11: ACTION2
12 RW FIR_ACTION2_IN12: ACTION2
13 RW FIR_ACTION2_IN13: ACTION2
14 RW FIR_ACTION2_IN14: ACTION2
15 RW FIR_ACTION2_IN15: ACTION2
16 RW FIR_ACTION2_IN16: ACTION2
17 RW FIR_ACTION2_IN17: ACTION2
18 RW FIR_ACTION2_IN18: ACTION2
19 RW FIR_ACTION2_IN19: ACTION2
20 RW FIR_ACTION2_IN20: ACTION2
21 RW FIR_ACTION2_IN21: ACTION2
22 RW FIR_ACTION2_IN22: ACTION2
23 RW FIR_ACTION2_IN23: ACTION2
24 RW FIR_ACTION2_IN24: ACTION2
25 RW FIR_ACTION2_IN25: ACTION2
26 RW FIR_ACTION2_IN26: ACTION2
27 RW FIR_ACTION2_IN27: ACTION2
28 RW FIR_ACTION2_IN28: ACTION2
29 RW FIR_ACTION2_IN29: ACTION2
30 RW FIR_ACTION2_IN30: ACTION2
31 RW FIR_ACTION2_IN31: ACTION2
32 RW FIR_ACTION2_IN32: ACTION2
33 RW FIR_ACTION2_IN33: ACTION2
34 RW FIR_ACTION2_IN34: ACTION2
35 RW FIR_ACTION2_IN35: ACTION2
36 RW FIR_ACTION2_IN36: ACTION2
37 RW FIR_ACTION2_IN37: ACTION2
38 RW FIR_ACTION2_IN38: ACTION2
39 RW FIR_ACTION2_IN39: ACTION2
40 RW FIR_ACTION2_IN40: ACTION2
41 RW FIR_ACTION2_IN41: ACTION2
42 RW FIR_ACTION2_IN42: ACTION2
43 RW FIR_ACTION2_IN43: ACTION2
44 RW FIR_ACTION2_IN44: ACTION2
45 RW FIR_ACTION2_IN45: ACTION2
46 RW FIR_ACTION2_IN46: ACTION2
47 RW FIR_ACTION2_IN47: ACTION2
48 RW FIR_ACTION2_IN48: ACTION2
49 RW FIR_ACTION2_IN49: ACTION2
50 RW FIR_ACTION2_IN50: ACTION2
51 RW FIR_ACTION2_IN51: ACTION2
52 RW FIR_ACTION2_IN52: ACTION2
53 RW FIR_ACTION2_IN53: ACTION2
54 RW FIR_ACTION2_IN54: ACTION2
55 RW FIR_ACTION2_IN55: ACTION2
56 RW FIR_ACTION2_IN56: ACTION2
57 RW FIR_ACTION2_IN57: ACTION2
58 RW FIR_ACTION2_IN58: ACTION2
59 RW FIR_ACTION2_IN59: ACTION2
60 RW FIR_ACTION2_IN60: ACTION2
61 RW FIR_ACTION2_IN61: ACTION2
62 RW FIR_ACTION2_IN62: ACTION2
63 RW FIR_ACTION2_IN63: ACTION2

DTS Thermal Sensor loop1 Results
Addr: 0000000003050000 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.DTS_RESULT0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:47TP.TCN1.N1.EPS.THERM.WSUB.THRESH.COMP.DTS_RESULT_REGQ_INT_INST.LATC.L2(0:47) [000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:15 ROX DTS_0_RESULT: Calibrated DTS Result of sensor with id 0.
EQ x50000: CORE0 ISU
EQ x50020: CORE2 ISU
N0,N1,PAUE,PAUW: DTS0
AXON,PCI,TP: n/a
0-11 sensor result, 12-13 trip, 14 spare, 15 valid
16:31 ROX DTS_1_RESULT: Calibrated DTS Result of sensor with id 1.
EQ x50000: CORE0 VSU
EQ x50020: CORE2 VSU
N0,N1,PAUE,PAUW: n/a
AXON,PCI,TP: n/a
0-11 sensor result, 12-13 trip, 14 spare, 15 valid .
32:47 ROX DTS_2_RESULT: Calibrated DTS Result of sensor with id 2.
EQ x50000: CORE0 L3
EQ x50020: CORE2 L3
N0,N1,PAUE,PAUW: n/a
AXON,PCI,TP: n/a
0-11 sensor result, 12-13 trip, 14 spare, 15 valid .
48:63 RO constant=0b0000000000000000

DTS Thermal Sensor loop2 Results
Addr: 0000000003050001 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.DTS_RESULT1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:47TP.TCN1.N1.EPS.THERM.WSUB.THRESH.COMP.DTS_RESULT_REGQ_INT_INST.LATC.L2(48:95) [000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:15 ROX DTS_4_RESULT: Calibrated DTS Result of sensor with id 4.
EQ x50001: CORE1 ISU
EQ x50021: CORE3 ISU
N0,N1,PAUE,PAUW: n/a
AXON,PCI,TP: n/a
0-11 sensor result, 12-13 trip, 14 spare, 15 valid .
16:31 ROX DTS_5_RESULT: Calibrated DTS Result of sensor with id 5.
EQ x50001: CORE1 VSU
EQ x50021: CORE3 VSU
N0,N1,PAUE,PAUW: n/a
AXON,PCI,TP: n/a
0-11 sensor result, 12-13 trip, 14 spare, 15 valid .
32:47 ROX DTS_6_RESULT: Calibrated DTS Result of sensor with id 6.
EQ x50001: CORE1 L3
EQ x50021: CORE3 L3
N0,N1,PAUE,PAUW: n/a
AXON,PCI,TP: n/a
0-11 sensor result, 12-13 trip, 14 spare, 15 valid .
48:63 RO constant=0b0000000000000000

DTS Thermal Sensor loop3 Results
Addr: 0000000003050002 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.DTS_RESULT2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:15TP.TCN1.N1.EPS.THERM.WSUB.THRESH.COMP.DTS_RESULT_REGQ_INT_INST.LATC.L2(96:111) [0000000000000000]
Bit(s)SCOM Dial: Description
0:15 ROX DTS_8_RESULT: Calibrated DTS Result of sensor with id 8.
EQ x50002: Racetrack
EQ x50022: n/a
N0,N1,PAUE,PAUW: n/a
AXON,PCI,TP: n/a
0-11 sensor result, 12-13 trip, 14 spare, 15 valid .
16:63 RO constant=0b000000000000000000000000000000000000000000000000

DTS Trace Results
Addr: 0000000003050003 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.DTS_TRC_RESULT
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:43TP.TCN1.N1.EPS.THERM.WSUB.PWR.PCB.TIMESTAMP_COUNT_REG_LT_INST.LATC.L2(0:43) [00000000000000000000000000000000000000000000]
44TP.TCN1.N1.EPS.THERM.WSUB.PWR.PCB.TIMESTAMP_OVERFLOW_ERR_LT_INST.LATC.L2(0) [0]
48:63TP.TCN1.N1.EPS.THERM.WSUB.THRESH.COMP.DTS_RESULT_REGQ_INT_INST.LATC.L2(16:31) [0000000000000000]
Bit(s)SCOM Dial: Description
0:43 ROX TIMESTAMP_COUNTER_VALUE: Time stamp counter value during DTS trace mode.
44 ROX TIMESTAMP_COUNTER_OVERFLOW_ERR: Over flow error bit of the time stamp counter value during DTS trace mode.
45:47 RO constant=0b000
48:63 ROX DTS_1_RESULT: Calibrated DTS Result of sensor with id 1.
EQ x50000: CORE0 VSU
EQ x50020: CORE2 VSU
N0,N1,PAUE,PAUW: n/a
AXON,PCI,TP: n/a
0-11 sensor result, 12-13 trip, 14 spare, 15 valid .

CPM & DTS enables and cntl's
Addr: 000000000305000F (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.THERM_MODE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:19TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.THERM_MODEREG_LT_0_INST.LATC.L2(0:19) [00000000000000000000]
20:22TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.THERM_DTS_ENABLE_INTQ_INST.LATC.L2(0:2) [000]
24:26TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.THERM_DTS_ENABLE_INTQ_INST.LATC.L2(3:5) [000]
28TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.THERM_DTS_ENABLE_INTQ_INST.LATC.L2(6) [0]
Bit(s)SCOM Dial: Description
0 RW THERM_DIS_CPM_BUBBLE_CORR: critical path result bubble correction active
1 RW THERM_FORCE_THRES_ACT: force tpc_therm_thres_mac clock gating off and activates clocks
2:4 RW THERM_THRES_TRIP_ENA: therm_thres_trip compare enables
1xx: trip0 - warning
x1x: trip1 - critical
xx1: trip2 - fatal
5 RW THERM_DTS_SAMPLE_ENA: 0: no dts sampling, 1: dts sampling is enabled and below counter compare match can occur.
6:9 RW THERM_SAMPLE_PULSE_CNT: A 16 MHz sample pulse is feed into an 18 Bit counter,
with the therm_sample_pulse_cnt it is possible to select a highorder bit of the counter
to enable a resolutions of sampling dtss between 2.5 us and 80 ms.
An edge detection circuit detects the rising edge of the selected counter bit and this triggers a dts sample
0000: 16 ms
0001: 8 ms
0010: 4 ms
0011: 2 ms
0100: 1 ms
0101: 0.5 ms
0110: 250 us
0111: 125 us
1000: 62 .5us
1001: 31.3 us
1010: 15.6 us
1011: 7.8 us
1100: 3.9 us
1101: 2 us
1110: 1 us
1111: 0.5 us
10:11 RW THERM_THRES_MODE_ENA: forces max or min mode in threshold unit:
00: is off
11: is ilegal
10: max mode
01: min mode
12 RW DTS_TRIGGER_MODE: unused
13 RW DTS_TRIGGER_SEL: unused
14 RW THERM_THRES_OVERFLOW_MASK: 0 - therm_overflow_err will be enabled
1 - therm_overflow_err will be disabled
15 RW THERM_MODE_UNUSED: unused
16:19 RW THERM_DTS_READ_SEL: selects which dts result will be provided with pcb read addr_v(3):
0000: DTS 0
0001: DTS 1
0010: DTS 2
0100: DTS 4
0101: DTS 5
0110: DTS 6
1000: DTS 8
1111: Worst Case Sensor

20:22 RW THERM_DTS_ENABLE_L1: loop1 dts enables:
If there is only a single DTS enabled, it has to be the first DTS in a loop - here DTS 0
1xxx: DTS 0 available
x1xx: DTS 1 available
xx1x: DTS 2 available
23 RO constant=0b0
24:26 RW THERM_DTS_ENABLE_L2: loop2 dts enables:
If there is only a single DTS enabled, it has to be the first DTS in a loop - here DTS 4
1xxx: DTS 4 available
x1xx: DTS 5 available
xx1x: DTS 6 available
27 RO constant=0b0
28 RW THERM_DTS_ENABLE_L3: dts enables:
If there is only a single DTS enabled, it has to be the first DTS in a loop - here DTS 8
1xxx: DTS 8 available
29:36 RO constant=0b00000000

Skitter Control Register
Addr: 0000000003050010 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_MODE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:7TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_MODEREG_LT_0_INST.LATC.L2(0:7) [00000000]
8:9TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_MODEREG_LT_8_INST.LATC.L2(8:9) [00]
44TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_HOLD_SAMPLE_LT_INST.LATC.L2(0) [0]
45TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_DATA_V_LT_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 RW SKITTER_HOLD_SAMPLE: forces skitter to hold current sample
1 RW DISABLE_SKITTER_STICKINESS: if '0' accumulation mode, '1' samples new value each cycle and resets sticky value
2:3 RW SKITTER_MODE_UNUSED1: unused
4:5 RW SKITTER_HOLD_DBGTRIG_SEL: bit0: hold_on_trigger0
bit1: _on_trigger1
6:7 RW SKITTER_RESET_TRIG_SEL: bit0: reset_sticky_on_trigger0
bit1: reset_sticky_on_trigger1
8:9 RW SKITTER_SAMPLE_GUTS: selects guts to measure:
00: guts1
01: guts2
10: guts3
11: guts4
10:43 RO constant=0b0000000000000000000000000000000000
44 ROX SKITTER_HOLD_SAMPLE_WITH_TRIGGER: forces skitter to hold current sample on dbg trigger, this has highest priority
45 ROX SKITTER_DATA_V_LT: if '1' the data requested by a skitter force read register has finished and data is present in skitter data register in the collector macro. The data be read by any combination of V25/V26/V27 pcb reads

Error Injection Control Register
Addr: 0000000003050011 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.INJECT_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:3TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.INJECT_REG_LT_INST.LATC.L2(0:3) [0000]
Bit(s)SCOM Dial: Description
0:1 RW THERM_INJECT_TRIP: 00: no injection
01: warning trip level injection
10: crtical trip level injection
11: fatal trip level injection
2:3 RW THERM_INJECT_MODE: 00: no injection
01: injection on the next dts sample
10: solid injection for the next dts samples till bit setting changes
11: not used

Control / Force Reset Register
Addr: 0000000003050012 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.CONTROL_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
12TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.F_SHIFT_SENSOR [X]
Bit(s)SCOM Dial: Description
0 WO_1P reset_trip_history
1 WO_1P reset_sample_pulse_cnt
2 WO_1P f_reset_cpm_rd
3 WO_1P f_reset_cpm_wr
4 WO_1P reset_sample_dts
5 WO_1P force_sample_dts
6 WO_1P force_sample_dts_interruptible
7 WO_1P force_reset_thres_l1results
8 WO_1P force_reset_thres_l2results
9 WO_1P force_reset_thres_l3results
10 WO_1P force_measure_volt_interruptible
11 WO_1P force_reset_measure_volt
12 WO_1P force_shift_sensor

Thermal Error Status Register
Addr: 0000000003050013 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.ERR_STATUS_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:1TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(0:1) [00]
2:3TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(0:1) [00]
4TP.TCN1.N1.EPS.THERM.WSUB.PWR.PCB.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(0) [0]
5TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(2) [0]
6TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(3) [0]
7TP.TCN1.N1.EPS.THERM.WSUB.PWR.PCB.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(1) [0]
8TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(7) [0]
9TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(3) [0]
10TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(12) [0]
11:13TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(8:10) [000]
14TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(2) [0]
15TP.TCN1.N1.EPS.THERM.WSUB.PWR.PCB.CERR0.HOLD_LATCH_INST.HOLD.LATC.L2(2) [0]
40:43TP.TCN1.N1.EPS.THERM.WSUB.PWR.PCB.COUNT_STATE_LT_INST.LATC.L2(0:3) [0000]
44:46TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.RUN_STATE_LT_INST.LATC.L2(0:2) [000]
47TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.SHIFT_DTS_LT_INST.LATC.L2(0) [0]
48TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.SHIFT_VOLT_LT_INST.LATC.L2(0) [0]
49:50TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.READ_STATE_LT_INST.LATC.L2(0:1) [00]
51:54TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.WRITE_STATE_LT_INST.LATC.L2(0:3) [0000]
55TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.SAMPLE_DTS_LT_INST.LATC.L2(0) [0]
56TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.MEASURE_VOLT_LT_INST.LATC.L2(0) [0]
57TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.READ_CPM_LT_INST.LATC.L2(0) [0]
58TP.TCN1.N1.EPS.THERM.WSUB.PWR.COMP.WRITE_CPM_LT_INST.LATC.L2(0) [0]
59TP.TCN1.N1.EPS.THERM.WSUB.PWR.PWR_STATUS(15) [0]
Bit(s)SCOM Dial: Description
0 ROX serial_shiftcnt_modereg_parity_err_hold
1 ROX therm_modereg_parity_err_hold
2 ROX skitter_modereg_parity_err_hold
3 ROX skitter_forcereg_parity_err_hold
4 ROX scan_init_version_reg_parity_err_hold
5 ROX volt_modereg_parity_err_hold
6 ROX skitter_clksrcreg_parity_err_hold
7 ROX count_state_err_hold
8 ROX run_state_err_hold
9 ROX thres_therm_state_err_hold
10 ROX thres_therm_overflow_err_hold
11 ROX shifter_parity_err_hold
12 ROX shifter_valid_err_hold
13 ROX timeout_err_hold
14 ROX f_skitter_err_hold
15 ROX pcb_err_hold_out
16:39 RO constant=0b000000000000000000000000
40:43 ROX count_state_lt
44:46 ROX run_state_lt
47 ROX shift_dts_lt
48 ROX shift_volt_lt
49:50 ROX read_state_lt
51:54 ROX write_state_lt
55 ROX sample_dts_lt
56 ROX measure_volt_lt
57 ROX read_cpm_lt
58 ROX write_cpm_lt
59 ROX unused
60:63 RO constant=0b0000

Skitter Force Read Register
Addr: 0000000003050014 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_FORCE_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_FORCEREG_LT_0_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0 RW F_SKITTER_READ: Forces the read of that particular skitter

Skitter Clock src control Register
Addr: 0000000003050016 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_CLKSRC_REG
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:2TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_CLKSRCREG_LT_0_INST.LATC.L2(0:2) [000]
36:37TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_CLKSRCREG_LT_36_INST.LATC.L2(36:37) [00]
Bit(s)SCOM Dial: Description
0:2 RW SKITTER0_CLKSRC: selects clock to measure:
000: local mesh clock
001: external pin skitter_c1_1_in
010: local d1clk only if d_mode = 1
011: external pin skitter_c1_2_in
100: local lclk only if d_mode = 1
101: external pin skitter_c1_3_in
110: unused
111: external pin skitter_c1_4_in
3:35 RO constant=0b000000000000000000000000000000000
36:37 RW SKITTER0_DELAY_SELECT: To select delay to be added
between clock source mux
and inverter chain(base line
delay is 12.2psec) of skitter0.
00 - No delay
01 - 0.6psec
10 - 1.8psec
11 - 5 psec

Skitter Data Register Read Bit0:63
Addr: 0000000003050019 (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_DATA0
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_DATA_LT_INST.LATC.L2(0:63) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX

Skitter Data Register Read Bit32:95
Addr: 000000000305001A (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_DATA1
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_DATA_LT_INST.LATC.L2(32:95) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX

Skitter Data Register Read Bit64:127
Addr: 000000000305001B (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_DATA2
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:63TP.TCN1.N1.EPS.THERM.WSUB.PWR.SKIT.SKITTER_DATA_LT_INST.LATC.L2(64:127) [0000000000000000000000000000000000000000000000000000000000000000]
Bit(s)SCOM Dial: Description
0:63 ROX

Timestamp Counter Read
Addr: 000000000305001C (SCOM)
Name:TP.TCN1.N1.EPS.THERM.WSUB.TIMESTAMP_COUNTER_READ
Constant(s):
Comments:
SelectedAttributes:
LatchesBitsLatch Name [flushval]
0:43TP.TCN1.N1.EPS.THERM.WSUB.PWR.PCB.TIMESTAMP_COUNT_REG_LT_INST.LATC.L2(0:43) [00000000000000000000000000000000000000000000]
44TP.TCN1.N1.EPS.THERM.WSUB.PWR.PCB.TIMESTAMP_OVERFLOW_ERR_LT_INST.LATC.L2(0) [0]
Bit(s)SCOM Dial: Description
0:43 ROX TIMESTAMP_COUNTER_VALUE: Time stamp counter value during DTS trace mode.
44 ROX TIMESTAMP_COUNTER_OVERFLOW_ERR: Over flow error bit of the time stamp counter value during DTS trace mode.

Address listing
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0000000003000000 TP.TCN1.N1.CPLT_CTRL0
0000000003000010 TP.TCN1.N1.CPLT_CTRL0
0000000003000020 TP.TCN1.N1.CPLT_CTRL0
0000000003000001 TP.TCN1.N1.CPLT_CTRL1
0000000003000011 TP.TCN1.N1.CPLT_CTRL1
0000000003000021 TP.TCN1.N1.CPLT_CTRL1
0000000003000002 TP.TCN1.N1.CPLT_CTRL2
0000000003000012 TP.TCN1.N1.CPLT_CTRL2
0000000003000022 TP.TCN1.N1.CPLT_CTRL2
0000000003000003 TP.TCN1.N1.CPLT_CTRL3
0000000003000013 TP.TCN1.N1.CPLT_CTRL3
0000000003000023 TP.TCN1.N1.CPLT_CTRL3
0000000003000004 TP.TCN1.N1.CPLT_CTRL4
0000000003000014 TP.TCN1.N1.CPLT_CTRL4
0000000003000024 TP.TCN1.N1.CPLT_CTRL4
0000000003000005 TP.TCN1.N1.CPLT_CTRL5
0000000003000015 TP.TCN1.N1.CPLT_CTRL5
0000000003000025 TP.TCN1.N1.CPLT_CTRL5
0000000003000008 TP.TCN1.N1.CPLT_CONF0
0000000003000018 TP.TCN1.N1.CPLT_CONF0
0000000003000028 TP.TCN1.N1.CPLT_CONF0
0000000003000009 TP.TCN1.N1.CPLT_CONF1
0000000003000019 TP.TCN1.N1.CPLT_CONF1
0000000003000029 TP.TCN1.N1.CPLT_CONF1
0000000003000100 TP.TCN1.N1.CPLT_STAT0
0000000003000101 TP.TCN1.N1.CPLT_MASK0
00000000030003FE TP.TCN1.N1.CTRL_PROTECT_MODE_REG
00000000030003FF TP.TCN1.N1.CTRL_ATOMIC_LOCK_REG
0000000003010000 TP.TCN1.N1.EPS.PSC.PSC.PSCOM_MODE_REG
0000000003010001 TP.TCN1.N1.EPS.PSC.PSC.PSCOM_STATUS_ERROR_REG
0000000003010002 TP.TCN1.N1.EPS.PSC.PSC.PSCOM_ERROR_MASK
0000000003010003 TP.TCN1.N1.EPS.PSC.PSC.ADDR_TRAP_REG
0000000003010005 TP.TCN1.N1.EPS.PSC.PSC.WRITE_PROTECT_ENABLE_REG
0000000003010006 TP.TCN1.N1.EPS.PSC.PSC.WRITE_PROTECT_RINGS_REG
0000000003010007 TP.TCN1.N1.EPS.PSC.PSC.ATOMIC_LOCK_MASK_LATCH_REG
0000000003010008 TP.TCN1.N1.EPS.PSC.PSC.RING_FENCE_MASK_LATCH_REG
0000000003010400 TP.TCN1.N1.TRA0.TR0.TRACE_HI_DATA_REG
0000000003010401 TP.TCN1.N1.TRA0.TR0.TRACE_LO_DATA_REG
0000000003010402 TP.TCN1.N1.TRA0.TR0.TRACE_TRCTRL_CONFIG
0000000003010403 TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_0
0000000003010404 TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_1
0000000003010405 TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_2
0000000003010406 TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_3
0000000003010407 TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_4
0000000003010408 TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_5
0000000003010409 TP.TCN1.N1.TRA0.TR0.TRACE_TRDATA_CONFIG_9
0000000003010440 TP.TCN1.N1.TRA0.TR1.TRACE_HI_DATA_REG
0000000003010441 TP.TCN1.N1.TRA0.TR1.TRACE_LO_DATA_REG
0000000003010442 TP.TCN1.N1.TRA0.TR1.TRACE_TRCTRL_CONFIG
0000000003010443 TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_0
0000000003010444 TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_1
0000000003010445 TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_2
0000000003010446 TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_3
0000000003010447 TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_4
0000000003010448 TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_5
0000000003010449 TP.TCN1.N1.TRA0.TR1.TRACE_TRDATA_CONFIG_9
0000000003010480 TP.TCN1.N1.TRA1.TR0.TRACE_HI_DATA_REG
0000000003010481 TP.TCN1.N1.TRA1.TR0.TRACE_LO_DATA_REG
0000000003010482 TP.TCN1.N1.TRA1.TR0.TRACE_TRCTRL_CONFIG
0000000003010483 TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_0
0000000003010484 TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_1
0000000003010485 TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_2
0000000003010486 TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_3
0000000003010487 TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_4
0000000003010488 TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_5
0000000003010489 TP.TCN1.N1.TRA1.TR0.TRACE_TRDATA_CONFIG_9
00000000030104C0 TP.TCN1.N1.TRA1.TR1.TRACE_HI_DATA_REG
00000000030104C1 TP.TCN1.N1.TRA1.TR1.TRACE_LO_DATA_REG
00000000030104C2 TP.TCN1.N1.TRA1.TR1.TRACE_TRCTRL_CONFIG
00000000030104C3 TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_0
00000000030104C4 TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_1
00000000030104C5 TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_2
00000000030104C6 TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_3
00000000030104C7 TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_4
00000000030104C8 TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_5
00000000030104C9 TP.TCN1.N1.TRA1.TR1.TRACE_TRDATA_CONFIG_9
0000000003010500 TP.TCN1.N1.TRA2.TR0.TRACE_HI_DATA_REG
0000000003010501 TP.TCN1.N1.TRA2.TR0.TRACE_LO_DATA_REG
0000000003010502 TP.TCN1.N1.TRA2.TR0.TRACE_TRCTRL_CONFIG
0000000003010503 TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_0
0000000003010504 TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_1
0000000003010505 TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_2
0000000003010506 TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_3
0000000003010507 TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_4
0000000003010508 TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_5
0000000003010509 TP.TCN1.N1.TRA2.TR0.TRACE_TRDATA_CONFIG_9
0000000003010540 TP.TCN1.N1.TRA2.TR1.TRACE_HI_DATA_REG
0000000003010541 TP.TCN1.N1.TRA2.TR1.TRACE_LO_DATA_REG
0000000003010542 TP.TCN1.N1.TRA2.TR1.TRACE_TRCTRL_CONFIG
0000000003010543 TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_0
0000000003010544 TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_1
0000000003010545 TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_2
0000000003010546 TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_3
0000000003010547 TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_4
0000000003010548 TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_5
0000000003010549 TP.TCN1.N1.TRA2.TR1.TRACE_TRDATA_CONFIG_9
0000000003010580 TP.TCN1.N1.TRA3.TR0.TRACE_HI_DATA_REG
0000000003010581 TP.TCN1.N1.TRA3.TR0.TRACE_LO_DATA_REG
0000000003010582 TP.TCN1.N1.TRA3.TR0.TRACE_TRCTRL_CONFIG
0000000003010583 TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_0
0000000003010584 TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_1
0000000003010585 TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_2
0000000003010586 TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_3
0000000003010587 TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_4
0000000003010588 TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_5
0000000003010589 TP.TCN1.N1.TRA3.TR0.TRACE_TRDATA_CONFIG_9
00000000030105C0 TP.TCN1.N1.TRA3.TR1.TRACE_HI_DATA_REG
00000000030105C1 TP.TCN1.N1.TRA3.TR1.TRACE_LO_DATA_REG
00000000030105C2 TP.TCN1.N1.TRA3.TR1.TRACE_TRCTRL_CONFIG
00000000030105C3 TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_0
00000000030105C4 TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_1
00000000030105C5 TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_2
00000000030105C6 TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_3
00000000030105C7 TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_4
00000000030105C8 TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_5
00000000030105C9 TP.TCN1.N1.TRA3.TR1.TRACE_TRDATA_CONFIG_9
0000000003010600 TP.TCN1.N1.TRA4.TR0.TRACE_HI_DATA_REG
0000000003010601 TP.TCN1.N1.TRA4.TR0.TRACE_LO_DATA_REG
0000000003010602 TP.TCN1.N1.TRA4.TR0.TRACE_TRCTRL_CONFIG
0000000003010603 TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_0
0000000003010604 TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_1
0000000003010605 TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_2
0000000003010606 TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_3
0000000003010607 TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_4
0000000003010608 TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_5
0000000003010609 TP.TCN1.N1.TRA4.TR0.TRACE_TRDATA_CONFIG_9
0000000003010640 TP.TCN1.N1.TRA4.TR1.TRACE_HI_DATA_REG
0000000003010641 TP.TCN1.N1.TRA4.TR1.TRACE_LO_DATA_REG
0000000003010642 TP.TCN1.N1.TRA4.TR1.TRACE_TRCTRL_CONFIG
0000000003010643 TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_0
0000000003010644 TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_1
0000000003010645 TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_2
0000000003010646 TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_3
0000000003010647 TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_4
0000000003010648 TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_5
0000000003010649 TP.TCN1.N1.TRA4.TR1.TRACE_TRDATA_CONFIG_9
0000000003010680 TP.TCN1.N1.TRA5.TR0.TRACE_HI_DATA_REG
0000000003010681 TP.TCN1.N1.TRA5.TR0.TRACE_LO_DATA_REG
0000000003010682 TP.TCN1.N1.TRA5.TR0.TRACE_TRCTRL_CONFIG
0000000003010683 TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_0
0000000003010684 TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_1
0000000003010685 TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_2
0000000003010686 TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_3
0000000003010687 TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_4
0000000003010688 TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_5
0000000003010689 TP.TCN1.N1.TRA5.TR0.TRACE_TRDATA_CONFIG_9
00000000030106C0 TP.TCN1.N1.TRA5.TR1.TRACE_HI_DATA_REG
00000000030106C1 TP.TCN1.N1.TRA5.TR1.TRACE_LO_DATA_REG
00000000030106C2 TP.TCN1.N1.TRA5.TR1.TRACE_TRCTRL_CONFIG
00000000030106C3 TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_0
00000000030106C4 TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_1
00000000030106C5 TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_2
00000000030106C6 TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_3
00000000030106C7 TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_4
00000000030106C8 TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_5
00000000030106C9 TP.TCN1.N1.TRA5.TR1.TRACE_TRDATA_CONFIG_9
0000000003010700 TP.TCN1.N1.TRA6.TR0.TRACE_HI_DATA_REG
0000000003010701 TP.TCN1.N1.TRA6.TR0.TRACE_LO_DATA_REG
0000000003010702 TP.TCN1.N1.TRA6.TR0.TRACE_TRCTRL_CONFIG
0000000003010703 TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_0
0000000003010704 TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_1
0000000003010705 TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_2
0000000003010706 TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_3
0000000003010707 TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_4
0000000003010708 TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_5
0000000003010709 TP.TCN1.N1.TRA6.TR0.TRACE_TRDATA_CONFIG_9
0000000003010740 TP.TCN1.N1.TRA6.TR1.TRACE_HI_DATA_REG
0000000003010741 TP.TCN1.N1.TRA6.TR1.TRACE_LO_DATA_REG
0000000003010742 TP.TCN1.N1.TRA6.TR1.TRACE_TRCTRL_CONFIG
0000000003010743 TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_0
0000000003010744 TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_1
0000000003010745 TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_2
0000000003010746 TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_3
0000000003010747 TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_4
0000000003010748 TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_5
0000000003010749 TP.TCN1.N1.TRA6.TR1.TRACE_TRDATA_CONFIG_9
0000000003010780 TP.TCN1.N1.TRA7.TR0.TRACE_HI_DATA_REG
0000000003010781 TP.TCN1.N1.TRA7.TR0.TRACE_LO_DATA_REG
0000000003010782 TP.TCN1.N1.TRA7.TR0.TRACE_TRCTRL_CONFIG
0000000003010783 TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_0
0000000003010784 TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_1
0000000003010785 TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_2
0000000003010786 TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_3
0000000003010787 TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_4
0000000003010788 TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_5
0000000003010789 TP.TCN1.N1.TRA7.TR0.TRACE_TRDATA_CONFIG_9
00000000030107C0 TP.TCN1.N1.EPS.DBG.DBG_MODE_REG
00000000030107C1 TP.TCN1.N1.EPS.DBG.DBG_INST1_COND_REG_1
00000000030107C2 TP.TCN1.N1.EPS.DBG.DBG_INST1_COND_REG_2
00000000030107C3 TP.TCN1.N1.EPS.DBG.DBG_INST1_COND_REG_3
00000000030107C4 TP.TCN1.N1.EPS.DBG.DBG_INST2_COND_REG_1
00000000030107C5 TP.TCN1.N1.EPS.DBG.DBG_INST2_COND_REG_2
00000000030107C6 TP.TCN1.N1.EPS.DBG.DBG_INST2_COND_REG_3
00000000030107CD TP.TCN1.N1.EPS.DBG.DBG_TRACE_REG_0
00000000030107CE TP.TCN1.N1.EPS.DBG.DBG_TRACE_REG_1
00000000030107CF TP.TCN1.N1.EPS.DBG.DBG_TRACE_MODE_REG_2
00000000030107D0 TP.TCN1.N1.EPS.DBG.DEBUG_TRACE_CONTROL
00000000030107D1 TP.TCN1.N1.EPS.DBG.XTRA_TRACE_MODE
0000000003010800 MCD.MCC_FIR_REG
0000000003010801 MCD.MCC_FIR_REG
0000000003010802 MCD.MCC_FIR_REG
0000000003010803 MCD.MCD_FIR_MASK_REG
0000000003010804 MCD.MCD_FIR_MASK_REG
0000000003010805 MCD.MCD_FIR_MASK_REG
0000000003010806 MCD.MCD_FIR_ACTION0_REG
0000000003010807 MCD.MCD_FIR_ACTION1_REG
0000000003010808 MCD.MCD_FIR_WOF_REG
000000000301080A MCD.BANK0_MCD_TOP
000000000301080B MCD.BANK0_MCD_STR
000000000301080C MCD.BANK0_MCD_BOT
000000000301080D MCD.BANK0_MCD_CHA
000000000301080E MCD.BANK0_MCD_CMD
000000000301080F MCD.BANK0_MCD_RW
0000000003010810 MCD.BANK0_MCD_REC
0000000003010811 MCD.BANK0_MCD_VGC
0000000003010812 MCD.MCD_ECAP
0000000003010813 MCD.MCD_DBG
0000000003010814 MCD.BANK0_MCD_MUON
0000000003010815 MCD.BANK0_MCD_TAU
0000000003010816 MCD.BANK0_MCD_GLUON
0000000003010817 MCD.BANK0_MCD_BOSON
0000000003010818 MCD.BANK0_MCD_TOPID
0000000003010819 MCD.MCD_ECAP2
0000000003010C00 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_REG
0000000003010C01 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_REG
0000000003010C02 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_REG
0000000003010C03 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_MASK_REG
0000000003010C04 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_MASK_REG
0000000003010C05 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_MASK_REG
0000000003010C06 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_ACTION0_REG
0000000003010C07 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_ACTION1_REG
0000000003010C08 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_WOF_REG
0000000003010C10 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PB_DEBUG_REG
0000000003010C11 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PB_ECC_REG
0000000003010C15 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MMCQ_PB_MODE_REG
0000000003010C16 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MMCQ_LCO_CONFIG_REG
0000000003010C1D MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.MM_EPSILON_COUNTER_VALUE
0000000003010C22 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PB_ERR_RPT_0
0000000003010C24 MM1.MM_FBC.CQ_WRAP.NX_DEBUG_SNAPSHOT_0
0000000003010C25 MM1.MM_FBC.CQ_WRAP.NX_DEBUG_SNAPSHOT_1
0000000003010C26 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PMU_CONTROL_REG
0000000003010C27 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_PMU_COUNTER_REG
0000000003010C28 MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.NX_MISC_CONTROL_REG
0000000003010C2C MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL0_REG
0000000003010C2D MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL1_REG
0000000003010C2E MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL2_REG
0000000003010C2F MM1.MM_FBC.CQ_WRAP.NXCQ_SCOM.TOP_ID_XLAT_TBL3_REG
0000000003010C40 MM1.MM_FIR1_REG
0000000003010C41 MM1.MM_FIR1_REG
0000000003010C42 MM1.MM_FIR1_REG
0000000003010C43 MM1.MM_FIR1_MASK_REG
0000000003010C44 MM1.MM_FIR1_MASK_REG
0000000003010C45 MM1.MM_FIR1_MASK_REG
0000000003010C46 MM1.MM_FIR1_ACTION0_REG
0000000003010C47 MM1.MM_FIR1_ACTION1_REG
0000000003010C48 MM1.MM_FIR1_WOF_REG
0000000003010C4A MM1.MM_CFG_NMMU_XLAT_CTL_REG0
0000000003010C4B MM1.MM_CFG_NMMU_XLAT_CTL_REG1
0000000003010C4C MM1.MM_CFG_NMMU_XLAT_CTL_REG2
0000000003010C4D MM1.MM_NMMU_PMU0_CTL_REG
0000000003010C4E MM1.MM_NMMU_PMU1_CTL_REG
0000000003010C4F MM1.MM_NMMU_PMU0_CNT_REG
0000000003010C50 MM1.MM_NMMU_PMU1_CNT_REG
0000000003010C51 MM1.MM_NMMU_FLT_STAT_REG
0000000003010C52 MM1.MM_CFG_NMMU_CTL_SM
0000000003010C53 MM1.MM_CFG_NMMU_CTL_MISC
0000000003010C54 MM1.MM_CFG_NMMU_CTL_SLB
0000000003010C55 MM1.MM_CFG_NMMU_CTL_TLB
0000000003010C57 MM1.MM_NMMU_ERR_LOG
0000000003010C58 MM1.MM_NMMU_ERR_INJ
0000000003010C59 MM1.MM_NMMU_DBG_MODE
0000000003011000 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_REG
0000000003011001 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_REG
0000000003011002 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_REG
0000000003011003 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_MASK_REG
0000000003011004 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_MASK_REG
0000000003011005 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_MASK_REG
0000000003011006 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_ACTION0_REG
0000000003011007 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_FIR_ACTION1_REG
000000000301100A PB.PB_COM.PB_SCOM_EQ0.PB_STATION_MODE
000000000301100B PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE1_NEXT
000000000301100C PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE1_CURR
000000000301100D PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE2_NEXT
000000000301100E PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE2_CURR
000000000301100F PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE3_NEXT
0000000003011010 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE3_CURR
0000000003011011 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE4_NEXT
0000000003011012 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_HP_MODE4_CURR
0000000003011013 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_CFG1
0000000003011014 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_CFG2
0000000003011015 PB.PB_COM.PB_SCOM_EQ0.PB_STATION_CFG3
000000000301101A PB.PB_COM.PB_SCOM_EQ0.PB_STATION_EVENT_SEL
000000000301101B PB.PB_COM.PB_SCOM_EQ0.PB_STATION_EVENT_COMPA
000000000301101C PB.PB_COM.PB_SCOM_EQ0.PB_STATION_EVENT_COMPB
000000000301101D PB.PB_COM.PB_SCOM_EQ0.PB_STATION_EVENT_COMPX
000000000301101E PB.PB_COM.PB_SCOM_EQ0.PB_STATION_PM_CONTROL
000000000301101F PB.PB_COM.PB_SCOM_EQ0.PB_STATION_TRACE
000000000301102A PB.PB_COM.PB_SCOM_EQ0.PB_STATION_GP_CMD_RATE
000000000301102B PB.PB_COM.PB_SCOM_EQ0.PB_STATION_SP_CMD_RATE
000000000301102C PB.PB_COM.PB_SCOM_EQ0.PB_STATION_CR_ERROR
0000000003011040 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_REG
0000000003011041 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_REG
0000000003011042 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_REG
0000000003011043 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_MASK_REG
0000000003011044 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_MASK_REG
0000000003011045 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_MASK_REG
0000000003011046 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_ACTION0_REG
0000000003011047 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_FIR_ACTION1_REG
000000000301104A PB.PB_COM.PB_SCOM_EQ1.PB_STATION_MODE
000000000301104B PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE1_NEXT
000000000301104C PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE1_CURR
000000000301104D PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE2_NEXT
000000000301104E PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE2_CURR
000000000301104F PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE3_NEXT
0000000003011050 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE3_CURR
0000000003011051 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE4_NEXT
0000000003011052 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_HP_MODE4_CURR
0000000003011053 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_CFG1
0000000003011054 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_CFG2
0000000003011055 PB.PB_COM.PB_SCOM_EQ1.PB_STATION_CFG3
000000000301105A PB.PB_COM.PB_SCOM_EQ1.PB_STATION_EVENT_SEL
000000000301105B PB.PB_COM.PB_SCOM_EQ1.PB_STATION_EVENT_COMPA
000000000301105C PB.PB_COM.PB_SCOM_EQ1.PB_STATION_EVENT_COMPB
000000000301105D PB.PB_COM.PB_SCOM_EQ1.PB_STATION_EVENT_COMPX
000000000301105E PB.PB_COM.PB_SCOM_EQ1.PB_STATION_PM_CONTROL
000000000301105F PB.PB_COM.PB_SCOM_EQ1.PB_STATION_TRACE
000000000301106A PB.PB_COM.PB_SCOM_EQ1.PB_STATION_GP_CMD_RATE
000000000301106B PB.PB_COM.PB_SCOM_EQ1.PB_STATION_SP_CMD_RATE
000000000301106C PB.PB_COM.PB_SCOM_EQ1.PB_STATION_CR_ERROR
0000000003011080 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_REG
0000000003011081 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_REG
0000000003011082 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_REG
0000000003011083 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_MASK_REG
0000000003011084 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_MASK_REG
0000000003011085 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_MASK_REG
0000000003011086 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_ACTION0_REG
0000000003011087 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_FIR_ACTION1_REG
000000000301108A PB.PB_COM.PB_SCOM_EQ2.PB_STATION_MODE
000000000301108B PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE1_NEXT
000000000301108C PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE1_CURR
000000000301108D PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE2_NEXT
000000000301108E PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE2_CURR
000000000301108F PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE3_NEXT
0000000003011090 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE3_CURR
0000000003011091 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE4_NEXT
0000000003011092 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_HP_MODE4_CURR
0000000003011093 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_CFG1
0000000003011094 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_CFG2
0000000003011095 PB.PB_COM.PB_SCOM_EQ2.PB_STATION_CFG3
000000000301109A PB.PB_COM.PB_SCOM_EQ2.PB_STATION_EVENT_SEL
000000000301109B PB.PB_COM.PB_SCOM_EQ2.PB_STATION_EVENT_COMPA
000000000301109C PB.PB_COM.PB_SCOM_EQ2.PB_STATION_EVENT_COMPB
000000000301109D PB.PB_COM.PB_SCOM_EQ2.PB_STATION_EVENT_COMPX
000000000301109E PB.PB_COM.PB_SCOM_EQ2.PB_STATION_PM_CONTROL
000000000301109F PB.PB_COM.PB_SCOM_EQ2.PB_STATION_TRACE
00000000030110AA PB.PB_COM.PB_SCOM_EQ2.PB_STATION_GP_CMD_RATE
00000000030110AB PB.PB_COM.PB_SCOM_EQ2.PB_STATION_SP_CMD_RATE
00000000030110AC PB.PB_COM.PB_SCOM_EQ2.PB_STATION_CR_ERROR
00000000030110C0 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_REG
00000000030110C1 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_REG
00000000030110C2 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_REG
00000000030110C3 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_MASK_REG
00000000030110C4 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_MASK_REG
00000000030110C5 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_MASK_REG
00000000030110C6 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_ACTION0_REG
00000000030110C7 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_FIR_ACTION1_REG
00000000030110CA PB.PB_COM.PB_SCOM_EQ3.PB_STATION_MODE
00000000030110CB PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE1_NEXT
00000000030110CC PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE1_CURR
00000000030110CD PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE2_NEXT
00000000030110CE PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE2_CURR
00000000030110CF PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE3_NEXT
00000000030110D0 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE3_CURR
00000000030110D1 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE4_NEXT
00000000030110D2 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_HP_MODE4_CURR
00000000030110D3 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_CFG1
00000000030110D4 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_CFG2
00000000030110D5 PB.PB_COM.PB_SCOM_EQ3.PB_STATION_CFG3
00000000030110DA PB.PB_COM.PB_SCOM_EQ3.PB_STATION_EVENT_SEL
00000000030110DB PB.PB_COM.PB_SCOM_EQ3.PB_STATION_EVENT_COMPA
00000000030110DC PB.PB_COM.PB_SCOM_EQ3.PB_STATION_EVENT_COMPB
00000000030110DD PB.PB_COM.PB_SCOM_EQ3.PB_STATION_EVENT_COMPX
00000000030110DE PB.PB_COM.PB_SCOM_EQ3.PB_STATION_PM_CONTROL
00000000030110DF PB.PB_COM.PB_SCOM_EQ3.PB_STATION_TRACE
00000000030110EA PB.PB_COM.PB_SCOM_EQ3.PB_STATION_GP_CMD_RATE
00000000030110EB PB.PB_COM.PB_SCOM_EQ3.PB_STATION_SP_CMD_RATE
00000000030110EC PB.PB_COM.PB_SCOM_EQ3.PB_STATION_CR_ERROR
0000000003011100 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_REG
0000000003011101 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_REG
0000000003011102 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_REG
0000000003011103 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_MASK_REG
0000000003011104 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_MASK_REG
0000000003011105 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_MASK_REG
0000000003011106 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_ACTION0_REG
0000000003011107 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_FIR_ACTION1_REG
000000000301110A PB.PB_COM.PB_SCOM_EQ4.PB_STATION_MODE
000000000301110B PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE1_NEXT
000000000301110C PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE1_CURR
000000000301110D PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE2_NEXT
000000000301110E PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE2_CURR
000000000301110F PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE3_NEXT
0000000003011110 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE3_CURR
0000000003011111 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE4_NEXT
0000000003011112 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_HP_MODE4_CURR
0000000003011113 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_CFG1
0000000003011114 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_CFG2
0000000003011115 PB.PB_COM.PB_SCOM_EQ4.PB_STATION_CFG3
000000000301111A PB.PB_COM.PB_SCOM_EQ4.PB_STATION_EVENT_SEL
000000000301111B PB.PB_COM.PB_SCOM_EQ4.PB_STATION_EVENT_COMPA
000000000301111C PB.PB_COM.PB_SCOM_EQ4.PB_STATION_EVENT_COMPB
000000000301111D PB.PB_COM.PB_SCOM_EQ4.PB_STATION_EVENT_COMPX
000000000301111E PB.PB_COM.PB_SCOM_EQ4.PB_STATION_PM_CONTROL
000000000301111F PB.PB_COM.PB_SCOM_EQ4.PB_STATION_TRACE
000000000301112A PB.PB_COM.PB_SCOM_EQ4.PB_STATION_GP_CMD_RATE
000000000301112B PB.PB_COM.PB_SCOM_EQ4.PB_STATION_SP_CMD_RATE
000000000301112C PB.PB_COM.PB_SCOM_EQ4.PB_STATION_CR_ERROR
0000000003011140 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_REG
0000000003011141 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_REG
0000000003011142 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_REG
0000000003011143 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_MASK_REG
0000000003011144 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_MASK_REG
0000000003011145 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_MASK_REG
0000000003011146 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_ACTION0_REG
0000000003011147 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_FIR_ACTION1_REG
000000000301114A PB.PB_COM.PB_SCOM_EQ5.PB_STATION_MODE
000000000301114B PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE1_NEXT
000000000301114C PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE1_CURR
000000000301114D PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE2_NEXT
000000000301114E PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE2_CURR
000000000301114F PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE3_NEXT
0000000003011150 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE3_CURR
0000000003011151 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE4_NEXT
0000000003011152 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_HP_MODE4_CURR
0000000003011153 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_CFG1
0000000003011154 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_CFG2
0000000003011155 PB.PB_COM.PB_SCOM_EQ5.PB_STATION_CFG3
000000000301115A PB.PB_COM.PB_SCOM_EQ5.PB_STATION_EVENT_SEL
000000000301115B PB.PB_COM.PB_SCOM_EQ5.PB_STATION_EVENT_COMPA
000000000301115C PB.PB_COM.PB_SCOM_EQ5.PB_STATION_EVENT_COMPB
000000000301115D PB.PB_COM.PB_SCOM_EQ5.PB_STATION_EVENT_COMPX
000000000301115E PB.PB_COM.PB_SCOM_EQ5.PB_STATION_PM_CONTROL
000000000301115F PB.PB_COM.PB_SCOM_EQ5.PB_STATION_TRACE
000000000301116A PB.PB_COM.PB_SCOM_EQ5.PB_STATION_GP_CMD_RATE
000000000301116B PB.PB_COM.PB_SCOM_EQ5.PB_STATION_SP_CMD_RATE
000000000301116C PB.PB_COM.PB_SCOM_EQ5.PB_STATION_CR_ERROR
0000000003011180 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_REG
0000000003011181 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_REG
0000000003011182 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_REG
0000000003011183 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_MASK_REG
0000000003011184 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_MASK_REG
0000000003011185 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_MASK_REG
0000000003011186 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_ACTION0_REG
0000000003011187 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_FIR_ACTION1_REG
000000000301118A PB.PB_COM.PB_SCOM_EQ6.PB_STATION_MODE
000000000301118B PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE1_NEXT
000000000301118C PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE1_CURR
000000000301118D PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE2_NEXT
000000000301118E PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE2_CURR
000000000301118F PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE3_NEXT
0000000003011190 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE3_CURR
0000000003011191 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE4_NEXT
0000000003011192 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_HP_MODE4_CURR
0000000003011193 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_CFG1
0000000003011194 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_CFG2
0000000003011195 PB.PB_COM.PB_SCOM_EQ6.PB_STATION_CFG3
000000000301119A PB.PB_COM.PB_SCOM_EQ6.PB_STATION_EVENT_SEL
000000000301119B PB.PB_COM.PB_SCOM_EQ6.PB_STATION_EVENT_COMPA
000000000301119C PB.PB_COM.PB_SCOM_EQ6.PB_STATION_EVENT_COMPB
000000000301119D PB.PB_COM.PB_SCOM_EQ6.PB_STATION_EVENT_COMPX
000000000301119E PB.PB_COM.PB_SCOM_EQ6.PB_STATION_PM_CONTROL
000000000301119F PB.PB_COM.PB_SCOM_EQ6.PB_STATION_TRACE
00000000030111AA PB.PB_COM.PB_SCOM_EQ6.PB_STATION_GP_CMD_RATE
00000000030111AB PB.PB_COM.PB_SCOM_EQ6.PB_STATION_SP_CMD_RATE
00000000030111AC PB.PB_COM.PB_SCOM_EQ6.PB_STATION_CR_ERROR
00000000030111C0 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_REG
00000000030111C1 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_REG
00000000030111C2 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_REG
00000000030111C3 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_MASK_REG
00000000030111C4 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_MASK_REG
00000000030111C5 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_MASK_REG
00000000030111C6 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_ACTION0_REG
00000000030111C7 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_FIR_ACTION1_REG
00000000030111CA PB.PB_COM.PB_SCOM_EQ7.PB_STATION_MODE
00000000030111CB PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE1_NEXT
00000000030111CC PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE1_CURR
00000000030111CD PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE2_NEXT
00000000030111CE PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE2_CURR
00000000030111CF PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE3_NEXT
00000000030111D0 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE3_CURR
00000000030111D1 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE4_NEXT
00000000030111D2 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_HP_MODE4_CURR
00000000030111D3 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_CFG1
00000000030111D4 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_CFG2
00000000030111D5 PB.PB_COM.PB_SCOM_EQ7.PB_STATION_CFG3
00000000030111DA PB.PB_COM.PB_SCOM_EQ7.PB_STATION_EVENT_SEL
00000000030111DB PB.PB_COM.PB_SCOM_EQ7.PB_STATION_EVENT_COMPA
00000000030111DC PB.PB_COM.PB_SCOM_EQ7.PB_STATION_EVENT_COMPB
00000000030111DD PB.PB_COM.PB_SCOM_EQ7.PB_STATION_EVENT_COMPX
00000000030111DE PB.PB_COM.PB_SCOM_EQ7.PB_STATION_PM_CONTROL
00000000030111DF PB.PB_COM.PB_SCOM_EQ7.PB_STATION_TRACE
00000000030111EA PB.PB_COM.PB_SCOM_EQ7.PB_STATION_GP_CMD_RATE
00000000030111EB PB.PB_COM.PB_SCOM_EQ7.PB_STATION_SP_CMD_RATE
00000000030111EC PB.PB_COM.PB_SCOM_EQ7.PB_STATION_CR_ERROR
0000000003011200 PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_REG
0000000003011201 PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_REG
0000000003011202 PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_REG
0000000003011203 PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_MASK_REG
0000000003011204 PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_MASK_REG
0000000003011205 PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_MASK_REG
0000000003011206 PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_ACTION0_REG
0000000003011207 PB.PB_COM.PB_SCOM_EN1.PB_STATION_FIR_ACTION1_REG
000000000301120A PB.PB_COM.PB_SCOM_EN1.PB_STATION_MODE
000000000301120B PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE1_NEXT
000000000301120C PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE1_CURR
000000000301120D PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE2_NEXT
000000000301120E PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE2_CURR
000000000301120F PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE3_NEXT
0000000003011210 PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE3_CURR
0000000003011211 PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE4_NEXT
0000000003011212 PB.PB_COM.PB_SCOM_EN1.PB_STATION_HP_MODE4_CURR
0000000003011213 PB.PB_COM.PB_SCOM_EN1.PB_STATION_CFG1
0000000003011214 PB.PB_COM.PB_SCOM_EN1.PB_STATION_CFG2
0000000003011215 PB.PB_COM.PB_SCOM_EN1.PB_STATION_CFG3
000000000301121A PB.PB_COM.PB_SCOM_EN1.PB_STATION_EVENT_SEL
000000000301121B PB.PB_COM.PB_SCOM_EN1.PB_STATION_EVENT_COMPA
000000000301121C PB.PB_COM.PB_SCOM_EN1.PB_STATION_EVENT_COMPB
000000000301121D PB.PB_COM.PB_SCOM_EN1.PB_STATION_EVENT_COMPX
000000000301121E PB.PB_COM.PB_SCOM_EN1.PB_STATION_PM_CONTROL
000000000301121F PB.PB_COM.PB_SCOM_EN1.PB_STATION_TRACE
000000000301122A PB.PB_COM.PB_SCOM_EN1.PB_STATION_GP_CMD_RATE
000000000301122B PB.PB_COM.PB_SCOM_EN1.PB_STATION_SP_CMD_RATE
000000000301122C PB.PB_COM.PB_SCOM_EN1.PB_STATION_CR_ERROR
0000000003011240 PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_REG
0000000003011241 PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_REG
0000000003011242 PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_REG
0000000003011243 PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_MASK_REG
0000000003011244 PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_MASK_REG
0000000003011245 PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_MASK_REG
0000000003011246 PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_ACTION0_REG
0000000003011247 PB.PB_COM.PB_SCOM_EN2.PB_STATION_FIR_ACTION1_REG
000000000301124A PB.PB_COM.PB_SCOM_EN2.PB_STATION_MODE
000000000301124B PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE1_NEXT
000000000301124C PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE1_CURR
000000000301124D PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE2_NEXT
000000000301124E PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE2_CURR
000000000301124F PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE3_NEXT
0000000003011250 PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE3_CURR
0000000003011251 PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE4_NEXT
0000000003011252 PB.PB_COM.PB_SCOM_EN2.PB_STATION_HP_MODE4_CURR
0000000003011253 PB.PB_COM.PB_SCOM_EN2.PB_STATION_CFG1
0000000003011254 PB.PB_COM.PB_SCOM_EN2.PB_STATION_CFG2
0000000003011255 PB.PB_COM.PB_SCOM_EN2.PB_STATION_CFG3
000000000301125A PB.PB_COM.PB_SCOM_EN2.PB_STATION_EVENT_SEL
000000000301125B PB.PB_COM.PB_SCOM_EN2.PB_STATION_EVENT_COMPA
000000000301125C PB.PB_COM.PB_SCOM_EN2.PB_STATION_EVENT_COMPB
000000000301125D PB.PB_COM.PB_SCOM_EN2.PB_STATION_EVENT_COMPX
000000000301125E PB.PB_COM.PB_SCOM_EN2.PB_STATION_PM_CONTROL
000000000301125F PB.PB_COM.PB_SCOM_EN2.PB_STATION_TRACE
000000000301126A PB.PB_COM.PB_SCOM_EN2.PB_STATION_GP_CMD_RATE
000000000301126B PB.PB_COM.PB_SCOM_EN2.PB_STATION_SP_CMD_RATE
000000000301126C PB.PB_COM.PB_SCOM_EN2.PB_STATION_CR_ERROR
0000000003011280 PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_REG
0000000003011281 PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_REG
0000000003011282 PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_REG
0000000003011283 PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_MASK_REG
0000000003011284 PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_MASK_REG
0000000003011285 PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_MASK_REG
0000000003011286 PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_ACTION0_REG
0000000003011287 PB.PB_COM.PB_SCOM_EN3.PB_STATION_FIR_ACTION1_REG
000000000301128A PB.PB_COM.PB_SCOM_EN3.PB_STATION_MODE
000000000301128B PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE1_NEXT
000000000301128C PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE1_CURR
000000000301128D PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE2_NEXT
000000000301128E PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE2_CURR
000000000301128F PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE3_NEXT
0000000003011290 PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE3_CURR
0000000003011291 PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE4_NEXT
0000000003011292 PB.PB_COM.PB_SCOM_EN3.PB_STATION_HP_MODE4_CURR
0000000003011293 PB.PB_COM.PB_SCOM_EN3.PB_STATION_CFG1
0000000003011294 PB.PB_COM.PB_SCOM_EN3.PB_STATION_CFG2
0000000003011295 PB.PB_COM.PB_SCOM_EN3.PB_STATION_CFG3
000000000301129A PB.PB_COM.PB_SCOM_EN3.PB_STATION_EVENT_SEL
000000000301129B PB.PB_COM.PB_SCOM_EN3.PB_STATION_EVENT_COMPA
000000000301129C PB.PB_COM.PB_SCOM_EN3.PB_STATION_EVENT_COMPB
000000000301129D PB.PB_COM.PB_SCOM_EN3.PB_STATION_EVENT_COMPX
000000000301129E PB.PB_COM.PB_SCOM_EN3.PB_STATION_PM_CONTROL
000000000301129F PB.PB_COM.PB_SCOM_EN3.PB_STATION_TRACE
00000000030112AA PB.PB_COM.PB_SCOM_EN3.PB_STATION_GP_CMD_RATE
00000000030112AB PB.PB_COM.PB_SCOM_EN3.PB_STATION_SP_CMD_RATE
00000000030112AC PB.PB_COM.PB_SCOM_EN3.PB_STATION_CR_ERROR
00000000030112C0 PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_REG
00000000030112C1 PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_REG
00000000030112C2 PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_REG
00000000030112C3 PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_MASK_REG
00000000030112C4 PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_MASK_REG
00000000030112C5 PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_MASK_REG
00000000030112C6 PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_ACTION0_REG
00000000030112C7 PB.PB_COM.PB_SCOM_EN4.PB_STATION_FIR_ACTION1_REG
00000000030112CA PB.PB_COM.PB_SCOM_EN4.PB_STATION_MODE
00000000030112CB PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE1_NEXT
00000000030112CC PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE1_CURR
00000000030112CD PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE2_NEXT
00000000030112CE PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE2_CURR
00000000030112CF PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE3_NEXT
00000000030112D0 PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE3_CURR
00000000030112D1 PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE4_NEXT
00000000030112D2 PB.PB_COM.PB_SCOM_EN4.PB_STATION_HP_MODE4_CURR
00000000030112D3 PB.PB_COM.PB_SCOM_EN4.PB_STATION_CFG1
00000000030112D4 PB.PB_COM.PB_SCOM_EN4.PB_STATION_CFG2
00000000030112D5 PB.PB_COM.PB_SCOM_EN4.PB_STATION_CFG3
00000000030112DA PB.PB_COM.PB_SCOM_EN4.PB_STATION_EVENT_SEL
00000000030112DB PB.PB_COM.PB_SCOM_EN4.PB_STATION_EVENT_COMPA
00000000030112DC PB.PB_COM.PB_SCOM_EN4.PB_STATION_EVENT_COMPB
00000000030112DD PB.PB_COM.PB_SCOM_EN4.PB_STATION_EVENT_COMPX
00000000030112DE PB.PB_COM.PB_SCOM_EN4.PB_STATION_PM_CONTROL
00000000030112DF PB.PB_COM.PB_SCOM_EN4.PB_STATION_TRACE
00000000030112EA PB.PB_COM.PB_SCOM_EN4.PB_STATION_GP_CMD_RATE
00000000030112EB PB.PB_COM.PB_SCOM_EN4.PB_STATION_SP_CMD_RATE
00000000030112EC PB.PB_COM.PB_SCOM_EN4.PB_STATION_CR_ERROR
0000000003011300 PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_REG
0000000003011301 PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_REG
0000000003011302 PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_REG
0000000003011303 PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_MASK_REG
0000000003011304 PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_MASK_REG
0000000003011305 PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_MASK_REG
0000000003011306 PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_ACTION0_REG
0000000003011307 PB.PB_COM.PB_SCOM_ES1.PB_STATION_FIR_ACTION1_REG
000000000301130A PB.PB_COM.PB_SCOM_ES1.PB_STATION_MODE
000000000301130B PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE1_NEXT
000000000301130C PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE1_CURR
000000000301130D PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE2_NEXT
000000000301130E PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE2_CURR
000000000301130F PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE3_NEXT
0000000003011310 PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE3_CURR
0000000003011311 PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE4_NEXT
0000000003011312 PB.PB_COM.PB_SCOM_ES1.PB_STATION_HP_MODE4_CURR
0000000003011313 PB.PB_COM.PB_SCOM_ES1.PB_STATION_CFG1
0000000003011314 PB.PB_COM.PB_SCOM_ES1.PB_STATION_CFG2
0000000003011315 PB.PB_COM.PB_SCOM_ES1.PB_STATION_CFG3
000000000301131A PB.PB_COM.PB_SCOM_ES1.PB_STATION_EVENT_SEL
000000000301131B PB.PB_COM.PB_SCOM_ES1.PB_STATION_EVENT_COMPA
000000000301131C PB.PB_COM.PB_SCOM_ES1.PB_STATION_EVENT_COMPB
000000000301131D PB.PB_COM.PB_SCOM_ES1.PB_STATION_EVENT_COMPX
000000000301131E PB.PB_COM.PB_SCOM_ES1.PB_STATION_PM_CONTROL
000000000301131F PB.PB_COM.PB_SCOM_ES1.PB_STATION_TRACE
000000000301132A PB.PB_COM.PB_SCOM_ES1.PB_STATION_GP_CMD_RATE
000000000301132B PB.PB_COM.PB_SCOM_ES1.PB_STATION_SP_CMD_RATE
000000000301132C PB.PB_COM.PB_SCOM_ES1.PB_STATION_CR_ERROR
0000000003011340 PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_REG
0000000003011341 PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_REG
0000000003011342 PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_REG
0000000003011343 PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_MASK_REG
0000000003011344 PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_MASK_REG
0000000003011345 PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_MASK_REG
0000000003011346 PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_ACTION0_REG
0000000003011347 PB.PB_COM.PB_SCOM_ES2.PB_STATION_FIR_ACTION1_REG
000000000301134A PB.PB_COM.PB_SCOM_ES2.PB_STATION_MODE
000000000301134B PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE1_NEXT
000000000301134C PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE1_CURR
000000000301134D PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE2_NEXT
000000000301134E PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE2_CURR
000000000301134F PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE3_NEXT
0000000003011350 PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE3_CURR
0000000003011351 PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE4_NEXT
0000000003011352 PB.PB_COM.PB_SCOM_ES2.PB_STATION_HP_MODE4_CURR
0000000003011353 PB.PB_COM.PB_SCOM_ES2.PB_STATION_CFG1
0000000003011354 PB.PB_COM.PB_SCOM_ES2.PB_STATION_CFG2
0000000003011355 PB.PB_COM.PB_SCOM_ES2.PB_STATION_CFG3
000000000301135A PB.PB_COM.PB_SCOM_ES2.PB_STATION_EVENT_SEL
000000000301135B PB.PB_COM.PB_SCOM_ES2.PB_STATION_EVENT_COMPA
000000000301135C PB.PB_COM.PB_SCOM_ES2.PB_STATION_EVENT_COMPB
000000000301135D PB.PB_COM.PB_SCOM_ES2.PB_STATION_EVENT_COMPX
000000000301135E PB.PB_COM.PB_SCOM_ES2.PB_STATION_PM_CONTROL
000000000301135F PB.PB_COM.PB_SCOM_ES2.PB_STATION_TRACE
000000000301136A PB.PB_COM.PB_SCOM_ES2.PB_STATION_GP_CMD_RATE
000000000301136B PB.PB_COM.PB_SCOM_ES2.PB_STATION_SP_CMD_RATE
000000000301136C PB.PB_COM.PB_SCOM_ES2.PB_STATION_CR_ERROR
0000000003011380 PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_REG
0000000003011381 PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_REG
0000000003011382 PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_REG
0000000003011383 PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_MASK_REG
0000000003011384 PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_MASK_REG
0000000003011385 PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_MASK_REG
0000000003011386 PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_ACTION0_REG
0000000003011387 PB.PB_COM.PB_SCOM_ES3.PB_STATION_FIR_ACTION1_REG
000000000301138A PB.PB_COM.PB_SCOM_ES3.PB_STATION_MODE
000000000301138B PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE1_NEXT
000000000301138C PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE1_CURR
000000000301138D PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE2_NEXT
000000000301138E PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE2_CURR
000000000301138F PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE3_NEXT
0000000003011390 PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE3_CURR
0000000003011391 PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE4_NEXT
0000000003011392 PB.PB_COM.PB_SCOM_ES3.PB_STATION_HP_MODE4_CURR
0000000003011393 PB.PB_COM.PB_SCOM_ES3.PB_STATION_CFG1
0000000003011394 PB.PB_COM.PB_SCOM_ES3.PB_STATION_CFG2
0000000003011395 PB.PB_COM.PB_SCOM_ES3.PB_STATION_CFG3
0000000003011396 PB.PB_COM.PB_SCOM_ES3.PB_STATION_SNOOPER_CFG1
0000000003011397 PB.PB_COM.PB_SCOM_ES3.PB_STATION_SNOOPER_CFG2
0000000003011398 PB.PB_COM.PB_SCOM_ES3.PB_STATION_SNOOPER_CFG3
0000000003011399 PB.PB_COM.PB_SCOM_ES3.PB_STATION_SNOOPER_CFG4
000000000301139A PB.PB_COM.PB_SCOM_ES3.PB_STATION_EVENT_SEL
000000000301139B PB.PB_COM.PB_SCOM_ES3.PB_STATION_EVENT_COMPA
000000000301139C PB.PB_COM.PB_SCOM_ES3.PB_STATION_EVENT_COMPB
000000000301139D PB.PB_COM.PB_SCOM_ES3.PB_STATION_EVENT_COMPX
000000000301139E PB.PB_COM.PB_SCOM_ES3.PB_STATION_PM_CONTROL
000000000301139F PB.PB_COM.PB_SCOM_ES3.PB_STATION_TRACE
00000000030113AA PB.PB_COM.PB_SCOM_ES3.PB_STATION_GP_CMD_RATE
00000000030113AB PB.PB_COM.PB_SCOM_ES3.PB_STATION_SP_CMD_RATE
00000000030113AC PB.PB_COM.PB_SCOM_ES3.PB_STATION_CR_ERROR
00000000030113AE PB.PB_COM.PB_SCOM_ES3.EXTFIR_REG
00000000030113AF PB.PB_COM.PB_SCOM_ES3.EXTFIR_REG
00000000030113B0 PB.PB_COM.PB_SCOM_ES3.EXTFIR_REG
00000000030113B1 PB.PB_COM.PB_SCOM_ES3.EXTFIR_MASK_REG
00000000030113B2 PB.PB_COM.PB_SCOM_ES3.EXTFIR_MASK_REG
00000000030113B3 PB.PB_COM.PB_SCOM_ES3.EXTFIR_MASK_REG
00000000030113B4 PB.PB_COM.PB_SCOM_ES3.EXTFIR_ACTION0_REG
00000000030113B5 PB.PB_COM.PB_SCOM_ES3.EXTFIR_ACTION1_REG
00000000030113C0 PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_REG
00000000030113C1 PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_REG
00000000030113C2 PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_REG
00000000030113C3 PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_MASK_REG
00000000030113C4 PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_MASK_REG
00000000030113C5 PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_MASK_REG
00000000030113C6 PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_ACTION0_REG
00000000030113C7 PB.PB_COM.PB_SCOM_ES4.PB_STATION_FIR_ACTION1_REG
00000000030113CA PB.PB_COM.PB_SCOM_ES4.PB_STATION_MODE
00000000030113CB PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE1_NEXT
00000000030113CC PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE1_CURR
00000000030113CD PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE2_NEXT
00000000030113CE PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE2_CURR
00000000030113CF PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE3_NEXT
00000000030113D0 PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE3_CURR
00000000030113D1 PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE4_NEXT
00000000030113D2 PB.PB_COM.PB_SCOM_ES4.PB_STATION_HP_MODE4_CURR
00000000030113D3 PB.PB_COM.PB_SCOM_ES4.PB_STATION_CFG1
00000000030113D4 PB.PB_COM.PB_SCOM_ES4.PB_STATION_CFG2
00000000030113D5 PB.PB_COM.PB_SCOM_ES4.PB_STATION_CFG3
00000000030113DA PB.PB_COM.PB_SCOM_ES4.PB_STATION_EVENT_SEL
00000000030113DB PB.PB_COM.PB_SCOM_ES4.PB_STATION_EVENT_COMPA
00000000030113DC PB.PB_COM.PB_SCOM_ES4.PB_STATION_EVENT_COMPB
00000000030113DD PB.PB_COM.PB_SCOM_ES4.PB_STATION_EVENT_COMPX
00000000030113DE PB.PB_COM.PB_SCOM_ES4.PB_STATION_PM_CONTROL
00000000030113DF PB.PB_COM.PB_SCOM_ES4.PB_STATION_TRACE
00000000030113EA PB.PB_COM.PB_SCOM_ES4.PB_STATION_GP_CMD_RATE
00000000030113EB PB.PB_COM.PB_SCOM_ES4.PB_STATION_SP_CMD_RATE
00000000030113EC PB.PB_COM.PB_SCOM_ES4.PB_STATION_CR_ERROR
0000000003011800 PE0.PB.PBCQ.PEPBREGS.PBCQHWCFG_REG
0000000003011801 PE0.PB.PBCQ.PEPBREGS.DRPPRICTL_REG
0000000003011802 PE0.PB.PBCQ.PEPBREGS.PBCQEINJ_REG
0000000003011803 PE0.PB.PBCQ.PEPBREGS.NESTTRC_REG
0000000003011804 PE0.PB.PBCQ.PEPBREGS.PMONCTL_REG
0000000003011805 PE0.PB.PBCQ.PEPBREGS.ADDREXTMASK_REG
0000000003011806 PE0.PB.PBCQ.PEPBREGS.PREDV_REG
0000000003011807 PE0.PB.PBCQ.PEPBREGS.NMMU_RTAG_OVERRIDE_REG
0000000003011808 PE0.PB.PBCQ.PEPBREGS.NRDSTKOVR_REG
0000000003011809 PE0.PB.PBCQ.PEPBREGS.NWRSTKOVR_REG
000000000301180A PE0.PB.PBCQ.PEPBREGS.NSTQSTKOVR_REG
000000000301180B PE0.PB.PBCQ.PEPBREGS.PERTYBOCTL_REG
000000000301180C PE0.PB.PBCQ.PEPBREGS.PE_TOPOLOGY_REG0
000000000301180D PE0.PB.PBCQ.PEPBREGS.PE_TOPOLOGY_REG1
000000000301180E PE0.PB.PBCQ.PEPBREGS.PE_TOPOLOGY_REG2
000000000301180F PE0.PB.PBCQ.PEPBREGS.PE_TOPOLOGY_REG3
0000000003011810 PE0.PB.PBCQ.PEPBREGS.PE_INJECT_THRESHOLD_REG
0000000003011811 PE0.PB.PBCQ.PEPBREGS.PE_WRITE_PACING_REG
0000000003011840 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIR_REG
0000000003011841 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIR_REG
0000000003011842 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIR_REG
0000000003011843 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRMASK_REG
0000000003011844 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRMASK_REG
0000000003011845 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRMASK_REG
0000000003011846 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRACTION0_REG
0000000003011847 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRACTION1_REG
0000000003011848 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.NFIRWOF_REG
000000000301184A PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.CERR_RPT0_REG
000000000301184B PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.CERR_RPT1_REG
000000000301184C PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.CQSTAT_REG
000000000301184D PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PBCQMODE_REG
000000000301184E PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR0_REG
000000000301184F PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR0_MASK_REG
0000000003011850 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR1_REG
0000000003011851 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.MMIOBAR1_MASK_REG
0000000003011852 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PHBBAR_REG
0000000003011853 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.INTBAR_REG
0000000003011854 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.BARE_REG
0000000003011855 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PE_DFREEZE_REG
0000000003011856 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PE_SPARSE_PAGE_CNTL_REG
0000000003011857 PE0.PB.PBCQ.PEPBREGS.STACK#0.REGS.PE_CACHE_INJECT_CNTL_REG
0000000003011880 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIR_REG
0000000003011881 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIR_REG
0000000003011882 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIR_REG
0000000003011883 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRMASK_REG
0000000003011884 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRMASK_REG
0000000003011885 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRMASK_REG
0000000003011886 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRACTION0_REG
0000000003011887 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRACTION1_REG
0000000003011888 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.NFIRWOF_REG
000000000301188A PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.CERR_RPT0_REG
000000000301188B PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.CERR_RPT1_REG
000000000301188C PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.CQSTAT_REG
000000000301188D PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PBCQMODE_REG
000000000301188E PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR0_REG
000000000301188F PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR0_MASK_REG
0000000003011890 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR1_REG
0000000003011891 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.MMIOBAR1_MASK_REG
0000000003011892 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PHBBAR_REG
0000000003011893 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.INTBAR_REG
0000000003011894 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.BARE_REG
0000000003011895 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PE_DFREEZE_REG
0000000003011896 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PE_SPARSE_PAGE_CNTL_REG
0000000003011897 PE0.PB.PBCQ.PEPBREGS.STACK#1.REGS.PE_CACHE_INJECT_CNTL_REG
00000000030118C0 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIR_REG
00000000030118C1 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIR_REG
00000000030118C2 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIR_REG
00000000030118C3 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRMASK_REG
00000000030118C4 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRMASK_REG
00000000030118C5 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRMASK_REG
00000000030118C6 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRACTION0_REG
00000000030118C7 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRACTION1_REG
00000000030118C8 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.NFIRWOF_REG
00000000030118CA PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.CERR_RPT0_REG
00000000030118CB PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.CERR_RPT1_REG
00000000030118CC PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.CQSTAT_REG
00000000030118CD PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PBCQMODE_REG
00000000030118CE PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR0_REG
00000000030118CF PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR0_MASK_REG
00000000030118D0 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR1_REG
00000000030118D1 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.MMIOBAR1_MASK_REG
00000000030118D2 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PHBBAR_REG
00000000030118D3 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.INTBAR_REG
00000000030118D4 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.BARE_REG
00000000030118D5 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PE_DFREEZE_REG
00000000030118D6 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PE_SPARSE_PAGE_CNTL_REG
00000000030118D7 PE0.PB.PBCQ.PEPBREGS.STACK#2.REGS.PE_CACHE_INJECT_CNTL_REG
0000000003011C00 TP.TPBR.PSI.PSI_WRAP.TX_CTRL_STAT_REG
0000000003011C01 TP.TPBR.PSI.PSI_WRAP.TX_TO_RT_REG
0000000003011C02 TP.TPBR.PSI.PSI_WRAP.TX_ERROR_REG
0000000003011C04 TP.TPBR.PSI.PSI_WRAP.TX_ERROR_REG
0000000003011C05 TP.TPBR.PSI.PSI_WRAP.TX_CH_FSM_REG
0000000003011C06 TP.TPBR.PSI.PSI_WRAP.TX_DF_FSM_REG
0000000003011C07 TP.TPBR.PSI.PSI_WRAP.TX_ERR_MODE
0000000003011C08 TP.TPBR.PSI.PSI_WRAP.RX_CTRL_STAT_REG
0000000003011C09 TP.TPBR.PSI.PSI_WRAP.EECNT_REG
0000000003011C0A TP.TPBR.PSI.PSI_WRAP.RX_ERROR_REG
0000000003011C0C TP.TPBR.PSI.PSI_WRAP.RX_ERROR_REG
0000000003011C0D TP.TPBR.PSI.PSI_WRAP.RX_CH_FSM_REG
0000000003011C0E TP.TPBR.PSI.PSI_WRAP.RX_DF_FSM_REG
0000000003011C0F TP.TPBR.PSI.PSI_WRAP.RX_ERR_MODE
0000000003011C10 TP.TPBR.PSI.PSI_WRAP.TX_CH_INTADDR_REG
0000000003011C11 TP.TPBR.PSI.PSI_WRAP.TX_DBFF_REG0
0000000003011C12 TP.TPBR.PSI.PSI_WRAP.TX_DBFF_REG1
0000000003011C13 TP.TPBR.PSI.PSI_WRAP.TX_CH_MISC_REG
0000000003011C18 TP.TPBR.PSI.PSI_WRAP.RX_CH_INTADDR_REG
0000000003011C19 TP.TPBR.PSI.PSI_WRAP.RX_DBFF_REG0
0000000003011C1A TP.TPBR.PSI.PSI_WRAP.RX_DBFF_REG1
0000000003011C1B TP.TPBR.PSI.PSI_WRAP.RX_CH_MISC_REG
0000000003011C80 PB_BRIDGE.NHTM.SC.HTM_MODE
0000000003011C81 PB_BRIDGE.NHTM.SC.HTM_MEM
0000000003011C82 PB_BRIDGE.NHTM.SC.HTM_STAT
0000000003011C83 PB_BRIDGE.NHTM.SC.HTM0_LAST
0000000003011C84 PB_BRIDGE.NHTM.SC.HTM1_LAST
0000000003011C85 PB_BRIDGE.NHTM.SC.HTM_TRIG
0000000003011C86 PB_BRIDGE.NHTM.SC.HTM_CTRL
0000000003011C87 PB_BRIDGE.NHTM.SC.HTM_FILT
0000000003011C88 PB_BRIDGE.NHTM.SC.HTM_TTYPEFILT
0000000003011C89 PB_BRIDGE.NHTM.SC.HTM_CFG
0000000003011C8A PB_BRIDGE.NHTM.SC.HTM_FLEX
0000000003011C8B PB_BRIDGE.NHTM.SC.HTM_ADDR_PAT
0000000003011C8C PB_BRIDGE.NHTM.SC.HTM_ADDR_MASK
0000000003011C8D PB_BRIDGE.NHTM.SC.HTM_STOP_FILTER
0000000003011C8E PB_BRIDGE.NHTM.SC.HTM_STOP_ADDR_PAT
0000000003011C8F PB_BRIDGE.NHTM.SC.HTM_STOP_ADDR_MASK
0000000003011D00 TP.TPBR.PSIHB.PSIHB_FIR_REG
0000000003011D01 TP.TPBR.PSIHB.PSIHB_FIR_REG
0000000003011D02 TP.TPBR.PSIHB.PSIHB_FIR_REG
0000000003011D03 TP.TPBR.PSIHB.PSIHB_FIR_MASK_REG
0000000003011D04 TP.TPBR.PSIHB.PSIHB_FIR_MASK_REG
0000000003011D05 TP.TPBR.PSIHB.PSIHB_FIR_MASK_REG
0000000003011D06 TP.TPBR.PSIHB.PSIHB_FIR_ACTION0_REG
0000000003011D07 TP.TPBR.PSIHB.PSIHB_FIR_ACTION1_REG
0000000003011D0A TP.TPBR.PSIHB.PSI_BRIDGE_BAR_REG
0000000003011D0B TP.TPBR.PSIHB.PSI_BRIDGE_FSP_BAR_REG
0000000003011D0C TP.TPBR.PSIHB.PSI_FSP_MMR_REG
0000000003011D0E TP.TPBR.PSIHB.PSIHB_STATUS_CTL_REG
0000000003011D12 TP.TPBR.PSIHB.PSIHB_STATUS_CTL_REG
0000000003011D13 TP.TPBR.PSIHB.PSIHB_STATUS_CTL_REG
0000000003011D0F TP.TPBR.PSIHB.PSIHB_ERROR_MASK_REG
0000000003011D10 TP.TPBR.PSIHB.EMPTY_10
0000000003011D11 TP.TPBR.PSIHB.PSIHB_DEBUG_REG
0000000003011D14 TP.TPBR.PSIHB.DMA_UP_ADDR
0000000003011D15 TP.TPBR.PSIHB.PSIHB_INTERRUPT_CONTROL
0000000003011D16 TP.TPBR.PSIHB.ESB_CI_BASE
0000000003011D17 TP.TPBR.PSIHB.ESB_NOTIFY
0000000003011D18 TP.TPBR.PSIHB.IVT_OFFSET
0000000003011D19 TP.TPBR.PSIHB.PSIHB_INTERRUPT_LEVEL
0000000003011D1A TP.TPBR.PSIHB.PSIHB_INTERRUPT_STATUS
0000000003011D1B TP.TPBR.PSIHB.EMPTY_1B
0000000003011D40 PB_BRIDGE.HCA.FIR_DATA
0000000003011D41 PB_BRIDGE.HCA.FIR_DATA
0000000003011D42 PB_BRIDGE.HCA.FIR_DATA
0000000003011D43 PB_BRIDGE.HCA.FIR_MASK
0000000003011D44 PB_BRIDGE.HCA.FIR_MASK
0000000003011D45 PB_BRIDGE.HCA.FIR_MASK
0000000003011D46 PB_BRIDGE.HCA.FIR_ACTION0
0000000003011D47 PB_BRIDGE.HCA.FIR_ACTION1
0000000003011D48 PB_BRIDGE.HCA.FIR_WOF
0000000003011D4A PB_BRIDGE.HCA.HCA_CONFIG_REG
0000000003011D4B PB_BRIDGE.HCA.HCA_CONTROL_REG
0000000003011D4C PB_BRIDGE.HCA.HCA_STATUS_REG
0000000003011D4D PB_BRIDGE.HCA.HCA_MONITOR_0_ADDRESS_REG
0000000003011D4E PB_BRIDGE.HCA.HCA_MONITOR_1_ADDRESS_REG
0000000003011D4F PB_BRIDGE.HCA.HCA_MONITOR_0_COUNTER_REG
0000000003011D50 PB_BRIDGE.HCA.HCA_MONITOR_1_COUNTER_REG
0000000003011D51 PB_BRIDGE.HCA.HCA_DECAY_0_CONTROL_REG
0000000003011D52 PB_BRIDGE.HCA.HCA_DECAY_0_ADDRESS_REG
0000000003011D53 PB_BRIDGE.HCA.HCA_DECAY_1_CONTROL_REG
0000000003011D54 PB_BRIDGE.HCA.HCA_DECAY_1_ADDRESS_REG
0000000003011D55 PB_BRIDGE.HCA.HCA_DROP_COUNT_REG
0000000003011D56 PB_BRIDGE.HCA.HCA_ERRRPT_HOLD_REG
0000000003011D57 PB_BRIDGE.HCA.HCA_CHSW_CTRL_REG
0000000003011DC0 TP.TPBR.PBA.PBAF.PBAFIR
0000000003011DC1 TP.TPBR.PBA.PBAF.PBAFIR
0000000003011DC2 TP.TPBR.PBA.PBAF.PBAFIR
0000000003011DC3 TP.TPBR.PBA.PBAF.PBAFIRMASK
0000000003011DC4 TP.TPBR.PBA.PBAF.PBAFIRMASK
0000000003011DC5 TP.TPBR.PBA.PBAF.PBAFIRMASK
0000000003011DC6 TP.TPBR.PBA.PBAF.PBAFIRACT0
0000000003011DC7 TP.TPBR.PBA.PBAF.PBAFIRACT1
0000000003011DCB TP.TPBR.PBA.PBAF.PBAFCFG
0000000003011DCC TP.TPBR.PBA.PBAF.PBAERRRPT0
0000000003011DCD TP.TPBR.PBA.PBAF.PBAERRRPT1
0000000003011DCE TP.TPBR.PBA.PBAF.PBAERRRPT2
0000000003011DD0 TP.TPBR.PBA.PBAF.PBAPBOCR0
0000000003011DD1 TP.TPBR.PBA.PBAF.PBAPBOCR1
0000000003011DD6 TP.TPBR.PBA.PBAF.GOCPCR
0000000003011DD7 TP.TPBR.PBA.PBAF.GOCPER
0000000003011DD8 TP.TPBR.PBA.PBAF.GOCPRR
0000000003011DD9 TP.TPBR.PBA.PBAF.GOCPSR
0000000003011F40 TP.TPBR.PSIHB.NOTRUST_BAR0
0000000003011F41 TP.TPBR.PSIHB.NOTRUST_BAR1
0000000003011F42 TP.TPBR.PSIHB.NOTRUST_BAR0MASK
0000000003011F43 TP.TPBR.PSIHB.NOTRUST_BAR1MASK
0000000003011F44 TP.TPBR.PSIHB.PSI_TCE_ADDR_REG
0000000003011F45 TP.TPBR.PSIHB.TRUST_CONTROL
0000000003012000 TP.LPC.SYNC_FIR_REG
0000000003012001 TP.LPC.SYNC_FIR_REG
0000000003012002 TP.LPC.SYNC_FIR_REG
0000000003012003 TP.LPC.SYNC_FIR_MASK_REG
0000000003012004 TP.LPC.SYNC_FIR_MASK_REG
0000000003012005 TP.LPC.SYNC_FIR_MASK_REG
0000000003012006 TP.LPC.SYNC_FIR_ACTION0_REG
0000000003012007 TP.LPC.SYNC_FIR_ACTION1_REG
0000000003012008 TP.LPC.SYNC_FIR_WOF_REG
0000000003030000 TP.TCN1.N1.SYNC_CONFIG
0000000003030001 TP.TCN1.N1.OPCG_ALIGN
0000000003030002 TP.TCN1.N1.OPCG_REG0
0000000003030003 TP.TCN1.N1.OPCG_REG1
0000000003030004 TP.TCN1.N1.OPCG_REG2
0000000003030005 TP.TCN1.N1.SCAN_REGION_TYPE
0000000003030006 TP.TCN1.N1.CLK_REGION
0000000003030008 TP.TCN1.N1.CLOCK_STAT_SL
0000000003030009 TP.TCN1.N1.CLOCK_STAT_NSL
000000000303000A TP.TCN1.N1.CLOCK_STAT_ARY
000000000303000B TP.TCN1.N1.BIST
000000000303000C TP.TCN1.N1.XSTOP1
000000000303000D TP.TCN1.N1.XSTOP2
000000000303000E TP.TCN1.N1.XSTOP3
000000000303000F TP.TCN1.N1.ERROR_STATUS
0000000003030010 TP.TCN1.N1.OPCG_CAPT1
0000000003030011 TP.TCN1.N1.OPCG_CAPT2
0000000003030012 TP.TCN1.N1.OPCG_CAPT3
0000000003030013 TP.TCN1.N1.DBG_CBS_CC
0000000003030014 TP.TCN1.N1.XSTOP4
0000000003030015 TP.TCN1.N1.XSTOP5
0000000003030016 TP.TCN1.N1.REGION_CCFLUSH_STATUS
0000000003030020 TP.TCN1.N1.PCB_OPCG_GO
0000000003030028 TP.TCN1.N1.PHASE_COUNTER_RESET
0000000003030030 TP.TCN1.N1.PCB_OPCG_STOP
00000000030303FE TP.TCN1.N1.CC_PROTECT_MODE_REG
00000000030303FF TP.TCN1.N1.CC_ATOMIC_LOCK_REG
0000000003038000 TP.TCN1.N1.SCAN32
0000000003039000 TP.TCN1.N1.SCAN_LONG_ROTATE
000000000303A000 TP.TCN1.N1.SCAN_UPDATEDR
000000000303B000 TP.TCN1.N1.SCAN_UPDATEDR_LONG
000000000303C000 TP.TCN1.N1.SCAN_CAPTUREDR
000000000303D000 TP.TCN1.N1.SCAN_CAPTUREDR_LONG
000000000303E000 TP.TCN1.N1.SCAN64
000000000303F000 TP.TCN1.N1.SCAN64CONTSCAN
0000000003040000 TP.TCN1.N1.XSTOP
0000000003040001 TP.TCN1.N1.RECOV
0000000003040002 TP.TCN1.N1.SPATTN
0000000003040003 TP.TCN1.N1.LOCAL_XSTOP
0000000003040004 TP.TCN1.N1.HOSTATTN
0000000003040010 TP.TCN1.N1.XSTOP_UNMASKED
0000000003040011 TP.TCN1.N1.RECOV_UNMASKED
0000000003040012 TP.TCN1.N1.SPATTN_UNMASKED
0000000003040013 TP.TCN1.N1.LOCAL_XSTOP_UNMASKED
0000000003040014 TP.TCN1.N1.HOSTATTN_UNMASKED
0000000003040021 TP.TCN1.N1.WOF
0000000003040040 TP.TCN1.N1.XSTOP_MASK
0000000003040050 TP.TCN1.N1.XSTOP_MASK
0000000003040060 TP.TCN1.N1.XSTOP_MASK
0000000003040041 TP.TCN1.N1.RECOV_MASK
0000000003040051 TP.TCN1.N1.RECOV_MASK
0000000003040061 TP.TCN1.N1.RECOV_MASK
0000000003040042 TP.TCN1.N1.SPATTN_MASK
0000000003040052 TP.TCN1.N1.SPATTN_MASK
0000000003040062 TP.TCN1.N1.SPATTN_MASK
0000000003040043 TP.TCN1.N1.LOCAL_XSTOP_MASK
0000000003040053 TP.TCN1.N1.LOCAL_XSTOP_MASK
0000000003040063 TP.TCN1.N1.LOCAL_XSTOP_MASK
0000000003040044 TP.TCN1.N1.HOSTATTN_MASK
0000000003040054 TP.TCN1.N1.HOSTATTN_MASK
0000000003040064 TP.TCN1.N1.HOSTATTN_MASK
0000000003040080 TP.TCN1.N1.EPS.FIR.ANY_LOCAL_ERR_MASK
0000000003040081 TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK1
0000000003040082 TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK2
0000000003040083 TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK3
0000000003040084 TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK4
0000000003040085 TP.TCN1.N1.EPS.FIR.CLKSTOP_ON_XSTOP_MASK5
0000000003040088 TP.TCN1.N1.EPS.FIR.MODE_REG
0000000003040100 TP.TCN1.N1.LOCAL_FIR
0000000003040101 TP.TCN1.N1.LOCAL_FIR
0000000003040102 TP.TCN1.N1.LOCAL_FIR
0000000003040103 TP.TCN1.N1.EPS.FIR.LOCAL_FIR_MASK
0000000003040104 TP.TCN1.N1.EPS.FIR.LOCAL_FIR_MASK
0000000003040105 TP.TCN1.N1.EPS.FIR.LOCAL_FIR_MASK
0000000003040106 TP.TCN1.N1.EPS.FIR.LOCAL_FIR_ACTION0
0000000003040107 TP.TCN1.N1.EPS.FIR.LOCAL_FIR_ACTION1
0000000003040108 TP.TCN1.N1.EPS.FIR.LOCAL_FIR_WOF
0000000003040109 TP.TCN1.N1.EPS.FIR.LOCAL_FIR_ACTION2
0000000003050000 TP.TCN1.N1.EPS.THERM.WSUB.DTS_RESULT0
0000000003050001 TP.TCN1.N1.EPS.THERM.WSUB.DTS_RESULT1
0000000003050002 TP.TCN1.N1.EPS.THERM.WSUB.DTS_RESULT2
0000000003050003 TP.TCN1.N1.EPS.THERM.WSUB.DTS_TRC_RESULT
000000000305000F TP.TCN1.N1.EPS.THERM.WSUB.THERM_MODE_REG
0000000003050010 TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_MODE_REG
0000000003050011 TP.TCN1.N1.EPS.THERM.WSUB.INJECT_REG
0000000003050012 TP.TCN1.N1.EPS.THERM.WSUB.CONTROL_REG
0000000003050013 TP.TCN1.N1.EPS.THERM.WSUB.ERR_STATUS_REG
0000000003050014 TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_FORCE_REG
0000000003050016 TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_CLKSRC_REG
0000000003050019 TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_DATA0
000000000305001A TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_DATA1
000000000305001B TP.TCN1.N1.EPS.THERM.WSUB.SKITTER_DATA2
000000000305001C TP.TCN1.N1.EPS.THERM.WSUB.TIMESTAMP_COUNTER_READ
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